The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/sys/ata.h

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    1 /*-
    2  * Copyright (c) 2000 - 2004 Søren Schmidt <sos@FreeBSD.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer,
   10  *    without modification, immediately at the beginning of the file.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  * 3. The name of the author may not be used to endorse or promote products
   15  *    derived from this software without specific prior written permission.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   27  *
   28  * $FreeBSD$
   29  */
   30 
   31 #ifndef _SYS_ATA_H_
   32 #define _SYS_ATA_H_
   33 
   34 #include <sys/ioccom.h>
   35 
   36 /* ATA/ATAPI device parameters */
   37 struct ata_params {
   38 /*000*/ u_int16_t       config;         /* configuration info */
   39 #define ATA_PROTO_MASK                  0x8003
   40 #define ATA_PROTO_ATA                   0x0002
   41 #define ATA_PROTO_ATAPI_12              0x8000
   42 #define ATA_PROTO_ATAPI_16              0x8001
   43 #define ATA_ATAPI_TYPE_MASK             0x1f00
   44 #define ATA_ATAPI_TYPE_DIRECT           0x0000  /* disk/floppy */
   45 #define ATA_ATAPI_TYPE_TAPE             0x0100  /* streaming tape */
   46 #define ATA_ATAPI_TYPE_CDROM            0x0500  /* CD-ROM device */
   47 #define ATA_ATAPI_TYPE_OPTICAL          0x0700  /* optical disk */
   48 #define ATA_DRQ_MASK                    0x0060
   49 #define ATA_DRQ_SLOW                    0x0000  /* cpu 3 ms delay */
   50 #define ATA_DRQ_INTR                    0x0020  /* interrupt 10 ms delay */
   51 #define ATA_DRQ_FAST                    0x0040  /* accel 50 us delay */
   52 
   53 /*001*/ u_int16_t       cylinders;              /* # of cylinders */
   54         u_int16_t       reserved2;
   55 /*003*/ u_int16_t       heads;                  /* # heads */
   56         u_int16_t       obsolete4;
   57         u_int16_t       obsolete5;
   58 /*006*/ u_int16_t       sectors;                /* # sectors/track */
   59 /*007*/ u_int16_t       vendor7[3];
   60 /*010*/ u_int8_t        serial[20];             /* serial number */
   61 /*020*/ u_int16_t       retired20;
   62         u_int16_t       retired21;
   63         u_int16_t       obsolete22;
   64 /*023*/ u_int8_t        revision[8];            /* firmware revision */
   65 /*027*/ u_int8_t        model[40];              /* model name */
   66 /*047*/ u_int16_t       sectors_intr;           /* sectors per interrupt */
   67 /*048*/ u_int16_t       usedmovsd;              /* double word read/write? */
   68 /*049*/ u_int16_t       capabilities1;
   69 #define ATA_SUPPORT_DMA                 0x0100
   70 #define ATA_SUPPORT_LBA                 0x0200
   71 #define ATA_SUPPORT_OVERLAP             0x4000
   72 
   73 /*050*/ u_int16_t       capabilities2;
   74 /*051*/ u_int16_t       retired_piomode;        /* PIO modes 0-2 */
   75 #define ATA_RETIRED_PIO_MASK            0x0300
   76 
   77 /*052*/ u_int16_t       retired_dmamode;        /* DMA modes */
   78 #define ATA_RETIRED_DMA_MASK            0x0003
   79 
   80 /*053*/ u_int16_t       atavalid;               /* fields valid */
   81 #define ATA_FLAG_54_58                  0x0001  /* words 54-58 valid */
   82 #define ATA_FLAG_64_70                  0x0002  /* words 64-70 valid */
   83 #define ATA_FLAG_88                     0x0004  /* word 88 valid */
   84 
   85 /*054*/ u_int16_t       obsolete54[5];
   86 /*059*/ u_int16_t       multi;
   87 #define ATA_MULTI_VALID                 0x0100
   88 
   89 /*060*/ u_int16_t       lba_size_1;
   90         u_int16_t       lba_size_2;
   91         u_int16_t       obsolete62;
   92 /*063*/ u_int16_t       mwdmamodes;             /* multiword DMA modes */
   93 /*064*/ u_int16_t       apiomodes;              /* advanced PIO modes */
   94 
   95 /*065*/ u_int16_t       mwdmamin;               /* min. M/W DMA time/word ns */
   96 /*066*/ u_int16_t       mwdmarec;               /* rec. M/W DMA time ns */
   97 /*067*/ u_int16_t       pioblind;               /* min. PIO cycle w/o flow */
   98 /*068*/ u_int16_t       pioiordy;               /* min. PIO cycle IORDY flow */
   99         u_int16_t       reserved69;
  100         u_int16_t       reserved70;
  101 /*071*/ u_int16_t       rlsovlap;               /* rel time (us) for overlap */
  102 /*072*/ u_int16_t       rlsservice;             /* rel time (us) for service */
  103         u_int16_t       reserved73;
  104         u_int16_t       reserved74;
  105 /*075*/ u_int16_t       queue;
  106 #define ATA_QUEUE_LEN(x)                ((x) & 0x001f)
  107 
  108         u_int16_t       satacapabilities;
  109 #define ATA_SATA_GEN1                   0x0002
  110 #define ATA_SATA_GEN2                   0x0004
  111 #define ATA_SUPPORT_NCQ                 0x0100
  112 #define ATA_SUPPORT_IFPWRMNGTRCV        0x0200
  113 
  114         u_int16_t       reserved77;
  115         u_int16_t       satasupport;
  116 #define ATA_SUPPORT_NONZERO             0x0002
  117 #define ATA_SUPPORT_AUTOACTIVATE        0x0004
  118 #define ATA_SUPPORT_IFPWRMNGT           0x0008
  119 #define ATA_SUPPORT_INORDERDATA         0x0010
  120         u_int16_t       sataenabled;
  121 
  122 /*080*/ u_int16_t       version_major;
  123 /*081*/ u_int16_t       version_minor;
  124 
  125         struct {
  126 /*082/085*/ u_int16_t   command1;
  127 #define ATA_SUPPORT_SMART               0x0001
  128 #define ATA_SUPPORT_SECURITY            0x0002
  129 #define ATA_SUPPORT_REMOVABLE           0x0004
  130 #define ATA_SUPPORT_POWERMGT            0x0008
  131 #define ATA_SUPPORT_PACKET              0x0010
  132 #define ATA_SUPPORT_WRITECACHE          0x0020
  133 #define ATA_SUPPORT_LOOKAHEAD           0x0040
  134 #define ATA_SUPPORT_RELEASEIRQ          0x0080
  135 #define ATA_SUPPORT_SERVICEIRQ          0x0100
  136 #define ATA_SUPPORT_RESET               0x0200
  137 #define ATA_SUPPORT_PROTECTED           0x0400
  138 #define ATA_SUPPORT_WRITEBUFFER         0x1000
  139 #define ATA_SUPPORT_READBUFFER          0x2000
  140 #define ATA_SUPPORT_NOP                 0x4000
  141 
  142 /*083/086*/ u_int16_t   command2;
  143 #define ATA_SUPPORT_MICROCODE           0x0001
  144 #define ATA_SUPPORT_QUEUED              0x0002
  145 #define ATA_SUPPORT_CFA                 0x0004
  146 #define ATA_SUPPORT_APM                 0x0008
  147 #define ATA_SUPPORT_NOTIFY              0x0010
  148 #define ATA_SUPPORT_STANDBY             0x0020
  149 #define ATA_SUPPORT_SPINUP              0x0040
  150 #define ATA_SUPPORT_MAXSECURITY         0x0100
  151 #define ATA_SUPPORT_AUTOACOUSTIC        0x0200
  152 #define ATA_SUPPORT_ADDRESS48           0x0400
  153 #define ATA_SUPPORT_OVERLAY             0x0800
  154 #define ATA_SUPPORT_FLUSHCACHE          0x1000
  155 #define ATA_SUPPORT_FLUSHCACHE48        0x2000
  156 
  157 /*084/087*/ u_int16_t   extension;
  158         } support, enabled;
  159 
  160 /*088*/ u_int16_t       udmamodes;              /* UltraDMA modes */
  161 /*089*/ u_int16_t       erase_time;
  162 /*090*/ u_int16_t       enhanced_erase_time;
  163 /*091*/ u_int16_t       apm_value;
  164 /*092*/ u_int16_t       master_passwd_revision;
  165 /*093*/ u_int16_t       hwres;
  166 #define ATA_CABLE_ID                    0x2000
  167 
  168 /*094*/ u_int16_t       acoustic;
  169 #define ATA_ACOUSTIC_CURRENT(x)         ((x) & 0x00ff)
  170 #define ATA_ACOUSTIC_VENDOR(x)          (((x) & 0xff00) >> 8)
  171 
  172 /*095*/ u_int16_t       stream_min_req_size;
  173 /*096*/ u_int16_t       stream_transfer_time;
  174 /*097*/ u_int16_t       stream_access_latency;
  175 /*098*/ u_int32_t       stream_granularity;
  176 /*100*/ u_int16_t       lba_size48_1;
  177         u_int16_t       lba_size48_2;
  178         u_int16_t       lba_size48_3;
  179         u_int16_t       lba_size48_4;
  180         u_int16_t       reserved104[23];
  181 /*127*/ u_int16_t       removable_status;
  182 /*128*/ u_int16_t       security_status;
  183         u_int16_t       reserved129[31];
  184 /*160*/ u_int16_t       cfa_powermode1;
  185         u_int16_t       reserved161[14];
  186 /*176*/ u_int16_t       media_serial[30];
  187         u_int16_t       reserved206[49];
  188 /*255*/ u_int16_t       integrity;
  189 };
  190 
  191 /* ATA transfer modes */
  192 #define ATA_MODE_MASK           0x0f
  193 #define ATA_DMA_MASK            0xf0
  194 #define ATA_PIO                 0x00
  195 #define ATA_PIO0                0x08
  196 #define ATA_PIO1                0x09
  197 #define ATA_PIO2                0x0a
  198 #define ATA_PIO3                0x0b
  199 #define ATA_PIO4                0x0c
  200 #define ATA_PIO_MAX             0x0f
  201 #define ATA_DMA                 0x10
  202 #define ATA_WDMA0               0x20
  203 #define ATA_WDMA1               0x21
  204 #define ATA_WDMA2               0x22
  205 #define ATA_UDMA0               0x40
  206 #define ATA_UDMA1               0x41
  207 #define ATA_UDMA2               0x42
  208 #define ATA_UDMA3               0x43
  209 #define ATA_UDMA4               0x44
  210 #define ATA_UDMA5               0x45
  211 #define ATA_UDMA6               0x46
  212 #define ATA_SA150               0x47
  213 #define ATA_DMA_MAX             0x4f
  214 
  215 /* ATA commands */
  216 #define ATA_NOP                         0x00    /* NOP command */
  217 #define         ATA_NF_FLUSHQUEUE       0x00    /* flush queued cmd's */
  218 #define         ATA_NF_AUTOPOLL         0x01    /* start autopoll function */
  219 #define ATA_ATAPI_RESET                 0x08    /* reset ATAPI device */
  220 #define ATA_READ                        0x20    /* read command */
  221 #define ATA_READ48                      0x24    /* read command */
  222 #define ATA_READ_DMA48                  0x25    /* read w/DMA command */
  223 #define ATA_READ_DMA_QUEUED48           0x26    /* read w/DMA QUEUED command */
  224 #define ATA_READ_MUL48                  0x29    /* read multi command */
  225 #define ATA_WRITE                       0x30    /* write command */
  226 #define ATA_WRITE48                     0x34    /* write command */
  227 #define ATA_WRITE_DMA48                 0x35    /* write w/DMA command */
  228 #define ATA_WRITE_DMA_QUEUED48          0x36    /* write w/DMA QUEUED command */
  229 #define ATA_WRITE_MUL48                 0x39    /* write multi command */
  230 #define ATA_PACKET_CMD                  0xa0    /* packet command */
  231 #define ATA_ATAPI_IDENTIFY              0xa1    /* get ATAPI params*/
  232 #define ATA_SERVICE                     0xa2    /* service command */
  233 #define ATA_SMART_CMD                   0xb0    /* SMART command */
  234 #define ATA_READ_MUL                    0xc4    /* read multi command */
  235 #define ATA_WRITE_MUL                   0xc5    /* write multi command */
  236 #define ATA_SET_MULTI                   0xc6    /* set multi size command */
  237 #define ATA_READ_DMA_QUEUED             0xc7    /* read w/DMA QUEUED command */
  238 #define ATA_READ_DMA                    0xc8    /* read w/DMA command */
  239 #define ATA_WRITE_DMA                   0xca    /* write w/DMA command */
  240 #define ATA_WRITE_DMA_QUEUED            0xcc    /* write w/DMA QUEUED command */
  241 #define ATA_SLEEP                       0xe6    /* sleep command */
  242 #define ATA_FLUSHCACHE                  0xe7    /* flush cache to disk */
  243 #define ATA_FLUSHCACHE48                0xea    /* flush cache to disk */
  244 #define ATA_ATA_IDENTIFY                0xec    /* get ATA params */
  245 #define ATA_SETFEATURES                 0xef    /* features command */
  246 #define         ATA_SF_SETXFER          0x03    /* set transfer mode */
  247 #define         ATA_SF_ENAB_WCACHE      0x02    /* enable write cache */
  248 #define         ATA_SF_DIS_WCACHE       0x82    /* disable write cache */
  249 #define         ATA_SF_ENAB_RCACHE      0xaa    /* enable readahead cache */
  250 #define         ATA_SF_DIS_RCACHE       0x55    /* disable readahead cache */
  251 #define         ATA_SF_ENAB_RELIRQ      0x5d    /* enable release interrupt */
  252 #define         ATA_SF_DIS_RELIRQ       0xdd    /* disable release interrupt */
  253 #define         ATA_SF_ENAB_SRVIRQ      0x5e    /* enable service interrupt */
  254 #define         ATA_SF_DIS_SRVIRQ       0xde    /* disable service interrupt */
  255 
  256 /* ATAPI commands */
  257 #define ATAPI_TEST_UNIT_READY           0x00    /* check if device is ready */
  258 #define ATAPI_REZERO                    0x01    /* rewind */
  259 #define ATAPI_REQUEST_SENSE             0x03    /* get sense data */
  260 #define ATAPI_FORMAT                    0x04    /* format unit */
  261 #define ATAPI_READ                      0x08    /* read data */
  262 #define ATAPI_WRITE                     0x0a    /* write data */
  263 #define ATAPI_WEOF                      0x10    /* write filemark */
  264 #define ATAPI_WF_WRITE          0x01
  265 #define ATAPI_SPACE                     0x11    /* space command */
  266 #define         ATAPI_SP_FM             0x01
  267 #define         ATAPI_SP_EOD            0x03
  268 #define ATAPI_MODE_SELECT               0x15    /* mode select */
  269 #define ATAPI_ERASE                     0x19    /* erase */
  270 #define ATAPI_MODE_SENSE                0x1a    /* mode sense */
  271 #define ATAPI_START_STOP                0x1b    /* start/stop unit */
  272 #define         ATAPI_SS_LOAD           0x01
  273 #define         ATAPI_SS_RETENSION      0x02
  274 #define         ATAPI_SS_EJECT          0x04
  275 #define ATAPI_PREVENT_ALLOW             0x1e    /* media removal */
  276 #define ATAPI_READ_FORMAT_CAPACITIES    0x23    /* get format capacities */
  277 #define ATAPI_READ_CAPACITY             0x25    /* get volume capacity */
  278 #define ATAPI_READ_BIG                  0x28    /* read data */
  279 #define ATAPI_WRITE_BIG                 0x2a    /* write data */
  280 #define ATAPI_LOCATE                    0x2b    /* locate to position */
  281 #define ATAPI_READ_POSITION             0x34    /* read position */
  282 #define ATAPI_SYNCHRONIZE_CACHE         0x35    /* flush buf, close channel */
  283 #define ATAPI_WRITE_BUFFER              0x3b    /* write device buffer */
  284 #define ATAPI_READ_BUFFER               0x3c    /* read device buffer */
  285 #define ATAPI_READ_SUBCHANNEL           0x42    /* get subchannel info */
  286 #define ATAPI_READ_TOC                  0x43    /* get table of contents */
  287 #define ATAPI_PLAY_10                   0x45    /* play by lba */
  288 #define ATAPI_PLAY_MSF                  0x47    /* play by MSF address */
  289 #define ATAPI_PLAY_TRACK                0x48    /* play by track number */
  290 #define ATAPI_PAUSE                     0x4b    /* pause audio operation */
  291 #define ATAPI_READ_DISK_INFO            0x51    /* get disk info structure */
  292 #define ATAPI_READ_TRACK_INFO           0x52    /* get track info structure */
  293 #define ATAPI_RESERVE_TRACK             0x53    /* reserve track */
  294 #define ATAPI_SEND_OPC_INFO             0x54    /* send OPC structurek */
  295 #define ATAPI_MODE_SELECT_BIG           0x55    /* set device parameters */
  296 #define ATAPI_REPAIR_TRACK              0x58    /* repair track */
  297 #define ATAPI_READ_MASTER_CUE           0x59    /* read master CUE info */
  298 #define ATAPI_MODE_SENSE_BIG            0x5a    /* get device parameters */
  299 #define ATAPI_CLOSE_TRACK               0x5b    /* close track/session */
  300 #define ATAPI_READ_BUFFER_CAPACITY      0x5c    /* get buffer capicity */
  301 #define ATAPI_SEND_CUE_SHEET            0x5d    /* send CUE sheet */
  302 #define ATAPI_BLANK                     0xa1    /* blank the media */
  303 #define ATAPI_SEND_KEY                  0xa3    /* send DVD key structure */
  304 #define ATAPI_REPORT_KEY                0xa4    /* get DVD key structure */
  305 #define ATAPI_PLAY_12                   0xa5    /* play by lba */
  306 #define ATAPI_LOAD_UNLOAD               0xa6    /* changer control command */
  307 #define ATAPI_READ_STRUCTURE            0xad    /* get DVD structure */
  308 #define ATAPI_PLAY_CD                   0xb4    /* universal play command */
  309 #define ATAPI_SET_SPEED                 0xbb    /* set drive speed */
  310 #define ATAPI_MECH_STATUS               0xbd    /* get changer status */
  311 #define ATAPI_READ_CD                   0xbe    /* read data */
  312 #define ATAPI_POLL_DSC                  0xff    /* poll DSC status bit */
  313 
  314 struct ata_cmd {
  315     int                         channel;
  316     int                         device;
  317     int                         cmd;
  318 #define ATAGMAXCHANNEL          0x0101
  319 #define ATAGPARM                0x0102
  320 #define ATAGMODE                0x0103
  321 #define ATASMODE                0x0104
  322 #define ATAREQUEST              0x0108
  323 #define ATAREINIT               0x0110
  324 #define ATAATTACH               0x0111
  325 #define ATADETACH               0x0112
  326 #define ATARAIDCREATE           0x0120
  327 #define ATARAIDDELETE           0x0121
  328 #define ATARAIDSTATUS           0x0122
  329 #define ATARAIDADDSPARE         0x0123
  330 #define ATARAIDREBUILD          0x0124
  331 #define ATAENCSTAT              0x0130
  332 
  333     union {
  334         int                     maxchan;
  335 
  336         struct {
  337             int                 type[2];
  338             char                name[2][32];
  339             struct ata_params   params[2];
  340         } param;
  341 
  342         struct {
  343             int                 mode[2];
  344         } mode;
  345 
  346         struct {
  347             union {
  348                 struct {
  349                     u_int8_t            command;
  350                     u_int8_t            feature;
  351                     u_int64_t           lba;
  352                     u_int16_t           count;
  353                 } ata;
  354                 struct {
  355                     char                ccb[16];
  356                 } atapi;
  357             } u;
  358             caddr_t             data;
  359             int                 count;
  360             int                 flags;
  361 #define ATA_CMD_CONTROL                 0x01
  362 #define ATA_CMD_READ                    0x02
  363 #define ATA_CMD_WRITE                   0x04
  364 #define ATA_CMD_ATAPI                   0x08
  365 
  366             int                 timeout;
  367             int                 error;
  368         } request;
  369 
  370         struct raid_setup {
  371             int                 type;
  372 #define AR_RAID0                        1
  373 #define AR_RAID1                        2
  374 #define AR_SPAN                         4
  375 
  376             int                 total_disks;
  377             int                 disks[16];
  378             int                 interleave;
  379             int                 unit;
  380         } raid_setup;
  381 
  382         struct raid_status {
  383             int                 type;
  384             int                 total_disks;
  385             int                 disks[16];
  386             int                 interleave;
  387             int                 status;
  388 #define AR_READY                        1
  389 #define AR_DEGRADED                     2
  390 #define AR_REBUILDING                   4
  391 
  392             int                 progress;
  393         } raid_status;
  394 
  395         struct {
  396             int                 disk;
  397         } raid_spare;
  398 
  399         struct {
  400             int                 fan;
  401             int                 temp;
  402             int                 v05;
  403             int                 v12;
  404         } enclosure;
  405     } u;
  406 };
  407 
  408 #define IOCATA                  _IOWR('a',  1, struct ata_cmd)
  409 
  410 #endif /* _SYS_ATA_H_ */

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