Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/sys/dpt.h
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1 /* 2 * Copyright (c) 1997 by Simon Shapiro 3 * All Rights Reserved 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions, and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 */ 30 31 /* 32 * 33 * dpt.h: Definitions and constants used by the SCSI side of the DPT 34 * 35 * credits: Mike Neuffer; DPT low level code and in other areas as well. 36 * Mark Salyzyn; Many vital bits of info and diagnostics. 37 * Justin Gibbs; FreeBSD API, debugging and style 38 * Ron McDaniels; SCSI Software Interrupts 39 * FreeBSD.ORG; Great O/S to work on and for. 40 */ 41 42 43 #ident "$FreeBSD: src/sys/sys/dpt.h,v 1.2.2.2 1999/09/05 08:22:14 peter Exp $" 44 45 #ifndef _DPT_H 46 #define _DPT_H 47 48 #include <sys/ioccom.h> 49 50 #ifdef DEVFS 51 #include <sys/devfsext.h> 52 #ifdef SLICE 53 #include <sys/device.h> 54 #include <dev/slice/slice.h> 55 #endif /* SLICE */ 56 #endif 57 58 #define DPT_CDEV_MAJOR 88 59 60 #undef DPT_USE_DLM_SWI 61 62 extern u_long dpt_unit; 63 64 #define DPT_RELEASE 1 65 #define DPT_VERSION 4 66 #define DPT_PATCH 3 67 #define DPT_MONTH 6 68 #define DPT_DAY 1 69 #define DPT_YEAR 18 /* 1998 - 1980 */ 70 71 #define DPT_CTL_RELEASE 1 72 #define DPT_CTL_VERSION 0 73 #define DPT_CTL_PATCH 5 74 75 #ifndef PAGESIZ 76 #define PAGESIZ 4096 77 #endif 78 79 #ifndef physaddr 80 typedef void *physaddr; 81 #endif 82 83 #undef DPT_INQUIRE_DEVICES /* We have no buyers for this function */ 84 #define DPT_SUPPORT_POLLING /* Use polled mode at boot (must be ON!) */ 85 #define DPT_OPENNINGS 8 /* Commands-in-progress per device */ 86 87 #define DPT_RETRIES 5 /* Times to retry failed commands */ 88 #undef DPT_DISABLE_SG 89 #define DPT_HAS_OPEN 90 91 /* Arguments to dpt_run_queue() can be: */ 92 93 #define DPT_MAX_TARGET_MODE_BUFFER_SIZE 8192 94 #define DPT_FREE_LIST_INCREMENT 64 95 #define DPT_CMD_LEN 12 96 #define DPT_MAX_SEGS 1024 /* How many segments do we want in 97 * a Scatter/Gather list? 98 * Some HBA's can do 16, 99 * Some 8192. Since we 100 * pre-allocate them in fixed 101 * increments, we need to put a 102 * practical limit on these. A 103 * passed parameter (from 104 * kernel boot or lkm) will help 105 */ 106 107 /* Debug levels */ 108 109 #undef DPT_DEBUG_PCI 110 #undef DPT_DEBUG_INIT 111 #undef DPT_DEBUG_SETUP 112 #undef DPT_DEBUG_STATES 113 #undef DPT_DEBUG_CONFIG 114 #undef DPT_DEBUG_QUEUES 115 #undef DPT_DEBUG_SCSI_CMD 116 #undef DPT_DEBUG_SOFTINTR 117 #undef DPT_DEBUG_HARDINTR 118 #undef DPT_DEBUG_HEX_DUMPS 119 #undef DPT_DEBUG_POLLING 120 #undef DPT_DEBUG_INQUIRE 121 #undef DPT_DEBUG_COMPLETION 122 #undef DPT_DEBUG_COMPLETION_ERRORS 123 #define DPT_DEBUG_MINPHYS 124 #undef DPT_DEBUG_SG 125 #undef DPT_DEBUG_SG_SHOW_DATA 126 #undef DPT_DEBUG_SCSI_CMD_NAME 127 #undef DPT_DEBUG_CONTROL 128 #undef DPT_DEBUG_TIMEOUTS 129 #undef DPT_DEBUG_SHUTDOWN 130 #define DPT_DEBUG_USER_CMD 131 132 /* 133 * Misc. definitions 134 */ 135 #undef TRUE 136 #undef FALSE 137 #define TRUE 1 138 #define FALSE 0 139 140 #define MAX_CHANNELS 3 141 #define MAX_TARGETS 16 142 #define MAX_LUNS 8 143 144 /* Map minor numbers to device identity */ 145 #define TARGET_MASK 0x000f 146 #define BUS_MASK 0x0030 147 #define HBA_MASK 0x01c0 148 #define LUN_MASK 0x0e00 149 150 #define minor2target(minor) ( minor & TARGET_MASK ) 151 #define minor2bus(minor) ( (minor & BUS_MASK) >> 4 ) 152 #define minor2hba(minor) ( (minor & HBA_MASK) >> 6 ) 153 #define minor2lun(minor) ( (minor & LUN_MASK) >> 9 ) 154 155 /* 156 * Valid values for cache_type 157 */ 158 #define DPT_NO_CACHE 0 159 #define DPT_CACHE_WRITETHROUGH 1 160 #define DPT_CACHE_WRITEBACK -2 161 162 #define min(a,b) ((a<b)?(a):(b)) 163 164 #define MAXISA 4 165 #define MAXEISA 16 166 #define MAXPCI 16 167 #define MAXIRQ 16 168 #define MAXTARGET 16 169 170 #define IS_ISA 'I' 171 #define IS_EISA 'E' 172 #define IS_PCI 'P' 173 174 #define BROKEN_INQUIRY 1 175 176 #define BUSMASTER 0xff 177 #define PIO 0xfe 178 179 #define EATA_SIGNATURE 0x41544145 /* little ENDIAN "EATA" */ 180 #define DPT_BLINK_INDICATOR 0x42445054 181 182 #define DPT_ID1 0x12 183 #define DPT_ID2 0x1 184 #define ATT_ID1 0x06 185 #define ATT_ID2 0x94 186 #define ATT_ID3 0x0 187 188 #define NEC_ID1 0x38 189 #define NEC_ID2 0xa3 190 #define NEC_ID3 0x82 191 192 #define DPT_MAX_ADAPTERS 16 193 #define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */ 194 #define MAX_METHOD_2 16 /* Max Devices For Method 2 */ 195 #define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */ 196 197 #define SG_SIZE 64 198 #define SG_SIZE_BIG 252 /* max. 8096 elements, 64k */ 199 200 #define DPT_MAX_RETRIES 2 201 202 #define READ 0 203 #define WRITE 1 204 #define OTHER 2 205 206 #define HD(cmd) ((hostdata *)&(cmd->host->hostdata)) 207 #define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble)) 208 #define SD(host) ((hostdata *)&(host->hostdata)) 209 210 #define BaseRegister(dpt) ((dpt->v_membase == NULL) \ 211 ? (u_int32_t)dpt->io_base \ 212 : (u_int32_t)dpt->v_membase ) 213 214 /* 215 * EATA Command & Register definitions 216 */ 217 218 #define PCI_REG_DPTconfig 0x40 219 #define PCI_REG_PumpModeAddress 0x44 220 #define PCI_REG_PumpModeData 0x48 221 #define PCI_REG_ConfigParam1 0x50 222 #define PCI_REG_ConfigParam2 0x54 223 224 #define EATA_CMD_PIO_SETUPTEST 0xc6 225 #define EATA_CMD_PIO_READ_CONFIG 0xf0 226 #define EATA_CMD_PIO_SET_CONFIG 0xf1 227 #define EATA_CMD_PIO_SEND_CP 0xf2 228 #define EATA_CMD_PIO_RECEIVE_SP 0xf3 229 #define EATA_CMD_PIO_TRUNC 0xf4 230 231 #define EATA_CMD_RESET 0xf9 232 #define EATA_CMD_IMMEDIATE 0xfa 233 234 #define EATA_CMD_DMA_READ_CONFIG 0xfd 235 #define EATA_CMD_DMA_SET_CONFIG 0xfe 236 #define EATA_CMD_DMA_SEND_CP 0xff 237 238 #define ECS_EMULATE_SENSE 0xd4 239 240 /* 241 * Immediate Commands 242 * Beware of this enumeration. Not all commands are in sequence! 243 */ 244 245 enum { 246 EATA_GENERIC_ABORT, 247 EATA_SPECIFIC_RESET, 248 EATA_BUS_RESET, 249 EATA_SPECIFIC_ABORT, 250 EATA_QUIET_INTR, 251 EATA_SMART_ROM_DL_EN, 252 EATA_COLD_BOOT_HBA, /* Only as a last resort */ 253 EATA_FORCE_IO, 254 EATA_SCSI_BUS_OFFLINE, 255 EATA_RESET_MASKED_BUS, 256 EATA_POWER_OFF_WARN 257 } dpt_immediate_cmd; 258 259 #define HA_CTRLREG 0x206 /* control register for HBA */ 260 #define HA_CTRL_DISINT 0x02 /* CTRLREG: disable interrupts */ 261 #define HA_CTRL_RESCPU 0x04 /* CTRLREG: reset processo */ 262 #define HA_CTRL_8HEADS 0x08 /* CTRLREG: set for drives with 263 * >=8 heads 264 * (WD1003 rudimentary :-) */ 265 266 #define HA_WCOMMAND 0x07 /* command register offset */ 267 #define HA_WIFC 0x06 /* immediate command offset */ 268 #define HA_WCODE 0x05 269 #define HA_WCODE2 0x04 270 #define HA_WDMAADDR 0x02 /* DMA address LSB offset */ 271 #define HA_RERROR 0x01 /* Error Register, offset 1 from base */ 272 #define HA_RAUXSTAT 0x08 /* aux status register offset */ 273 #define HA_RSTATUS 0x07 /* status register offset */ 274 #define HA_RDATA 0x00 /* data register (16bit) */ 275 #define HA_WDATA 0x00 /* data register (16bit) */ 276 277 #define HA_ABUSY 0x01 /* aux busy bit */ 278 #define HA_AIRQ 0x02 /* aux IRQ pending bit */ 279 #define HA_SERROR 0x01 /* pr. command ended in error */ 280 #define HA_SMORE 0x02 /* more data soon to come */ 281 #define HA_SCORR 0x04 /* datio_addra corrected */ 282 #define HA_SDRQ 0x08 /* data request active */ 283 #define HA_SSC 0x10 /* seek complete */ 284 #define HA_SFAULT 0x20 /* write fault */ 285 #define HA_SREADY 0x40 /* drive ready */ 286 #define HA_SBUSY 0x80 /* drive busy */ 287 #define HA_SDRDY HA_SSC+HA_SREADY+HA_SDRQ 288 289 /* 290 * Message definitions 291 */ 292 293 enum { 294 HA_NO_ERROR, /* No Error */ 295 HA_ERR_SEL_TO, /* Selection Timeout */ 296 HA_ERR_CMD_TO, /* Command Timeout */ 297 HA_SCSIBUS_RESET, 298 HA_HBA_POWER_UP, /* Initial Controller Power-up */ 299 HA_UNX_BUSPHASE, /* Unexpected Bus Phase */ 300 HA_UNX_BUS_FREE, /* Unexpected Bus Free */ 301 HA_BUS_PARITY, /* Bus Parity Error */ 302 HA_SCSI_HUNG, /* SCSI Hung */ 303 HA_UNX_MSGRJCT, /* Unexpected Message Rejected */ 304 HA_RESET_STUCK, /* SCSI Bus Reset Stuck */ 305 HA_RSENSE_FAIL, /* Auto Request-Sense Failed */ 306 HA_PARITY_ERR, /* Controller Ram Parity Error */ 307 HA_CP_ABORT_NA, /* Abort Message sent to non-active cmd */ 308 HA_CP_ABORTED, /* Abort Message sent to active cmd */ 309 HA_CP_RESET_NA, /* Reset Message sent to non-active cmd */ 310 HA_CP_RESET, /* Reset Message sent to active cmd */ 311 HA_ECC_ERR, /* Controller Ram ECC Error */ 312 HA_PCI_PARITY, /* PCI Parity Error */ 313 HA_PCI_MABORT, /* PCI Master Abort */ 314 HA_PCI_TABORT, /* PCI Target Abort */ 315 HA_PCI_STABORT /* PCI Signaled Target Abort */ 316 } dpt_message; 317 318 #define HA_STATUS_MASK 0x7F 319 #define HA_IDENTIFY_MSG 0x80 320 #define HA_DISCO_RECO 0x40 /* Disconnect/Reconnect */ 321 322 #define DPT_RW_BUFF_HEART 0X00 323 #define DPT_RW_BUFF_DLM 0x02 324 #define DPT_RW_BUFF_ACCESS 0x03 325 326 #define HA_INTR_OFF 1 327 #define HA_INTR_ON 0 328 329 /* This is really a one-time shot through some black magic */ 330 #define DPT_EATA_REVA 0x1c 331 #define DPT_EATA_REVB 0x1e 332 #define DPT_EATA_REVC 0x22 333 #define DPT_EATA_REVZ 0x24 334 335 336 /* IOCTL List */ 337 338 #define DPT_RW_CMD_LEN 32 339 #define DPT_RW_CMD_DUMP_SOFTC "dump softc" 340 #define DPT_RW_CMD_DUMP_SYSINFO "dump sysinfo" 341 #define DPT_RW_CMD_DUMP_METRICS "dump metrics" 342 #define DPT_RW_CMD_CLEAR_METRICS "clear metrics" 343 #define DPT_RW_CMD_SHOW_LED "show LED" 344 345 #define DPT_IOCTL_INTERNAL_METRICS _IOR('D', 1, dpt_perf_t) 346 #define DPT_IOCTL_SOFTC _IOR('D', 2, dpt_user_softc_t) 347 #define DPT_IOCTL_SEND _IOWR('D', 3, eata_pt_t) 348 #define SDI_SEND 0x40044444 /* Observed from dptmgr */ 349 350 /* 351 * Other definitions 352 */ 353 354 #define DPT_HCP_LENGTH(page) (ntohs(*(int16_t *)(void *)(&page[2]))+4) 355 #define DPT_HCP_FIRST(page) (&page[4]) 356 #define DPT_HCP_NEXT(param) (¶m[3 + param[3] + 1]) 357 #define DPT_HCP_CODE(param) (ntohs(*(int16_t *)(void *)param)) 358 359 360 /* Possible return values from dpt_register_buffer() */ 361 362 #define SCSI_TM_READ_BUFFER 0x3c 363 #define SCSI_TM_WRITE_BUFFER 0x3b 364 365 #define SCSI_TM_MODE_MASK 0x07 /* Strip off reserved and LUN */ 366 #define SCSI_TM_LUN_MASK 0xe0 /* Strip off reserved and LUN */ 367 368 typedef enum { 369 SUCCESSFULLY_REGISTERED, 370 DRIVER_DOWN, 371 ALREADY_REGISTERED, 372 REGISTERED_TO_ANOTHER, 373 NOT_REGISTERED, 374 INVALID_UNIT, 375 INVALID_SENDER, 376 INVALID_CALLBACK, 377 NO_RESOURCES 378 } dpt_rb_t; 379 380 typedef enum { 381 REGISTER_BUFFER, 382 RELEASE_BUFFER 383 } dpt_rb_op_t; 384 385 /* 386 * New way for completion routines to reliably copmplete processing. 387 * Should take properly typed dpt_softc_t and dpt_ccb_t, 388 * but interdependencies preclude that. 389 */ 390 typedef void (*ccb_callback)(void *dpt, int bus, void *ccb); 391 392 typedef void (*buff_wr_done)(int unit, \ 393 u_int8_t channel, \ 394 u_int8_t target, \ 395 u_int8_t lun, \ 396 u_int16_t offset, \ 397 u_int16_t length, 398 int result); 399 400 typedef void (*dpt_rec_buff)(int unit, \ 401 u_int8_t channel, \ 402 u_int8_t target, \ 403 u_int8_t lun, \ 404 void *buffer, \ 405 u_int16_t offset, \ 406 u_int16_t length); 407 408 /* HBA's Status port (register) bitmap */ 409 typedef struct reg_bit { /* reading this one will clear the interrupt */ 410 u_int8_t error:1, /* previous command ended in an error */ 411 more:1, /* More DATA coming soon 412 * Poll BSY & DRQ (PIO) 413 */ 414 corr:1, /* 415 * data read was successfully corrected with 416 * ECC 417 */ 418 drq:1, /* data request active */ 419 sc:1, /* seek complete */ 420 fault:1, /* write fault */ 421 ready:1, /* drive ready */ 422 busy:1; /* controller busy */ 423 } dpt_status_reg_t; 424 425 /* HBA's Auxiliary status port (register) bitmap */ 426 typedef struct reg_abit { /* reading this won't clear the interrupt */ 427 u_int8_t abusy:1, /* auxiliary busy */ 428 irq:1, /* set when drive interrupt is asserted */ 429 dummy:6; 430 } dpt_aux_status_t; 431 432 /* The whole Register Set as a structure */ 433 typedef struct eata_register { /* EATA register set */ 434 u_int8_t data_reg[2]; /* R, couldn't figure this one out */ 435 u_int8_t cp_addr[4]; /* W, CP address register */ 436 union { 437 u_int8_t command; /* 438 * W, command code: [read|set] conf, 439 * send CP 440 */ 441 struct reg_bit status; /* R, see register_bit1 */ 442 u_int8_t statusbyte; 443 } ovr; 444 struct reg_abit aux_stat; /* R, see register_bit2 */ 445 }eata_reg_t; 446 447 /* Holds the results of a READ_CONFIGURATION command 448 * Beware of data items which are larger than 1 byte. 449 * these come from the DPT in network order. 450 * On an Intel ``CPU'' they will be upside down and backwards! 451 * The dpt_get_conf function is normally responsible for flipping 452 * Everything back. 453 */ 454 typedef struct get_conf { /* Read Configuration Array */ 455 union { 456 struct { 457 u_int8_t foo_DevType; 458 u_int8_t foo_PageCode; 459 u_int8_t foo_Reserved0; 460 u_int8_t foo_len; 461 } foo; 462 u_int32_t foo_length; /* Should return 0x22, 0x24, etc */ 463 } bar; 464 465 #define gcs_length bar.foo_length 466 #define gcs_PageCode bar.foo.foo_DevType 467 #define gcs_reserved0 bar.foo.foo_Reserved0 468 #define gcs_len bar.foo.foo_len 469 470 u_int32_t signature; /* Signature MUST be "EATA". ntohl()`ed */ 471 472 u_int8_t version2:4, 473 version:4; /* EATA Version level */ 474 475 u_int8_t OCS_enabled:1, /* Overlap Command Support enabled */ 476 TAR_support:1, /* SCSI Target Mode supported */ 477 TRNXFR:1, /* 478 * Truncate Transfer Cmd not necessary Only 479 * used in PIO Mode 480 */ 481 MORE_support:1, /* MORE supported (only PIO Mode) */ 482 DMA_support:1, /* DMA supported Driver uses only this mode */ 483 DMA_valid:1, /* DRQ value in Byte 30 is valid */ 484 ATA:1, /* ATA device connected (not supported) */ 485 HAA_valid:1; /* Hostadapter Address is valid */ 486 487 u_int16_t cppadlen; /* 488 * Number of pad bytes send after CD data set 489 * to zero for DMA commands. Ntohl()`ed 490 */ 491 u_int8_t scsi_idS; /* SCSI ID of controller 2-0 Byte 0 res. */ 492 u_int8_t scsi_id2; /* If not, zero is returned */ 493 u_int8_t scsi_id1; 494 u_int8_t scsi_id0; 495 u_int32_t cplen; /* CP length: number of valid cp bytes */ 496 497 u_int32_t splen; /* 498 * Number of bytes returned after we receive 499 * SP command 500 */ 501 u_int16_t queuesiz; /* max number of queueable CPs */ 502 503 u_int16_t dummy; 504 u_int16_t SGsiz; /* max number of SG table entrie */ 505 506 u_int8_t IRQ:4, /* IRQ used this HBA */ 507 IRQ_TR:1, /* IRQ Trigger: 0=edge, 1=level */ 508 SECOND:1, /* This is a secondary controller */ 509 DMA_channel:2; /* DRQ index, DRQ is 2comp of DRQX */ 510 511 u_int8_t sync; /* 512 * device at ID 7 tru 0 is running in 513 * synchronous mode, this will disappear 514 */ 515 u_int8_t DSBLE:1, /* ISA i/o addressing is disabled */ 516 FORCADR:1, /* i/o address has been forced */ 517 SG_64K:1, 518 SG_UAE:1,:4; 519 520 u_int8_t MAX_ID:5, /* Max number of SCSI target IDs */ 521 MAX_CHAN:3; /* Number of SCSI busses on HBA */ 522 523 u_int8_t MAX_LUN; /* Max number of LUNs */ 524 u_int8_t :3, 525 AUTOTRM:1, 526 M1_inst:1, 527 ID_qest:1, /* Raidnum ID is questionable */ 528 is_PCI:1, /* HBA is PCI */ 529 is_EISA:1; /* HBA is EISA */ 530 531 u_int8_t RAIDNUM; /* unique HBA identifier */ 532 u_int8_t unused[4]; /* When doing PIO, you GET 512 bytes */ 533 534 /* >>------>> End of The DPT structure <<------<< */ 535 536 u_int32_t length; /* True length, after ntohl conversion */ 537 } dpt_conf_t; 538 539 /* Scatter-Gather list entry */ 540 typedef struct dpt_sg_segment { 541 u_int32_t seg_addr; /* Network order physaddr Comes BEFORE length! */ 542 u_int32_t seg_len; 543 } dpt_sg_t; 544 545 546 /* Status Packet */ 547 typedef struct eata_sp { 548 u_int8_t hba_stat:7, /* HBA status */ 549 EOC:1; /* True if command finished */ 550 551 u_int8_t scsi_stat; /* Target SCSI status */ 552 553 u_int8_t reserved[2]; 554 555 u_int32_t residue_len; /* Number of bytes not transferred */ 556 557 void *ccb; /* ``Just a signature'' */ 558 559 u_int8_t sp_ID_Message; 560 u_int8_t sp_Que_Message; 561 u_int8_t sp_Tag_Message; 562 u_int8_t msg[9]; 563 } dpt_sp_t; 564 565 /* 566 * A strange collection of O/S-Hardware releated bits and pieces. 567 * Used by the dpt_ioctl() entry point to return DPT_SYSINFO command. 568 */ 569 570 typedef struct dpt_drive_parameters { 571 u_int16_t cylinders; /* Up to 1024 */ 572 u_int8_t heads; /* Up to 255 */ 573 u_int8_t sectors; /* Up to 63 */ 574 } dpt_drive_t; 575 576 typedef struct driveParam_S driveParam_T; 577 578 #define SI_CMOS_Valid 0x0001 579 #define SI_NumDrivesValid 0x0002 580 #define SI_ProcessorValid 0x0004 581 #define SI_MemorySizeValid 0x0008 582 #define SI_DriveParamsValid 0x0010 583 #define SI_SmartROMverValid 0x0020 584 #define SI_OSversionValid 0x0040 585 #define SI_OSspecificValid 0x0080 586 #define SI_BusTypeValid 0x0100 587 588 #define SI_ALL_VALID 0x0FFF 589 #define SI_NO_SmartROM 0x8000 590 591 #define SI_ISA_BUS 0x00 592 #define SI_MCA_BUS 0x01 593 #define SI_EISA_BUS 0x02 594 #define SI_PCI_BUS 0x04 595 596 #define HBA_BUS_ISA 0x00 597 #define HBA_BUS_EISA 0x01 598 #define HBA_BUS_PCI 0x02 599 600 typedef struct dpt_sysinfo { 601 u_int8_t drive0CMOS; /* CMOS Drive 0 Type */ 602 u_int8_t drive1CMOS; /* CMOS Drive 1 Type */ 603 u_int8_t numDrives; /* 0040:0075 contents */ 604 u_int8_t processorFamily; /* Same as DPTSIG definition */ 605 u_int8_t processorType; /* Same as DPTSIG definition */ 606 u_int8_t smartROMMajorVersion; 607 u_int8_t smartROMMinorVersion; /* SmartROM version */ 608 u_int8_t smartROMRevision; 609 u_int16_t flags; /* See bit definitions above */ 610 u_int16_t conventionalMemSize; /* in KB */ 611 u_int32_t extendedMemSize; /* in KB */ 612 u_int32_t osType; /* Same as DPTSIG definition */ 613 u_int8_t osMajorVersion; 614 u_int8_t osMinorVersion; /* The OS version */ 615 u_int8_t osRevision; 616 u_int8_t osSubRevision; 617 u_int8_t busType; /* See defininitions above */ 618 u_int8_t pad[3]; /* For alignment */ 619 dpt_drive_t drives[16]; /* SmartROM Logical Drives */ 620 } dpt_sysinfo_t; 621 622 /* SEND_COMMAND packet structure */ 623 typedef struct eata_ccb { /* Send Command Packet structure */ 624 u_int8_t SCSI_Reset:1, /* Cause a SCSI Bus reset on the cmd */ 625 HBA_Init:1, /* Cause Controller to reinitialize */ 626 Auto_Req_Sen:1, /* Do Auto Request Sense on errors */ 627 scatter:1, /* Data Ptr points to a SG Packet */ 628 Quick:1, /* Set this one for NO Status PAcket */ 629 Interpret:1, /* Interpret the SCSI cdb of own use */ 630 DataOut:1, /* Data Out phase with command */ 631 DataIn:1; /* Data In phase with command */ 632 633 u_int8_t reqlen; /* Request Sense Length, if Auto_Req_Sen=1 */ 634 u_int8_t unused[3]; 635 u_int8_t FWNEST:1, /* send cmd to phys RAID component */ 636 unused2:7; 637 638 u_int8_t Phsunit:1, /* physical unit on mirrored pair */ 639 I_AT:1, /* inhibit address translation */ 640 Disable_Cache:1, /* HBA inhibit caching */ 641 unused3:5; 642 643 u_int8_t cp_id:5, /* SCSI Device ID of target */ 644 cp_channel:3; /* SCSI Channel # of HBA */ 645 646 u_int8_t cp_LUN:3, 647 :2, 648 cp_luntar:1, /* CP is for target ROUTINE */ 649 cp_dispri:1, /* Grant disconnect privilege */ 650 cp_identify:1; /* Always TRUE */ 651 652 u_int8_t cp_msg[3]; /* Message bytes 0-3 */ 653 654 union { 655 struct { 656 u_int8_t x_scsi_cmd; /* Partial SCSI CDB def */ 657 658 u_int8_t x_extent:1, 659 x_bytchk:1, 660 x_reladr:1, 661 x_cmplst:1, 662 x_fmtdata:1, 663 x_lun:3; 664 665 u_int8_t x_page; 666 u_int8_t reserved4; 667 u_int8_t x_len; 668 u_int8_t x_link:1; 669 u_int8_t x_flag:1; 670 u_int8_t reserved5:4; 671 u_int8_t x_vendor:2; 672 } x; 673 u_int8_t z[12]; /* Command Descriptor Block (= 12) */ 674 } cp_w; 675 676 #define cp_cdb cp_w.z 677 #define cp_scsi_cmd cp_w.x.x_scsi_cmd 678 #define cp_extent cp_w.x.x_extent 679 #define cp_lun cp_w.x.x_lun 680 #define cp_page cp_w.x.x_page 681 #define cp_len cp_w.x.x_len 682 683 #define MULTIFUNCTION_CMD 0x0e /* SCSI Multi Function Cmd */ 684 #define BUS_QUIET 0x04 /* Quite Scsi Bus Code */ 685 #define BUS_UNQUIET 0x05 /* Un Quiet Scsi Bus Code */ 686 687 u_int32_t cp_datalen; /* Data Transfer Length. If scatter=1 len (IN 688 * BYTES!) of the S/G array */ 689 690 u_int32_t cp_viraddr; /* address of this ccb (unique tag) */ 691 u_int32_t cp_dataDMA; /* Data Address, if scatter=1 then it is the 692 * address of scatter packet */ 693 u_int32_t cp_statDMA; /* address for Status Packet */ 694 u_int32_t cp_reqDMA; /* 695 * Request Sense Address, used if CP command 696 * ends with error 697 */ 698 u_int8_t CP_OpCode; 699 700 } eata_ccb_t; 701 702 /* 703 * DPT Signature Structure. 704 * Used by /dev/dpt to directly pass commands to the HBA 705 * We hae more information here than we care for... 706 */ 707 708 /* Current Signature Version - sigBYTE dsSigVersion; */ 709 #define SIG_VERSION 1 710 711 /* 712 * Processor Family - sigBYTE dsProcessorFamily; DISTINCT VALUE 713 * 714 * What type of processor the file is meant to run on. 715 * This will let us know whether to read sigWORDs as high/low or low/high. 716 */ 717 #define PROC_INTEL 0x00 /* Intel 80x86 */ 718 #define PROC_MOTOROLA 0x01 /* Motorola 68K */ 719 #define PROC_MIPS4000 0x02 /* MIPS RISC 4000 */ 720 #define PROC_ALPHA 0x03 /* DEC Alpha */ 721 722 /* 723 * Specific Minimim Processor - sigBYTE dsProcessor; FLAG BITS 724 * 725 * Different bit definitions dependent on processor_family 726 */ 727 728 /* PROC_INTEL: */ 729 #define PROC_8086 0x01 /* Intel 8086 */ 730 #define PROC_286 0x02 /* Intel 80286 */ 731 #define PROC_386 0x04 /* Intel 80386 */ 732 #define PROC_486 0x08 /* Intel 80486 */ 733 #define PROC_PENTIUM 0x10 /* Intel 586 aka P5 aka Pentium */ 734 #define PROC_P6 0x20 /* Intel 686 aka P6 */ 735 736 /* PROC_MOTOROLA: */ 737 #define PROC_68000 0x01 /* Motorola 68000 */ 738 #define PROC_68020 0x02 /* Motorola 68020 */ 739 #define PROC_68030 0x04 /* Motorola 68030 */ 740 #define PROC_68040 0x08 /* Motorola 68040 */ 741 742 /* Filetype - sigBYTE dsFiletype; DISTINCT VALUES */ 743 #define FT_EXECUTABLE 0 /* Executable Program */ 744 #define FT_SCRIPT 1 /* Script/Batch File??? */ 745 #define FT_HBADRVR 2 /* HBA Driver */ 746 #define FT_OTHERDRVR 3 /* Other Driver */ 747 #define FT_IFS 4 /* Installable Filesystem Driver */ 748 #define FT_ENGINE 5 /* DPT Engine */ 749 #define FT_COMPDRVR 6 /* Compressed Driver Disk */ 750 #define FT_LANGUAGE 7 /* Foreign Language file */ 751 #define FT_FIRMWARE 8 /* Downloadable or actual Firmware */ 752 #define FT_COMMMODL 9 /* Communications Module */ 753 #define FT_INT13 10 /* INT 13 style HBA Driver */ 754 #define FT_HELPFILE 11 /* Help file */ 755 #define FT_LOGGER 12 /* Event Logger */ 756 #define FT_INSTALL 13 /* An Install Program */ 757 #define FT_LIBRARY 14 /* Storage Manager Real-Mode Calls */ 758 #define FT_RESOURCE 15 /* Storage Manager Resource File */ 759 #define FT_MODEM_DB 16 /* Storage Manager Modem Database */ 760 761 /* Filetype flags - sigBYTE dsFiletypeFlags; FLAG BITS */ 762 #define FTF_DLL 0x01 /* Dynamic Link Library */ 763 #define FTF_NLM 0x02 /* Netware Loadable Module */ 764 #define FTF_OVERLAYS 0x04 /* Uses overlays */ 765 #define FTF_DEBUG 0x08 /* Debug version */ 766 #define FTF_TSR 0x10 /* TSR */ 767 #define FTF_SYS 0x20 /* DOS Lodable driver */ 768 #define FTF_PROTECTED 0x40 /* Runs in protected mode */ 769 #define FTF_APP_SPEC 0x80 /* Application Specific */ 770 771 /* OEM - sigBYTE dsOEM; DISTINCT VALUES */ 772 #define OEM_DPT 0 /* DPT */ 773 #define OEM_ATT 1 /* ATT */ 774 #define OEM_NEC 2 /* NEC */ 775 #define OEM_ALPHA 3 /* Alphatronix */ 776 #define OEM_AST 4 /* AST */ 777 #define OEM_OLIVETTI 5 /* Olivetti */ 778 #define OEM_SNI 6 /* Siemens/Nixdorf */ 779 780 /* Operating System - sigLONG dsOS; FLAG BITS */ 781 #define OS_DOS 0x00000001 /* PC/MS-DOS */ 782 #define OS_WINDOWS 0x00000002 /* Microsoft Windows 3.x */ 783 #define OS_WINDOWS_NT 0x00000004 /* Microsoft Windows NT */ 784 #define OS_OS2M 0x00000008 /* OS/2 1.2.x,MS 1.3.0,IBM 1.3.x */ 785 #define OS_OS2L 0x00000010 /* Microsoft OS/2 1.301 - LADDR */ 786 #define OS_OS22x 0x00000020 /* IBM OS/2 2.x */ 787 #define OS_NW286 0x00000040 /* Novell NetWare 286 */ 788 #define OS_NW386 0x00000080 /* Novell NetWare 386 */ 789 #define OS_GEN_UNIX 0x00000100 /* Generic Unix */ 790 #define OS_SCO_UNIX 0x00000200 /* SCO Unix */ 791 #define OS_ATT_UNIX 0x00000400 /* ATT Unix */ 792 #define OS_UNIXWARE 0x00000800 /* UnixWare Unix */ 793 #define OS_INT_UNIX 0x00001000 /* Interactive Unix */ 794 #define OS_SOLARIS 0x00002000 /* SunSoft Solaris */ 795 #define OS_QNX 0x00004000 /* QNX for Tom Moch */ 796 #define OS_NEXTSTEP 0x00008000 /* NeXTSTEP */ 797 #define OS_BANYAN 0x00010000 /* Banyan Vines */ 798 #define OS_OLIVETTI_UNIX 0x00020000 /* Olivetti Unix */ 799 #define OS_FREEBSD 0x00040000 /* FreeBSD 2.2 and later */ 800 #define OS_OTHER 0x80000000 /* Other */ 801 802 /* Capabilities - sigWORD dsCapabilities; FLAG BITS */ 803 #define CAP_RAID0 0x0001 /* RAID-0 */ 804 #define CAP_RAID1 0x0002 /* RAID-1 */ 805 #define CAP_RAID3 0x0004 /* RAID-3 */ 806 #define CAP_RAID5 0x0008 /* RAID-5 */ 807 #define CAP_SPAN 0x0010 /* Spanning */ 808 #define CAP_PASS 0x0020 /* Provides passthrough */ 809 #define CAP_OVERLAP 0x0040 /* Passthrough supports overlapped commands */ 810 #define CAP_ASPI 0x0080 /* Supports ASPI Command Requests */ 811 #define CAP_ABOVE16MB 0x0100 /* ISA Driver supports greater than 16MB */ 812 #define CAP_EXTEND 0x8000 /* Extended info appears after description */ 813 814 /* Devices Supported - sigWORD dsDeviceSupp; FLAG BITS */ 815 #define DEV_DASD 0x0001 /* DASD (hard drives) */ 816 #define DEV_TAPE 0x0002 /* Tape drives */ 817 #define DEV_PRINTER 0x0004 /* Printers */ 818 #define DEV_PROC 0x0008 /* Processors */ 819 #define DEV_WORM 0x0010 /* WORM drives */ 820 #define DEV_CDROM 0x0020 /* CD-ROM drives */ 821 #define DEV_SCANNER 0x0040 /* Scanners */ 822 #define DEV_OPTICAL 0x0080 /* Optical Drives */ 823 #define DEV_JUKEBOX 0x0100 /* Jukebox */ 824 #define DEV_COMM 0x0200 /* Communications Devices */ 825 #define DEV_OTHER 0x0400 /* Other Devices */ 826 #define DEV_ALL 0xFFFF /* All SCSI Devices */ 827 828 /* Adapters Families Supported - sigWORD dsAdapterSupp; FLAG BITS */ 829 #define ADF_2001 0x0001 /* PM2001 */ 830 #define ADF_2012A 0x0002 /* PM2012A */ 831 #define ADF_PLUS_ISA 0x0004 /* PM2011,PM2021 */ 832 #define ADF_PLUS_EISA 0x0008 /* PM2012B,PM2022 */ 833 #define ADF_SC3_ISA 0x0010 /* PM2021 */ 834 #define ADF_SC3_EISA 0x0020 /* PM2022,PM2122, etc */ 835 #define ADF_SC3_PCI 0x0040 /* SmartCache III PCI */ 836 #define ADF_SC4_ISA 0x0080 /* SmartCache IV ISA */ 837 #define ADF_SC4_EISA 0x0100 /* SmartCache IV EISA */ 838 #define ADF_SC4_PCI 0x0200 /* SmartCache IV PCI */ 839 #define ADF_ALL_MASTER 0xFFFE /* All bus mastering */ 840 #define ADF_ALL_CACHE 0xFFFC /* All caching */ 841 #define ADF_ALL 0xFFFF /* ALL DPT adapters */ 842 843 /* Application - sigWORD dsApplication; FLAG BITS */ 844 #define APP_DPTMGR 0x0001 /* DPT Storage Manager */ 845 #define APP_ENGINE 0x0002 /* DPT Engine */ 846 #define APP_SYTOS 0x0004 /* Sytron Sytos Plus */ 847 #define APP_CHEYENNE 0x0008 /* Cheyenne ARCServe + ARCSolo */ 848 #define APP_MSCDEX 0x0010 /* Microsoft CD-ROM extensions */ 849 #define APP_NOVABACK 0x0020 /* NovaStor Novaback */ 850 #define APP_AIM 0x0040 /* Archive Information Manager */ 851 852 /* Requirements - sigBYTE dsRequirements; FLAG BITS */ 853 #define REQ_SMARTROM 0x01 /* Requires SmartROM to be present */ 854 #define REQ_DPTDDL 0x02 /* Requires DPTDDL.SYS to be loaded */ 855 #define REQ_HBA_DRIVER 0x04 /* Requires an HBA driver to be loaded */ 856 #define REQ_ASPI_TRAN 0x08 /* Requires an ASPI Transport Modules */ 857 #define REQ_ENGINE 0x10 /* Requires a DPT Engine to be loaded */ 858 #define REQ_COMM_ENG 0x20 /* Requires a DPT Communications Engine */ 859 860 typedef struct dpt_sig { 861 char dsSignature[6]; /* ALWAYS "dPtSiG" */ 862 u_int8_t SigVersion; /* signature version (currently 1) */ 863 u_int8_t ProcessorFamily;/* what type of processor */ 864 u_int8_t Processor; /* precise processor */ 865 u_int8_t Filetype; /* type of file */ 866 u_int8_t FiletypeFlags; /* flags to specify load type, etc. */ 867 u_int8_t OEM; /* OEM file was created for */ 868 u_int32_t OS; /* which Operating systems */ 869 u_int16_t Capabilities; /* RAID levels, etc. */ 870 u_int16_t DeviceSupp; /* Types of SCSI devices supported */ 871 u_int16_t AdapterSupp; /* DPT adapter families supported */ 872 u_int16_t Application; /* applications file is for */ 873 u_int8_t Requirements; /* Other driver dependencies */ 874 u_int8_t Version; /* 1 */ 875 u_int8_t Revision; /* 'J' */ 876 u_int8_t SubRevision; /* '9' ' ' if N/A */ 877 u_int8_t Month; /* creation month */ 878 u_int8_t Day; /* creation day */ 879 u_int8_t Year; /* creation year since 1980 */ 880 char *Description; /* description (NULL terminated) */ 881 } dpt_sig_t; 882 883 /* 32 bytes minimum - with no description. Put NULL at description[0] */ 884 /* 81 bytes maximum - with 49 character description plus NULL. */ 885 886 /* This line added at Roycroft's request */ 887 /* Microsoft's NT compiler gets confused if you do a pack and don't */ 888 /* restore it. */ 889 890 typedef struct eata_pass_through { 891 u_int8_t eataID[4]; 892 u_int32_t command; 893 894 #define EATAUSRCMD (('D'<<8)|65) /* EATA PassThrough Command */ 895 #define DPT_SIGNATURE (('D'<<8)|67) /* Get Signature Structure */ 896 #define DPT_NUMCTRLS (('D'<<8)|68) /* Get Number Of DPT Adapters */ 897 #define DPT_CTRLINFO (('D'<<8)|69) /* Get Adapter Info Structure */ 898 #define DPT_SYSINFO (('D'<<8)|72) /* Get System Info Structure */ 899 #define DPT_BLINKLED (('D'<<8)|75) /* Get The BlinkLED Status */ 900 901 u_int8_t *command_buffer; 902 eata_ccb_t command_packet; 903 u_int32_t timeout; 904 u_int8_t host_status; 905 u_int8_t target_status; 906 u_int8_t retries; 907 } eata_pt_t; 908 909 typedef struct dpt_ccb { 910 TAILQ_ENTRY(dpt_ccb) links; 911 912 struct scsi_xfer *xs; /* the scsi_xfer for this cmd */ 913 u_int32_t flags; 914 u_int32_t state; 915 916 /* we need these two for user commands and target mode */ 917 #define DPT_CCB_STATE_NEW 0x00000000 918 919 #define DPT_CCB_STATE_MARKED_LOST 0x01000000 920 #define DPT_CCB_STATE_MARKED_SALVAGED 0x02000000 921 922 #define DPT_CCB_STATE_ABORTED 0x20000000 923 #define DPT_CCB_STATE_DONE 0x40000000 924 #define DPT_CCB_STATE_COMPLETED 0x80000000 925 926 #ifdef DPT_ABORT_LOSERS 927 #define DPT_CCB_STATE_MARKED_LOST 0x00000400 928 #endif 929 930 struct scsi_sense_data sense_data; 931 eata_ccb_t eata_ccb; 932 u_int32_t timeout; 933 u_int8_t retries; 934 u_int8_t status; /* status of this queueslot */ 935 u_int8_t *cmd; /* address of cmd */ 936 dpt_sg_t *sg_list; 937 volatile dpt_sp_t status_packet; 938 u_int8_t status_reg; 939 u_int8_t aux_status_reg; 940 941 u_int32_t transaction_id; 942 ccb_callback std_callback; 943 buff_wr_done wrbuff_callback; 944 u_int32_t result; 945 caddr_t data; 946 947 #ifdef DPT_MEASURE_PERFORMANCE 948 u_int32_t submitted_time; 949 struct timeval command_started, command_ended; 950 #endif 951 } dpt_ccb_t; 952 953 /* 954 * This is provided for compatability with UnixWare only. 955 * Some of the fields may be bogus. 956 * Others may have a totally different meaning. 957 */ 958 959 typedef struct dpt_scsi_ha { 960 u_int32_t ha_state; /* Operational state */ 961 u_int8_t ha_id[MAX_CHANNELS]; /* Host adapter SCSI ids */ 962 int ha_vect; /* Interrupt vector number */ 963 int32_t ha_base; /* Base I/O address */ 964 int ha_max_jobs; /* Max number of Active Jobs */ 965 int ha_cache:2; /* Cache parameters */ 966 int ha_cachesize:30;/* In meg, only if cache present*/ 967 int ha_nbus; /* Number Of Busses on HBA */ 968 int ha_ntargets; /* Number Of Targets Supported */ 969 int ha_nluns; /* Number Of LUNs Supported */ 970 int ha_tshift; /* Shift value for target */ 971 int ha_bshift; /* Shift value for bus */ 972 int ha_npend; /* # of jobs sent to HBA */ 973 int ha_active_jobs; /* Number Of Active Jobs */ 974 char ha_fw_version[4];/* Firmware Revision Level */ 975 void *ha_ccb; /* Controller command blocks */ 976 void *ha_cblist; /* Command block free list */ 977 void *ha_dev; /* Logical unit queues */ 978 void *ha_StPkt_lock; /* Status Packet Lock */ 979 void *ha_ccb_lock; /* CCB Lock */ 980 void *ha_LuQWaiting; /* Lu Queue Waiting List */ 981 void *ha_QWait_lock; /* Device Que Waiting Lock */ 982 int ha_QWait_opri; /* Saved Priority Level */ 983 #ifdef DPT_TARGET_MODE 984 dpt_ccb_t *target_ccb[MAX_CHANNELS]; /* Command block waiting writebuf */ 985 #endif 986 } dpt_compat_ha_t; 987 988 /* 989 * Describe the Inquiry Data returned on Page 0 from the Adapter. The 990 * Page C1 Inquiry Data is described in the DptConfig_t structure above. 991 */ 992 typedef struct { 993 u_int8_t deviceType; 994 u_int8_t rm_dtq; 995 u_int8_t otherData[6]; 996 u_int8_t vendor[8]; 997 u_int8_t modelNum[16]; 998 u_int8_t firmware[4]; 999 u_int8_t protocol[4]; 1000 } dpt_inq_t; 1001 1002 /* 1003 * sp_EOC is not `safe', so I will check sp_Messages[0] instead! 1004 */ 1005 #define DptStat_BUSY(x) ((x)->sp_ID_Message) 1006 #define DptStat_Reset_BUSY(x) \ 1007 ( (x)->msg[0] = 0xA5, (x)->EOC = 0, \ 1008 (x)->ccb = (struct eata_ccb *)NULL ) 1009 1010 #ifdef DPT_MEASURE_PERFORMANCE 1011 #define BIG_ENOUGH 0x8fffffff 1012 typedef struct dpt_metrics { 1013 u_int32_t command_count[256]; /* We assume MAX 256 SCSI commands */ 1014 u_int32_t max_command_time[256]; 1015 u_int32_t min_command_time[256]; 1016 1017 u_int32_t min_intr_time; 1018 u_int32_t max_intr_time; 1019 u_int32_t aborted_interrupts; 1020 u_int32_t spurious_interrupts; 1021 1022 u_int32_t max_waiting_count; 1023 u_int32_t max_submit_count; 1024 u_int32_t max_complete_count; 1025 1026 u_int32_t min_waiting_time; 1027 u_int32_t min_submit_time; 1028 u_int32_t min_complete_time; 1029 1030 u_int32_t max_waiting_time; 1031 u_int32_t max_submit_time; 1032 u_int32_t max_complete_time; 1033 1034 u_int32_t command_collisions; 1035 u_int32_t command_too_busy; 1036 u_int32_t max_eata_tries; 1037 u_int32_t min_eata_tries; 1038 1039 u_int32_t read_by_size_count[10]; 1040 u_int32_t write_by_size_count[10]; 1041 u_int32_t read_by_size_min_time[10]; 1042 u_int32_t read_by_size_max_time[10]; 1043 u_int32_t write_by_size_min_time[10]; 1044 u_int32_t write_by_size_max_time[10]; 1045 1046 #define SIZE_512 0 1047 #define SIZE_1K 1 1048 #define SIZE_2K 2 1049 #define SIZE_4K 3 1050 #define SIZE_8K 4 1051 #define SIZE_16K 5 1052 #define SIZE_32K 6 1053 #define SIZE_64K 7 1054 #define SIZE_BIGGER 8 1055 #define SIZE_OTHER 9 1056 1057 struct timeval intr_started; 1058 } dpt_perf_t; 1059 #endif 1060 1061 /* Main state machine and interface structure */ 1062 1063 typedef struct dpt_softc { 1064 int unit; /* 1065 * Are we /dev/dpt0. /dev/dpt1, etc? 1066 * (Controller number) 1067 */ 1068 1069 u_int32_t handle_interrupts:1, /* Are we ready for real work? */ 1070 target_mode_enabled:1, 1071 spare:30; 1072 1073 TAILQ_ENTRY(dpt_softc) links; 1074 1075 int total_ccbs_count; 1076 int free_ccbs_count; 1077 int waiting_ccbs_count; 1078 int submitted_ccbs_count; 1079 int completed_ccbs_count; 1080 1081 u_int32_t queue_status; 1082 u_int32_t free_lock; 1083 u_int32_t waiting_lock; 1084 u_int32_t submitted_lock; 1085 u_int32_t completed_lock; 1086 1087 #define DPT_QUEUES_NONE_ACTIVE 0x00000000 1088 #define DPT_FREE_QUEUE_ACTIVE 0x00000001 1089 #define DPT_WAITING_QUEUE_ACTIVE 0x00000002 1090 #define DPT_SUBMITTED_QUEUE_ACTIVE 0x00000004 1091 #define DPT_COMPLETED_QUEUE_ACTIVE 0x00000008 1092 #define DPT_SINTR_ACTIVE 0x00000010 1093 1094 TAILQ_HEAD(, dpt_ccb) free_ccbs; 1095 TAILQ_HEAD(, dpt_ccb) waiting_ccbs; 1096 TAILQ_HEAD(, dpt_ccb) submitted_ccbs; 1097 TAILQ_HEAD(, dpt_ccb) completed_ccbs; 1098 1099 u_int32_t commands_processed; 1100 u_int32_t lost_interrupts; 1101 1102 /* 1103 * These three parameters can be used to allow for wide scsi, and 1104 * for host adapters that support multiple busses The first two 1105 * should be set to 1 more than the actual max id or lun (i.e. 8 for 1106 * normal systems). 1107 * 1108 * There is a FAT assumption here; We assume that these will never 1109 * exceed MAX_CHANNELS, MAX_TARGETS, MAX_LUNS 1110 */ 1111 u_int8_t channels; /* # of avail scsi chan. */ 1112 u_int32_t max_id; 1113 u_int32_t max_lun; 1114 1115 u_int16_t io_base; 1116 volatile u_int8_t *v_membase; 1117 volatile u_int8_t *p_membase; 1118 1119 u_int8_t irq; 1120 u_int8_t dma_channel; 1121 1122 /* Up to 4 (3 really) busses per controller. */ 1123 struct scsi_link sc_scsi_link[4]; 1124 1125 /* 1126 * Every object on a unit can have a receiver, if it treats us as a target. 1127 * We do that so that separate and independant clients can consume received 1128 * buffers. 1129 */ 1130 1131 #define DPT_RW_BUFFER_SIZE (8 * 1024) 1132 dpt_ccb_t *target_ccb[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS]; 1133 u_int8_t *rw_buffer[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS]; 1134 dpt_rec_buff buffer_receiver[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS]; 1135 1136 dpt_inq_t board_data; 1137 u_int8_t EATA_revision; 1138 u_int8_t bustype; /* bustype of HBA */ 1139 u_int32_t state; /* state of HBA */ 1140 1141 #define DPT_HA_FREE 0x00000000 1142 #define DPT_HA_OK 0x00000000 1143 #define DPT_HA_NO_TIMEOUT 0x00000000 1144 #define DPT_HA_BUSY 0x00000001 1145 #define DPT_HA_TIMEOUT 0x00000002 1146 #define DPT_HA_RESET 0x00000004 1147 #define DPT_HA_LOCKED 0x00000008 1148 #define DPT_HA_ABORTED 0x00000010 1149 #define DPT_HA_CONTROL_ACTIVE 0x00000020 1150 #define DPT_HA_SHUTDOWN_ACTIVE 0x00000040 1151 #define DPT_HA_COMMAND_ACTIVE 0x00000080 1152 #define DPT_HA_QUIET 0x00000100 1153 1154 #ifdef DPT_LOST_IRQ 1155 #define DPT_LOST_IRQ_SET 0x10000000 1156 #define DPT_LOST_IRQ_ACTIVE 0x20000000 1157 #endif 1158 1159 #ifdef DPT_HANDLE_TIMEOUTS 1160 #define DPT_HA_TIMEOUTS_SET 0x40000000 1161 #define DPT_HA_TIMEOUTS_ACTIVE 0x80000000 1162 #endif 1163 1164 u_int8_t primary; /* true if primary */ 1165 1166 u_int8_t more_support:1, /* HBA supports MORE flag */ 1167 immediate_support:1, /* HBA supports IMMEDIATE */ 1168 broken_INQUIRY:1, /* EISA HBA w/broken INQUIRY */ 1169 spare2:5; 1170 1171 u_int8_t resetlevel[MAX_CHANNELS]; 1172 u_int32_t last_ccb; /* Last used ccb */ 1173 u_int32_t cplen; /* size of CP in words */ 1174 u_int16_t cppadlen; /* pad length of cp */ 1175 u_int16_t queuesize; 1176 u_int16_t sgsize; /* Entries in the SG list */ 1177 u_int8_t hostid[MAX_CHANNELS]; /* SCSI ID of HBA */ 1178 u_int32_t cache_type:2, 1179 cache_size:30; 1180 1181 volatile dpt_sp_t sp; /* status packet */ 1182 1183 /* We put ALL conditional elements at the tail for the structure. 1184 * If we do not, then userland code will crash or trash based on which 1185 * kernel it is running with. 1186 * This isi most visible with usr/sbin/dpt_softc(8) 1187 */ 1188 1189 #ifdef DEVFS 1190 void *devfs_data_token; 1191 void *devfs_ctl_token; 1192 #endif 1193 #ifdef DPT_MEASURE_PERFORMANCE 1194 dpt_perf_t performance; 1195 #endif 1196 1197 } dpt_softc_t; 1198 1199 /* This structure is used to pass dpt_softc contents to userland via the 1200 * ioctl DPT_IOCTL_SOFTC. 1201 * the reason for this maddness, is that FreeBSD (all BSDs ?) chose to 1202 * actually assign a nasty meaning to the IOCTL word, encoding 13 bits of it as 1203 * size. As dpt_softc_t is somewhere between 8,594 and 8,600 (depends on 1204 * options), we have to copy the data to something less than 4KB long. 1205 * This siliness also solves the problem of varying definition of dpt_softc_t, 1206 * As the variants are exluded from dpt_user_softc. 1207 * 1208 * See dpt_softc_t abover for enumerations, comments and such. 1209 */ 1210 1211 typedef struct dpt_user_softc { 1212 int unit; 1213 u_int32_t handle_interrupts:1, /* Are we ready for real work? */ 1214 target_mode_enabled:1, 1215 spare:30; 1216 1217 int total_ccbs_count; 1218 int free_ccbs_count; 1219 int waiting_ccbs_count; 1220 int submitted_ccbs_count; 1221 int completed_ccbs_count; 1222 1223 u_int32_t queue_status; 1224 u_int32_t free_lock; 1225 u_int32_t waiting_lock; 1226 u_int32_t submitted_lock; 1227 u_int32_t completed_lock; 1228 1229 u_int32_t commands_processed; 1230 u_int32_t lost_interrupts; 1231 1232 u_int8_t channels; 1233 u_int32_t max_id; 1234 u_int32_t max_lun; 1235 1236 u_int16_t io_base; 1237 u_int8_t *v_membase; 1238 u_int8_t *p_membase; 1239 1240 u_int8_t irq; 1241 u_int8_t dma_channel; 1242 1243 dpt_inq_t board_data; 1244 u_int8_t EATA_revision; 1245 u_int8_t bustype; 1246 u_int32_t state; 1247 1248 u_int8_t primary; 1249 u_int8_t more_support:1, 1250 immediate_support:1, 1251 broken_INQUIRY:1, 1252 spare2:5; 1253 1254 u_int8_t resetlevel[MAX_CHANNELS]; 1255 u_int32_t last_ccb; 1256 u_int32_t cplen; 1257 u_int16_t cppadlen; 1258 u_int16_t queuesize; 1259 u_int16_t sgsize; 1260 u_int8_t hostid[MAX_CHANNELS]; 1261 u_int32_t cache_type:2, 1262 cache_size:30; 1263 } dpt_user_softc_t; 1264 1265 /* 1266 * Externals: 1267 * These all come from dpt_scsi.c 1268 * 1269 */ 1270 1271 /* 1272 * This function substracts one timval structure from another, 1273 * Returning the result in usec. 1274 * It assumes that less than 4 billion usecs passed form start to end. 1275 * If times are sensless, ~0 is returned. 1276 */ 1277 1278 static __inline u_int32_t 1279 dpt_time_delta(struct timeval start, 1280 struct timeval end) 1281 { 1282 if (start.tv_sec > end.tv_sec) 1283 return(~0); 1284 1285 if ( (start.tv_sec == end.tv_sec) && (start.tv_usec > end.tv_usec) ) 1286 return(~0); 1287 1288 return ( (end.tv_sec - start.tv_sec) * 1000000 + 1289 (end.tv_usec - start.tv_usec) ); 1290 } 1291 #ifndef _DPT_C_ 1292 1293 extern TAILQ_HEAD(, dpt_softc) dpt_softc_list; 1294 1295 extern int dpt_controllers_present; 1296 extern void hex_dump(u_char * data, int length, 1297 char *name, int no); 1298 extern char *i2bin(unsigned int no, int length); 1299 extern char *scsi_cmd_name(u_int8_t cmd); 1300 1301 extern dpt_conf_t *dpt_get_conf(dpt_softc_t *dpt, u_int8_t page, 1302 u_int8_t target, u_int8_t size, 1303 int extent); 1304 1305 extern void dpt_intr(void *arg); 1306 extern int dpt_setup(dpt_softc_t * dpt, dpt_conf_t * conf); 1307 extern int dpt_attach(dpt_softc_t * dpt); 1308 extern void dpt_shutdown(int howto, dpt_softc_t *dpt); 1309 extern void dpt_detect_cache(dpt_softc_t *dpt); 1310 1311 extern int dpt_user_cmd(dpt_softc_t *dpt, eata_pt_t *user_cmd, 1312 caddr_t cmdarg, int minor_no); 1313 1314 extern u_int8_t dpt_blinking_led(dpt_softc_t *dpt); 1315 1316 extern dpt_rb_t dpt_register_buffer(int unit, 1317 u_int8_t channel, 1318 u_int8_t target, 1319 u_int8_t lun, 1320 u_int8_t mode, 1321 u_int16_t length, 1322 u_int16_t offset, 1323 dpt_rec_buff callback, 1324 dpt_rb_op_t op); 1325 1326 extern int dpt_send_buffer(int unit, 1327 u_int8_t channel, 1328 u_int8_t target, 1329 u_int8_t lun, 1330 u_int8_t mode, 1331 u_int16_t length, 1332 u_int16_t offset, 1333 void *data, 1334 buff_wr_done callback); 1335 1336 1337 #endif /* _DPT_C_ */ 1338 1339 #endif /* _DPT_H */ 1340
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