The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/sys/machintr.h

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    1 /*
    2  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
    3  * 
    4  * This code is derived from software contributed to The DragonFly Project
    5  * by Matthew Dillon <dillon@backplane.com>
    6  * 
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in
   15  *    the documentation and/or other materials provided with the
   16  *    distribution.
   17  * 3. Neither the name of The DragonFly Project nor the names of its
   18  *    contributors may be used to endorse or promote products derived
   19  *    from this software without specific, prior written permission.
   20  * 
   21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
   22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
   23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
   24  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
   25  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
   26  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
   27  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   28  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
   29  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
   30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
   31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   32  * SUCH DAMAGE.
   33  * 
   34  * $DragonFly: src/sys/sys/machintr.h,v 1.7 2007/04/30 16:46:01 dillon Exp $
   35  */
   36 /*
   37  * This module defines the ABI for the machine-independant cpu interrupt
   38  * vector and masking layer.
   39  */
   40 
   41 #ifndef _SYS_MACHINTR_H_
   42 #define _SYS_MACHINTR_H_
   43 
   44 #ifdef _KERNEL
   45 
   46 #ifndef _SYS_BUS_H_
   47 #include <sys/bus.h>
   48 #endif
   49 
   50 struct rman;
   51 
   52 enum machintr_type { MACHINTR_GENERIC, MACHINTR_ICU, MACHINTR_IOAPIC };
   53 
   54 #define MACHINTR_VECTOR_SETUP           1
   55 #define MACHINTR_VECTOR_TEARDOWN        2
   56 
   57 /*
   58  * Machine interrupt ABIs - registered at boot-time
   59  */
   60 struct machintr_abi {
   61     enum machintr_type type;
   62 
   63     void        (*intr_disable)(int intr);      /* hardware disable intr */
   64     void        (*intr_enable)(int intr);       /* hardware enable intr */
   65     void        (*intr_setup)(int intr, int flags);
   66                                                 /* setup intr */
   67     void        (*intr_teardown)(int intr);     /* tear down intr */
   68 
   69     void        (*legacy_intr_config)           /* config legacy intr */
   70                 (int intr, enum intr_trigger trig, enum intr_polarity pola);
   71     int         (*legacy_intr_cpuid)(int intr); /* legacy intr target cpu */
   72     int         (*legacy_intr_find)             /* find legacy intr */
   73                 (int intr, enum intr_trigger trig, enum intr_polarity pola);
   74     int         (*legacy_intr_find_bygsi)       /* find legacy intr by GSI */
   75                 (int gsi, enum intr_trigger trig, enum intr_polarity pola);
   76 
   77     int         (*msi_alloc)                    /* alloc count MSIs on cpu */
   78                 (int intrs[], int count, int cpuid);
   79     void        (*msi_release)                  /* release count MSIs on cpu */
   80                 (const int intrs[], int count, int cpuid);
   81     void        (*msi_map)                      /* addr/data for MSI on cpu */
   82                 (int intr, uint64_t *addr, uint32_t *data, int cpuid);
   83     int         (*msix_alloc)                   /* alloc one MSI-X on cpu */
   84                 (int *intr, int cpuid);
   85     void        (*msix_release)                 /* release one MSI-X on cpu */
   86                 (int intr, int cpuid);
   87 
   88     void        (*finalize)(void);              /* final before ints enabled */
   89     void        (*cleanup)(void);               /* cleanup */
   90     void        (*setdefault)(void);            /* set default vectors */
   91     void        (*stabilize)(void);             /* stable before ints enabled */
   92     void        (*initmap)(void);               /* init irq mapping */
   93     void        (*rman_setup)(struct rman *rm); /* setup rman */
   94 };
   95 
   96 #define machintr_intr_enable(intr)      MachIntrABI.intr_enable(intr)
   97 #define machintr_intr_disable(intr)     MachIntrABI.intr_disable(intr)
   98 #define machintr_intr_setup(intr, flags) \
   99             MachIntrABI.intr_setup((intr), (flags))
  100 #define machintr_intr_teardown(intr) \
  101             MachIntrABI.intr_teardown((intr))
  102 
  103 #define machintr_legacy_intr_config(intr, trig, pola) \
  104             MachIntrABI.legacy_intr_config((intr), (trig), (pola))
  105 #define machintr_legacy_intr_cpuid(intr) \
  106             MachIntrABI.legacy_intr_cpuid((intr))
  107 
  108 #define machintr_legacy_intr_find(intr, trig, pola) \
  109             MachIntrABI.legacy_intr_find((intr), (trig), (pola))
  110 #define machintr_legacy_intr_find_bygsi(gsi, trig, pola) \
  111             MachIntrABI.legacy_intr_find_bygsi((gsi), (trig), (pola))
  112 
  113 extern struct machintr_abi MachIntrABI;
  114 
  115 #endif  /* _KERNEL */
  116 
  117 #endif  /* _SYS_MACHINTR_H_ */

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