The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/sys/pmc.h

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    1 /*-
    2  * Copyright (c) 2003-2005, Joseph Koshy
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  *
   26  * $FreeBSD$
   27  */
   28 
   29 #ifndef _SYS_PMC_H_
   30 #define _SYS_PMC_H_
   31 
   32 #include <dev/hwpmc/pmc_events.h>
   33 
   34 #include <machine/pmc_mdep.h>
   35 #include <machine/profile.h>
   36 
   37 #define PMC_MODULE_NAME         "hwpmc"
   38 #define PMC_NAME_MAX            16 /* HW counter name size */
   39 #define PMC_CLASS_MAX           4  /* #classes of PMCs in a system */
   40 
   41 /*
   42  * Kernel<->userland API version number [MMmmpppp]
   43  *
   44  * Major numbers are to be incremented when an incompatible change to
   45  * the ABI occurs that older clients will not be able to handle.
   46  *
   47  * Minor numbers are incremented when a backwards compatible change
   48  * occurs that allows older correct programs to run unchanged.  For
   49  * example, when support for a new PMC type is added.
   50  *
   51  * The patch version is incremented for every bug fix.
   52  */
   53 #define PMC_VERSION_MAJOR       0x01
   54 #define PMC_VERSION_MINOR       0x02
   55 #define PMC_VERSION_PATCH       0x0003
   56 
   57 #define PMC_VERSION             (PMC_VERSION_MAJOR << 24 |              \
   58         PMC_VERSION_MINOR << 16 | PMC_VERSION_PATCH)
   59 
   60 /*
   61  * Kinds of CPUs known
   62  */
   63 
   64 #define __PMC_CPUS()                                    \
   65         __PMC_CPU(AMD_K7,     "AMD K7")                 \
   66         __PMC_CPU(AMD_K8,     "AMD K8")                 \
   67         __PMC_CPU(INTEL_P5,   "Intel Pentium")          \
   68         __PMC_CPU(INTEL_P6,   "Intel Pentium Pro")      \
   69         __PMC_CPU(INTEL_CL,   "Intel Celeron")          \
   70         __PMC_CPU(INTEL_PII,  "Intel Pentium II")       \
   71         __PMC_CPU(INTEL_PIII, "Intel Pentium III")      \
   72         __PMC_CPU(INTEL_PM,   "Intel Pentium M")        \
   73         __PMC_CPU(INTEL_PIV,  "Intel Pentium IV")
   74 
   75 enum pmc_cputype {
   76 #undef  __PMC_CPU
   77 #define __PMC_CPU(S,D)  PMC_CPU_##S ,
   78         __PMC_CPUS()
   79 };
   80 
   81 #define PMC_CPU_FIRST   PMC_CPU_AMD_K7
   82 #define PMC_CPU_LAST    PMC_CPU_INTEL_PIV
   83 
   84 /*
   85  * Classes of PMCs
   86  */
   87 
   88 #define __PMC_CLASSES()                                                 \
   89         __PMC_CLASS(TSC)        /* CPU Timestamp counter */             \
   90         __PMC_CLASS(K7)         /* AMD K7 performance counters */       \
   91         __PMC_CLASS(K8)         /* AMD K8 performance counters */       \
   92         __PMC_CLASS(P5)         /* Intel Pentium counters */            \
   93         __PMC_CLASS(P6)         /* Intel Pentium Pro counters */        \
   94         __PMC_CLASS(P4)         /* Intel Pentium-IV counters */
   95 
   96 enum pmc_class {
   97 #undef  __PMC_CLASS
   98 #define __PMC_CLASS(N)  PMC_CLASS_##N ,
   99         __PMC_CLASSES()
  100 };
  101 
  102 #define PMC_CLASS_FIRST PMC_CLASS_TSC
  103 #define PMC_CLASS_LAST  PMC_CLASS_P4
  104 
  105 /*
  106  * A PMC can be in the following states:
  107  *
  108  * Hardware states:
  109  *   DISABLED   -- administratively prohibited from being used.
  110  *   FREE       -- HW available for use
  111  * Software states:
  112  *   ALLOCATED  -- allocated
  113  *   STOPPED    -- allocated, but not counting events
  114  *   RUNNING    -- allocated, and in operation; 'pm_runcount'
  115  *                 holds the number of CPUs using this PMC at
  116  *                 a given instant
  117  *   DELETED    -- being destroyed
  118  */
  119 
  120 #define __PMC_HWSTATES()                        \
  121         __PMC_STATE(DISABLED)                   \
  122         __PMC_STATE(FREE)
  123 
  124 #define __PMC_SWSTATES()                        \
  125         __PMC_STATE(ALLOCATED)                  \
  126         __PMC_STATE(STOPPED)                    \
  127         __PMC_STATE(RUNNING)                    \
  128         __PMC_STATE(DELETED)
  129 
  130 #define __PMC_STATES()                          \
  131         __PMC_HWSTATES()                        \
  132         __PMC_SWSTATES()
  133 
  134 enum pmc_state {
  135 #undef  __PMC_STATE
  136 #define __PMC_STATE(S)  PMC_STATE_##S,
  137         __PMC_STATES()
  138         __PMC_STATE(MAX)
  139 };
  140 
  141 #define PMC_STATE_FIRST PMC_STATE_DISABLED
  142 #define PMC_STATE_LAST  PMC_STATE_DELETED
  143 
  144 /*
  145  * An allocated PMC may used as a 'global' counter or as a
  146  * 'thread-private' one.  Each such mode of use can be in either
  147  * statistical sampling mode or in counting mode.  Thus a PMC in use
  148  *
  149  * SS i.e., SYSTEM STATISTICAL  -- system-wide statistical profiling
  150  * SC i.e., SYSTEM COUNTER      -- system-wide counting mode
  151  * TS i.e., THREAD STATISTICAL  -- thread virtual, statistical profiling
  152  * TC i.e., THREAD COUNTER      -- thread virtual, counting mode
  153  *
  154  * Statistical profiling modes rely on the PMC periodically delivering
  155  * a interrupt to the CPU (when the configured number of events have
  156  * been measured), so the PMC must have the ability to generate
  157  * interrupts.
  158  *
  159  * In counting modes, the PMC counts its configured events, with the
  160  * value of the PMC being read whenever needed by its owner process.
  161  *
  162  * The thread specific modes "virtualize" the PMCs -- the PMCs appear
  163  * to be thread private and count events only when the profiled thread
  164  * actually executes on the CPU.
  165  *
  166  * The system-wide "global" modes keep the PMCs running all the time
  167  * and are used to measure the behaviour of the whole system.
  168  */
  169 
  170 #define __PMC_MODES()                           \
  171         __PMC_MODE(SS,  0)                      \
  172         __PMC_MODE(SC,  1)                      \
  173         __PMC_MODE(TS,  2)                      \
  174         __PMC_MODE(TC,  3)
  175 
  176 enum pmc_mode {
  177 #undef  __PMC_MODE
  178 #define __PMC_MODE(M,N) PMC_MODE_##M = N,
  179         __PMC_MODES()
  180 };
  181 
  182 #define PMC_MODE_FIRST  PMC_MODE_SS
  183 #define PMC_MODE_LAST   PMC_MODE_TC
  184 
  185 #define PMC_IS_COUNTING_MODE(mode)                              \
  186         ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC)
  187 #define PMC_IS_SYSTEM_MODE(mode)                                \
  188         ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC)
  189 #define PMC_IS_SAMPLING_MODE(mode)                              \
  190         ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS)
  191 #define PMC_IS_VIRTUAL_MODE(mode)                               \
  192         ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC)
  193 
  194 /*
  195  * PMC row disposition
  196  */
  197 
  198 #define __PMC_DISPOSITIONS(N)                                   \
  199         __PMC_DISP(STANDALONE)  /* global/disabled counters */  \
  200         __PMC_DISP(FREE)        /* free/available */            \
  201         __PMC_DISP(THREAD)      /* thread-virtual PMCs */       \
  202         __PMC_DISP(UNKNOWN)     /* sentinel */
  203 
  204 enum pmc_disp {
  205 #undef  __PMC_DISP
  206 #define __PMC_DISP(D)   PMC_DISP_##D ,
  207         __PMC_DISPOSITIONS()
  208 };
  209 
  210 #define PMC_DISP_FIRST  PMC_DISP_STANDALONE
  211 #define PMC_DISP_LAST   PMC_DISP_THREAD
  212 
  213 /*
  214  * Counter capabilities
  215  *
  216  * __PMC_CAPS(NAME, VALUE, DESCRIPTION)
  217  */
  218 
  219 #define __PMC_CAPS()                                                    \
  220         __PMC_CAP(INTERRUPT,    0, "generate interrupts")               \
  221         __PMC_CAP(USER,         1, "count user-mode events")            \
  222         __PMC_CAP(SYSTEM,       2, "count system-mode events")          \
  223         __PMC_CAP(EDGE,         3, "do edge detection of events")       \
  224         __PMC_CAP(THRESHOLD,    4, "ignore events below a threshold")   \
  225         __PMC_CAP(READ,         5, "read PMC counter")                  \
  226         __PMC_CAP(WRITE,        6, "reprogram PMC counter")             \
  227         __PMC_CAP(INVERT,       7, "invert comparision sense")          \
  228         __PMC_CAP(QUALIFIER,    8, "further qualify monitored events")  \
  229         __PMC_CAP(PRECISE,      9, "perform precise sampling")          \
  230         __PMC_CAP(TAGGING,      10, "tag upstream events")              \
  231         __PMC_CAP(CASCADE,      11, "cascade counters")
  232 
  233 enum pmc_caps
  234 {
  235 #undef  __PMC_CAP
  236 #define __PMC_CAP(NAME, VALUE, DESCR)   PMC_CAP_##NAME = (1 << VALUE) ,
  237         __PMC_CAPS()
  238 };
  239 
  240 #define PMC_CAP_FIRST           PMC_CAP_INTERRUPT
  241 #define PMC_CAP_LAST            PMC_CAP_CASCADE
  242 
  243 /*
  244  * PMC Event Numbers
  245  *
  246  * These are generated from the definitions in "dev/hwpmc/pmc_events.h".
  247  */
  248 
  249 enum pmc_event {
  250 #undef  __PMC_EV
  251 #define __PMC_EV(C,N,D) PMC_EV_ ## C ## _ ## N ,
  252         __PMC_EVENTS()
  253 };
  254 
  255 #define PMC_EVENT_FIRST PMC_EV_TSC_TSC
  256 #define PMC_EVENT_LAST  PMC_EV_P5_LAST
  257 
  258 /*
  259  * PMC SYSCALL INTERFACE
  260  */
  261 
  262 /*
  263  * "PMC_OPS" -- these are the commands recognized by the kernel
  264  * module, and are used when performing a system call from userland.
  265  */
  266 
  267 #define __PMC_OPS()                                                     \
  268         __PMC_OP(CONFIGURELOG, "Set log file")                          \
  269         __PMC_OP(FLUSHLOG, "Flush log file")                            \
  270         __PMC_OP(GETCPUINFO, "Get system CPU information")              \
  271         __PMC_OP(GETDRIVERSTATS, "Get driver statistics")               \
  272         __PMC_OP(GETMODULEVERSION, "Get module version")                \
  273         __PMC_OP(GETPMCINFO, "Get per-cpu PMC information")             \
  274         __PMC_OP(PMCADMIN, "Set PMC state")                             \
  275         __PMC_OP(PMCALLOCATE, "Allocate and configure a PMC")           \
  276         __PMC_OP(PMCATTACH, "Attach a PMC to a process")                \
  277         __PMC_OP(PMCDETACH, "Detach a PMC from a process")              \
  278         __PMC_OP(PMCGETMSR, "Get a PMC's hardware address")             \
  279         __PMC_OP(PMCRELEASE, "Release a PMC")                           \
  280         __PMC_OP(PMCRW, "Read/Set a PMC")                               \
  281         __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate")        \
  282         __PMC_OP(PMCSTART, "Start a PMC")                               \
  283         __PMC_OP(PMCSTOP, "Start a PMC")                                \
  284         __PMC_OP(WRITELOG, "Write a cookie to the log file")
  285 
  286 enum pmc_ops {
  287 #undef  __PMC_OP
  288 #define __PMC_OP(N, D)  PMC_OP_##N,
  289         __PMC_OPS()
  290 };
  291 
  292 
  293 /*
  294  * Flags used in operations on PMCs.
  295  */
  296 
  297 #define PMC_F_FORCE             0x00000001 /*OP ADMIN force operation */
  298 #define PMC_F_DESCENDANTS       0x00000002 /*OP ALLOCATE track descendants */
  299 #define PMC_F_LOG_PROCCSW       0x00000004 /*OP ALLOCATE track ctx switches */
  300 #define PMC_F_LOG_PROCEXIT      0x00000008 /*OP ALLOCATE log proc exits */
  301 #define PMC_F_NEWVALUE          0x00000010 /*OP RW write new value */
  302 #define PMC_F_OLDVALUE          0x00000020 /*OP RW get old value */
  303 #define PMC_F_KGMON             0x00000040 /*OP ALLOCATE kgmon(8) profiling */
  304 
  305 /* internal flags */
  306 #define PMC_F_ATTACHED_TO_OWNER 0x00010000 /*attached to owner*/
  307 #define PMC_F_NEEDS_LOGFILE     0x00020000 /*needs log file */
  308 #define PMC_F_ATTACH_DONE       0x00040000 /*attached at least once */
  309 
  310 /*
  311  * Cookies used to denote allocated PMCs, and the values of PMCs.
  312  */
  313 
  314 typedef uint32_t        pmc_id_t;
  315 typedef uint64_t        pmc_value_t;
  316 
  317 #define PMC_ID_INVALID          (~ (pmc_id_t) 0)
  318 
  319 /*
  320  * PMC IDs have the following format:
  321  *
  322  * +--------+----------+-----------+-----------+
  323  * |   CPU  | PMC MODE | PMC CLASS | ROW INDEX |
  324  * +--------+----------+-----------+-----------+
  325  *
  326  * where each field is 8 bits wide.  Field 'CPU' is set to the
  327  * requested CPU for system-wide PMCs or PMC_CPU_ANY for process-mode
  328  * PMCs.  Field 'PMC MODE' is the allocated PMC mode.  Field 'PMC
  329  * CLASS' is the class of the PMC.  Field 'ROW INDEX' is the row index
  330  * for the PMC.
  331  *
  332  * The 'ROW INDEX' ranges over 0..NWPMCS where NHWPMCS is the total
  333  * number of hardware PMCs on this cpu.
  334  */
  335 
  336 
  337 #define PMC_ID_TO_ROWINDEX(ID)  ((ID) & 0xFF)
  338 #define PMC_ID_TO_CLASS(ID)     (((ID) & 0xFF00) >> 8)
  339 #define PMC_ID_TO_MODE(ID)      (((ID) & 0xFF0000) >> 16)
  340 #define PMC_ID_TO_CPU(ID)       (((ID) & 0xFF000000) >> 24)
  341 #define PMC_ID_MAKE_ID(CPU,MODE,CLASS,ROWINDEX)                 \
  342         ((((CPU) & 0xFF) << 24) | (((MODE) & 0xFF) << 16) |     \
  343         (((CLASS) & 0xFF) << 8) | ((ROWINDEX) & 0xFF))
  344 
  345 /*
  346  * Data structures for system calls supported by the pmc driver.
  347  */
  348 
  349 /*
  350  * OP PMCALLOCATE
  351  *
  352  * Allocate a PMC on the named CPU.
  353  */
  354 
  355 #define PMC_CPU_ANY     ~0
  356 
  357 struct pmc_op_pmcallocate {
  358         uint32_t        pm_caps;        /* PMC_CAP_* */
  359         uint32_t        pm_cpu;         /* CPU number or PMC_CPU_ANY */
  360         enum pmc_class  pm_class;       /* class of PMC desired */
  361         enum pmc_event  pm_ev;          /* [enum pmc_event] desired */
  362         uint32_t        pm_flags;       /* additional modifiers PMC_F_* */
  363         enum pmc_mode   pm_mode;        /* desired mode */
  364         pmc_id_t        pm_pmcid;       /* [return] process pmc id */
  365 
  366         union pmc_md_op_pmcallocate pm_md; /* MD layer extensions */
  367 };
  368 
  369 /*
  370  * OP PMCADMIN
  371  *
  372  * Set the administrative state (i.e., whether enabled or disabled) of
  373  * a PMC 'pm_pmc' on CPU 'pm_cpu'.  Note that 'pm_pmc' specifies an
  374  * absolute PMC number and need not have been first allocated by the
  375  * calling process.
  376  */
  377 
  378 struct pmc_op_pmcadmin {
  379         int             pm_cpu;         /* CPU# */
  380         uint32_t        pm_flags;       /* flags */
  381         int             pm_pmc;         /* PMC# */
  382         enum pmc_state  pm_state;       /* desired state */
  383 };
  384 
  385 /*
  386  * OP PMCATTACH / OP PMCDETACH
  387  *
  388  * Attach/detach a PMC and a process.
  389  */
  390 
  391 struct pmc_op_pmcattach {
  392         pmc_id_t        pm_pmc;         /* PMC to attach to */
  393         pid_t           pm_pid;         /* target process */
  394 };
  395 
  396 /*
  397  * OP PMCSETCOUNT
  398  *
  399  * Set the sampling rate (i.e., the reload count) for statistical counters.
  400  * 'pm_pmcid' need to have been previously allocated using PMCALLOCATE.
  401  */
  402 
  403 struct pmc_op_pmcsetcount {
  404         pmc_value_t     pm_count;       /* initial/sample count */
  405         pmc_id_t        pm_pmcid;       /* PMC id to set */
  406 };
  407 
  408 
  409 /*
  410  * OP PMCRW
  411  *
  412  * Read the value of a PMC named by 'pm_pmcid'.  'pm_pmcid' needs
  413  * to have been previously allocated using PMCALLOCATE.
  414  */
  415 
  416 
  417 struct pmc_op_pmcrw {
  418         uint32_t        pm_flags;       /* PMC_F_{OLD,NEW}VALUE*/
  419         pmc_id_t        pm_pmcid;       /* pmc id */
  420         pmc_value_t     pm_value;       /* new&returned value */
  421 };
  422 
  423 
  424 /*
  425  * OP GETPMCINFO
  426  *
  427  * retrieve PMC state for a named CPU.  The caller is expected to
  428  * allocate 'npmc' * 'struct pmc_info' bytes of space for the return
  429  * values.
  430  */
  431 
  432 struct pmc_info {
  433         char            pm_name[PMC_NAME_MAX]; /* pmc name */
  434         enum pmc_class  pm_class;       /* enum pmc_class */
  435         int             pm_enabled;     /* whether enabled */
  436         enum pmc_disp   pm_rowdisp;     /* FREE, THREAD or STANDLONE */
  437         pid_t           pm_ownerpid;    /* owner, or -1 */
  438         enum pmc_mode   pm_mode;        /* current mode [enum pmc_mode] */
  439         enum pmc_event  pm_event;       /* current event */
  440         uint32_t        pm_flags;       /* current flags */
  441         pmc_value_t     pm_reloadcount; /* sampling counters only */
  442 };
  443 
  444 struct pmc_op_getpmcinfo {
  445         int32_t         pm_cpu;         /* 0 <= cpu < mp_maxid */
  446         struct pmc_info pm_pmcs[];      /* space for 'npmc' structures */
  447 };
  448 
  449 
  450 /*
  451  * OP GETCPUINFO
  452  *
  453  * Retrieve system CPU information.
  454  */
  455 
  456 struct pmc_classinfo {
  457         enum pmc_class  pm_class;       /* class id */
  458         uint32_t        pm_caps;        /* counter capabilities */
  459         uint32_t        pm_width;       /* width of the PMC */
  460 };
  461 
  462 struct pmc_op_getcpuinfo {
  463         enum pmc_cputype pm_cputype; /* what kind of CPU */
  464         uint32_t        pm_ncpu;    /* number of CPUs */
  465         uint32_t        pm_npmc;    /* #PMCs per CPU */
  466         uint32_t        pm_nclass;  /* #classes of PMCs */
  467         struct pmc_classinfo  pm_classes[PMC_CLASS_MAX];
  468 };
  469 
  470 /*
  471  * OP CONFIGURELOG
  472  *
  473  * Configure a log file for writing system-wide statistics to.
  474  */
  475 
  476 struct pmc_op_configurelog {
  477         int             pm_flags;
  478         int             pm_logfd;   /* logfile fd (or -1) */
  479 };
  480 
  481 /*
  482  * OP GETDRIVERSTATS
  483  *
  484  * Retrieve pmc(4) driver-wide statistics.
  485  */
  486 
  487 struct pmc_op_getdriverstats {
  488         int     pm_intr_ignored;        /* #interrupts ignored */
  489         int     pm_intr_processed;      /* #interrupts processed */
  490         int     pm_intr_bufferfull;     /* #interrupts with ENOSPC */
  491         int     pm_syscalls;            /* #syscalls */
  492         int     pm_syscall_errors;      /* #syscalls with errors */
  493         int     pm_buffer_requests;     /* #buffer requests */
  494         int     pm_buffer_requests_failed; /* #failed buffer requests */
  495         int     pm_log_sweeps;          /* #sample buffer processing passes */
  496 };
  497 
  498 /*
  499  * OP RELEASE / OP START / OP STOP
  500  *
  501  * Simple operations on a PMC id.
  502  */
  503 
  504 struct pmc_op_simple {
  505         pmc_id_t        pm_pmcid;
  506 };
  507 
  508 /*
  509  * OP WRITELOG
  510  *
  511  * Flush the current log buffer and write 4 bytes of user data to it.
  512  */
  513 
  514 struct pmc_op_writelog {
  515         uint32_t        pm_userdata;
  516 };
  517 
  518 /*
  519  * OP GETMSR
  520  *
  521  * Retrieve the machine specific address assoicated with the allocated
  522  * PMC.  This number can be used subsequently with a read-performance-counter
  523  * instruction.
  524  */
  525 
  526 struct pmc_op_getmsr {
  527         uint32_t        pm_msr;         /* machine specific address */
  528         pmc_id_t        pm_pmcid;       /* allocated pmc id */
  529 };
  530 
  531 #ifdef _KERNEL
  532 
  533 #include <sys/malloc.h>
  534 #include <sys/sysctl.h>
  535 
  536 #define PMC_REQUEST_POOL_SIZE                   32
  537 #define PMC_HASH_SIZE                           16
  538 #define PMC_MTXPOOL_SIZE                        32
  539 #define PMC_LOG_BUFFER_SIZE                     4
  540 #define PMC_NLOGBUFFERS                         16
  541 #define PMC_NSAMPLES                            16
  542 
  543 #define PMC_SYSCTL_NAME_PREFIX "kern." PMC_MODULE_NAME "."
  544 
  545 /*
  546  * Locking keys
  547  *
  548  * (b) - pmc_bufferlist_mtx (spin lock)
  549  * (k) - pmc_kthread_mtx (sleep lock)
  550  * (o) - po->po_mtx (spin lock)
  551  */
  552 
  553 /*
  554  * PMC commands
  555  */
  556 
  557 struct pmc_syscall_args {
  558         uint32_t        pmop_code;      /* one of PMC_OP_* */
  559         void            *pmop_data;     /* syscall parameter */
  560 };
  561 
  562 /*
  563  * Interface to processor specific s1tuff
  564  */
  565 
  566 /*
  567  * struct pmc_descr
  568  *
  569  * Machine independent (i.e., the common parts) of a human readable
  570  * PMC description.
  571  */
  572 
  573 struct pmc_descr {
  574         char            pd_name[PMC_NAME_MAX]; /* name */
  575         uint32_t        pd_caps;        /* capabilities */
  576         enum pmc_class  pd_class;       /* class of the PMC */
  577         uint32_t        pd_width;       /* width in bits */
  578 };
  579 
  580 /*
  581  * struct pmc_target
  582  *
  583  * This structure records all the target processes associated with a
  584  * PMC.
  585  */
  586 
  587 struct pmc_target {
  588         LIST_ENTRY(pmc_target)  pt_next;
  589         struct pmc_process      *pt_process; /* target descriptor */
  590 };
  591 
  592 /*
  593  * struct pmc
  594  *
  595  * Describes each allocated PMC.
  596  *
  597  * Each PMC has precisely one owner, namely the process that allocated
  598  * the PMC.
  599  *
  600  * A PMC may be attached to multiple target processes.  The
  601  * 'pm_targets' field links all the target processes being monitored
  602  * by this PMC.
  603  *
  604  * The 'pm_savedvalue' field is protected by a mutex.
  605  *
  606  * On a multi-cpu machine, multiple target threads associated with a
  607  * process-virtual PMC could be concurrently executing on different
  608  * CPUs.  The 'pm_runcount' field is atomically incremented every time
  609  * the PMC gets scheduled on a CPU and atomically decremented when it
  610  * get descheduled.  Deletion of a PMC is only permitted when this
  611  * field is ''.
  612  *
  613  */
  614 
  615 struct pmc {
  616         LIST_HEAD(,pmc_target)  pm_targets;     /* list of target processes */
  617         LIST_ENTRY(pmc)         pm_next;        /* owner's list */
  618 
  619         /*
  620          * System-wide PMCs are allocated on a CPU and are not moved
  621          * around.  For system-wide PMCs we record the CPU the PMC was
  622          * allocated on in the 'CPU' field of the pmc ID.
  623          *
  624          * Virtual PMCs run on whichever CPU is currently executing
  625          * their targets' threads.  For these PMCs we need to save
  626          * their current PMC counter values when they are taken off
  627          * CPU.
  628          */
  629 
  630         union {
  631                 pmc_value_t     pm_savedvalue;  /* Virtual PMCS */
  632         } pm_gv;
  633 
  634         /*
  635          * For sampling mode PMCs, we keep track of the PMC's "reload
  636          * count", which is the counter value to be loaded in when
  637          * arming the PMC for the next counting session.  For counting
  638          * modes on PMCs that are read-only (e.g., the x86 TSC), we
  639          * keep track of the initial value at the start of
  640          * counting-mode operation.
  641          */
  642 
  643         union {
  644                 pmc_value_t     pm_reloadcount; /* sampling PMC modes */
  645                 pmc_value_t     pm_initial;     /* counting PMC modes */
  646         } pm_sc;
  647 
  648         uint32_t        pm_stalled;     /* true for stalled sampling PMCs */
  649         uint32_t        pm_caps;        /* PMC capabilities */
  650         enum pmc_event  pm_event;       /* event being measured */
  651         uint32_t        pm_flags;       /* additional flags PMC_F_... */
  652         struct pmc_owner *pm_owner;     /* owner thread state */
  653         uint32_t        pm_runcount;    /* #cpus currently on */
  654         enum pmc_state  pm_state;       /* current PMC state */
  655 
  656         /*
  657          * The PMC ID field encodes the row-index for the PMC, its
  658          * mode, class and the CPU# associated with the PMC.
  659          */
  660 
  661         pmc_id_t        pm_id;          /* allocated PMC id */
  662 
  663         /* md extensions */
  664         union pmc_md_pmc        pm_md;
  665 };
  666 
  667 /*
  668  * Accessor macros for 'struct pmc'
  669  */
  670 
  671 #define PMC_TO_MODE(P)          PMC_ID_TO_MODE((P)->pm_id)
  672 #define PMC_TO_CLASS(P)         PMC_ID_TO_CLASS((P)->pm_id)
  673 #define PMC_TO_ROWINDEX(P)      PMC_ID_TO_ROWINDEX((P)->pm_id)
  674 #define PMC_TO_CPU(P)           PMC_ID_TO_CPU((P)->pm_id)
  675 
  676 /*
  677  * struct pmc_process
  678  *
  679  * Record a 'target' process being profiled.
  680  *
  681  * The target process being profiled could be different from the owner
  682  * process which allocated the PMCs.  Each target process descriptor
  683  * is associated with NHWPMC 'struct pmc *' pointers.  Each PMC at a
  684  * given hardware row-index 'n' will use slot 'n' of the 'pp_pmcs[]'
  685  * array.  The size of this structure is thus PMC architecture
  686  * dependent.
  687  *
  688  * TODO: Only process-private counting mode PMCs may be attached to a
  689  * process different from the allocator process (since we do not have
  690  * the infrastructure to make sense of an interrupted PC value from a
  691  * 'target' process (yet)).
  692  *
  693  */
  694 
  695 struct pmc_targetstate {
  696         struct pmc      *pp_pmc;   /* target PMC */
  697         pmc_value_t     pp_pmcval; /* per-process value */
  698 };
  699 
  700 struct pmc_process {
  701         LIST_ENTRY(pmc_process) pp_next;        /* hash chain */
  702         int             pp_refcnt;              /* reference count */
  703         uint32_t        pp_flags;               /* flags PMC_PP_* */
  704         struct proc     *pp_proc;               /* target thread */
  705         struct pmc_targetstate pp_pmcs[];       /* NHWPMCs */
  706 };
  707 
  708 #define PMC_PP_ENABLE_MSR_ACCESS        0x00000001
  709 
  710 /*
  711  * struct pmc_owner
  712  *
  713  * We associate a PMC with an 'owner' process.
  714  *
  715  * A process can be associated with 0..NCPUS*NHWPMC PMCs during its
  716  * lifetime, where NCPUS is the numbers of CPUS in the system and
  717  * NHWPMC is the number of hardware PMCs per CPU.  These are
  718  * maintained in the list headed by the 'po_pmcs' to save on space.
  719  *
  720  */
  721 
  722 struct pmc_owner  {
  723         LIST_ENTRY(pmc_owner)   po_next;        /* hash chain */
  724         LIST_ENTRY(pmc_owner)   po_ssnext;      /* list of SS PMC owners */
  725         LIST_HEAD(, pmc)        po_pmcs;        /* owned PMC list */
  726         TAILQ_HEAD(, pmclog_buffer) po_logbuffers; /* (o) logbuffer list */
  727         struct mtx              po_mtx;         /* spin lock for (o) */
  728         struct proc             *po_owner;      /* owner proc */
  729         uint32_t                po_flags;       /* (k) flags PMC_PO_* */
  730         struct proc             *po_kthread;    /* (k) helper kthread */
  731         struct pmclog_buffer    *po_curbuf;     /* current log buffer */
  732         struct file             *po_file;       /* file reference */
  733         int                     po_error;       /* recorded error */
  734         int                     po_sscount;     /* # SS PMCs owned */
  735 };
  736 
  737 #define PMC_PO_OWNS_LOGFILE             0x00000001 /* has a log file */
  738 #define PMC_PO_IN_FLUSH                 0x00000010 /* in the middle of a flush */
  739 
  740 /*
  741  * struct pmc_hw -- describe the state of the PMC hardware
  742  *
  743  * When in use, a HW PMC is associated with one allocated 'struct pmc'
  744  * pointed to by field 'phw_pmc'.  When inactive, this field is NULL.
  745  *
  746  * On an SMP box, one or more HW PMC's in process virtual mode with
  747  * the same 'phw_pmc' could be executing on different CPUs.  In order
  748  * to handle this case correctly, we need to ensure that only
  749  * incremental counts get added to the saved value in the associated
  750  * 'struct pmc'.  The 'phw_save' field is used to keep the saved PMC
  751  * value at the time the hardware is started during this context
  752  * switch (i.e., the difference between the new (hardware) count and
  753  * the saved count is atomically added to the count field in 'struct
  754  * pmc' at context switch time).
  755  *
  756  */
  757 
  758 struct pmc_hw {
  759         uint32_t        phw_state;      /* see PHW_* macros below */
  760         struct pmc      *phw_pmc;       /* current thread PMC */
  761 };
  762 
  763 #define PMC_PHW_RI_MASK         0x000000FF
  764 #define PMC_PHW_CPU_SHIFT       8
  765 #define PMC_PHW_CPU_MASK        0x0000FF00
  766 #define PMC_PHW_FLAGS_SHIFT     16
  767 #define PMC_PHW_FLAGS_MASK      0xFFFF0000
  768 
  769 #define PMC_PHW_INDEX_TO_STATE(ri)      ((ri) & PMC_PHW_RI_MASK)
  770 #define PMC_PHW_STATE_TO_INDEX(state)   ((state) & PMC_PHW_RI_MASK)
  771 #define PMC_PHW_CPU_TO_STATE(cpu)       (((cpu) << PMC_PHW_CPU_SHIFT) & \
  772         PMC_PHW_CPU_MASK)
  773 #define PMC_PHW_STATE_TO_CPU(state)     (((state) & PMC_PHW_CPU_MASK) >> \
  774         PMC_PHW_CPU_SHIFT)
  775 #define PMC_PHW_FLAGS_TO_STATE(flags)   (((flags) << PMC_PHW_FLAGS_SHIFT) & \
  776         PMC_PHW_FLAGS_MASK)
  777 #define PMC_PHW_STATE_TO_FLAGS(state)   (((state) & PMC_PHW_FLAGS_MASK) >> \
  778         PMC_PHW_FLAGS_SHIFT)
  779 #define PMC_PHW_FLAG_IS_ENABLED         (PMC_PHW_FLAGS_TO_STATE(0x01))
  780 #define PMC_PHW_FLAG_IS_SHAREABLE       (PMC_PHW_FLAGS_TO_STATE(0x02))
  781 
  782 /*
  783  * struct pmc_sample
  784  *
  785  * Space for N (tunable) PC samples and associated control data.
  786  */
  787 
  788 struct pmc_sample {
  789         uintfptr_t              ps_pc;          /* PC value at interrupt */
  790         struct pmc              *ps_pmc;        /* interrupting PMC */
  791         int                     ps_usermode;    /* true for user mode PCs */
  792         pid_t                   ps_pid;         /* process PID or -1 */
  793 };
  794 
  795 struct pmc_samplebuffer {
  796         struct pmc_sample * volatile ps_read;   /* read pointer */
  797         struct pmc_sample * volatile ps_write;  /* write pointer */
  798         struct pmc_sample       *ps_fence;      /* one beyond ps_samples[] */
  799         struct pmc_sample       ps_samples[];   /* array of sample entries */
  800 };
  801 
  802 
  803 /*
  804  * struct pmc_cpustate
  805  *
  806  * A CPU is modelled as a collection of HW PMCs with space for additional
  807  * flags.
  808  */
  809 
  810 struct pmc_cpu {
  811         uint32_t        pc_state;       /* physical cpu number + flags */
  812         struct pmc_samplebuffer *pc_sb; /* space for samples */
  813         struct pmc_hw   *pc_hwpmcs[];   /* 'npmc' pointers */
  814         /* other machine dependent fields come here */
  815 };
  816 
  817 #define PMC_PCPU_CPU_MASK               0x000000FF
  818 #define PMC_PCPU_FLAGS_MASK             0xFFFFFF00
  819 #define PMC_PCPU_FLAGS_SHIFT            8
  820 #define PMC_PCPU_STATE_TO_CPU(S)        ((S) & PMC_PCPU_CPU_MASK)
  821 #define PMC_PCPU_STATE_TO_FLAGS(S)      (((S) & PMC_PCPU_FLAGS_MASK) >> PMC_PCPU_FLAGS_SHIFT)
  822 #define PMC_PCPU_FLAGS_TO_STATE(F)      (((F) << PMC_PCPU_FLAGS_SHIFT) & PMC_PCPU_FLAGS_MASK)
  823 #define PMC_PCPU_CPU_TO_STATE(C)        ((C) & PMC_PCPU_CPU_MASK)
  824 #define PMC_PCPU_FLAG_HTT               (PMC_PCPU_FLAGS_TO_STATE(0x1))
  825 
  826 /*
  827  * struct pmc_binding
  828  *
  829  * CPU binding information.
  830  */
  831 
  832 struct pmc_binding {
  833         int     pb_bound;       /* is bound? */
  834         int     pb_cpu;         /* if so, to which CPU */
  835 };
  836 
  837 /*
  838  * struct pmc_mdep
  839  *
  840  * Machine dependent bits needed per CPU type.
  841  */
  842 
  843 struct pmc_mdep  {
  844         uint32_t        pmd_cputype;    /* from enum pmc_cputype */
  845         uint32_t        pmd_npmc;       /* max PMCs per CPU */
  846         uint32_t        pmd_nclass;     /* # PMC classes supported */
  847         struct pmc_classinfo  pmd_classes[PMC_CLASS_MAX];
  848         int             pmd_nclasspmcs[PMC_CLASS_MAX];
  849 
  850         /*
  851          * Methods
  852          */
  853 
  854         int (*pmd_init)(int _cpu);    /* machine dependent initialization */
  855         int (*pmd_cleanup)(int _cpu); /* machine dependent cleanup  */
  856 
  857         /* thread context switch in/out */
  858         int (*pmd_switch_in)(struct pmc_cpu *_p, struct pmc_process *_pp);
  859         int (*pmd_switch_out)(struct pmc_cpu *_p, struct pmc_process *_pp);
  860 
  861         /* configuring/reading/writing the hardware PMCs */
  862         int (*pmd_config_pmc)(int _cpu, int _ri, struct pmc *_pm);
  863         int (*pmd_get_config)(int _cpu, int _ri, struct pmc **_ppm);
  864         int (*pmd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value);
  865         int (*pmd_write_pmc)(int _cpu, int _ri, pmc_value_t _value);
  866 
  867         /* pmc allocation/release */
  868         int (*pmd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t,
  869                 const struct pmc_op_pmcallocate *_a);
  870         int (*pmd_release_pmc)(int _cpu, int _ri, struct pmc *_pm);
  871 
  872         /* starting and stopping PMCs */
  873         int (*pmd_start_pmc)(int _cpu, int _ri);
  874         int (*pmd_stop_pmc)(int _cpu, int _ri);
  875 
  876         /* handle a PMC interrupt */
  877         int (*pmd_intr)(int _cpu, uintptr_t _pc, int _usermode);
  878 
  879         int (*pmd_describe)(int _cpu, int _ri, struct pmc_info *_pi,
  880                 struct pmc **_ppmc);
  881 
  882         int (*pmd_get_msr)(int _ri, uint32_t *_msr);
  883 
  884 };
  885 
  886 /*
  887  * Per-CPU state.  This is an array of 'mp_ncpu' pointers
  888  * to struct pmc_cpu descriptors.
  889  */
  890 
  891 extern struct pmc_cpu **pmc_pcpu;
  892 extern struct pmc_mdep *md;
  893 
  894 /* driver statistics */
  895 extern struct pmc_op_getdriverstats pmc_stats;
  896 
  897 #if     DEBUG
  898 
  899 /* debug flags, major flag groups */
  900 struct pmc_debugflags {
  901         int     pdb_CPU;
  902         int     pdb_CSW;
  903         int     pdb_LOG;
  904         int     pdb_MDP;
  905         int     pdb_MOD;
  906         int     pdb_OWN;
  907         int     pdb_PMC;
  908         int     pdb_PRC;
  909         int     pdb_SAM;
  910 };
  911 
  912 extern struct pmc_debugflags pmc_debugflags;
  913 
  914 #define PMC_DEBUG_STRSIZE               128
  915 #define PMC_DEBUG_DEFAULT_FLAGS         { 0, 0, 0, 0, 0, 0, 0, 0 }
  916 
  917 #define PMCDBG(M,N,L,F,...) do {                                        \
  918         if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N))      \
  919                 printf(#M ":" #N ":" #L  ": " F "\n", __VA_ARGS__);     \
  920 } while (0)
  921 
  922 /* Major numbers */
  923 #define PMC_DEBUG_MAJ_CPU               0 /* cpu switches */
  924 #define PMC_DEBUG_MAJ_CSW               1 /* context switches */
  925 #define PMC_DEBUG_MAJ_LOG               2 /* logging */
  926 #define PMC_DEBUG_MAJ_MDP               3 /* machine dependent */
  927 #define PMC_DEBUG_MAJ_MOD               4 /* misc module infrastructure */
  928 #define PMC_DEBUG_MAJ_OWN               5 /* owner */
  929 #define PMC_DEBUG_MAJ_PMC               6 /* pmc management */
  930 #define PMC_DEBUG_MAJ_PRC               7 /* processes */
  931 #define PMC_DEBUG_MAJ_SAM               8 /* sampling */
  932 
  933 /* Minor numbers */
  934 
  935 /* Common (8 bits) */
  936 #define PMC_DEBUG_MIN_ALL               0 /* allocation */
  937 #define PMC_DEBUG_MIN_REL               1 /* release */
  938 #define PMC_DEBUG_MIN_OPS               2 /* ops: start, stop, ... */
  939 #define PMC_DEBUG_MIN_INI               3 /* init */
  940 #define PMC_DEBUG_MIN_FND               4 /* find */
  941 
  942 /* MODULE */
  943 #define PMC_DEBUG_MIN_PMH              14 /* pmc_hook */
  944 #define PMC_DEBUG_MIN_PMS              15 /* pmc_syscall */
  945 
  946 /* OWN */
  947 #define PMC_DEBUG_MIN_ORM               8 /* owner remove */
  948 #define PMC_DEBUG_MIN_OMR               9 /* owner maybe remove */
  949 
  950 /* PROCESSES */
  951 #define PMC_DEBUG_MIN_TLK               8 /* link target */
  952 #define PMC_DEBUG_MIN_TUL               9 /* unlink target */
  953 #define PMC_DEBUG_MIN_EXT              10 /* process exit */
  954 #define PMC_DEBUG_MIN_EXC              11 /* process exec */
  955 #define PMC_DEBUG_MIN_FRK              12 /* process fork */
  956 #define PMC_DEBUG_MIN_ATT              13 /* attach/detach */
  957 #define PMC_DEBUG_MIN_SIG              14 /* signalling */
  958 
  959 /* CONTEXT SWITCHES */
  960 #define PMC_DEBUG_MIN_SWI               8 /* switch in */
  961 #define PMC_DEBUG_MIN_SWO               9 /* switch out */
  962 
  963 /* PMC */
  964 #define PMC_DEBUG_MIN_REG               8 /* pmc register */
  965 #define PMC_DEBUG_MIN_ALR               9 /* allocate row */
  966 
  967 /* MACHINE DEPENDENT LAYER */
  968 #define PMC_DEBUG_MIN_REA               8 /* read */
  969 #define PMC_DEBUG_MIN_WRI               9 /* write */
  970 #define PMC_DEBUG_MIN_CFG              10 /* config */
  971 #define PMC_DEBUG_MIN_STA              11 /* start */
  972 #define PMC_DEBUG_MIN_STO              12 /* stop */
  973 #define PMC_DEBUG_MIN_INT              13 /* interrupts */
  974 
  975 /* CPU */
  976 #define PMC_DEBUG_MIN_BND               8 /* bind */
  977 #define PMC_DEBUG_MIN_SEL               9 /* select */
  978 
  979 /* LOG */
  980 #define PMC_DEBUG_MIN_GTB               8 /* get buf */
  981 #define PMC_DEBUG_MIN_SIO               9 /* schedule i/o */
  982 #define PMC_DEBUG_MIN_FLS              10 /* flush */
  983 #define PMC_DEBUG_MIN_SAM              11 /* sample */
  984 
  985 #else
  986 #define PMCDBG(M,N,L,F,...)             /* nothing */
  987 #endif
  988 
  989 /* declare a dedicated memory pool */
  990 MALLOC_DECLARE(M_PMC);
  991 
  992 /*
  993  * Functions
  994  */
  995 
  996 struct pmc_mdep *pmc_md_initialize(void);       /* MD init function */
  997 int     pmc_getrowdisp(int _ri);
  998 int     pmc_process_interrupt(int _cpu, struct pmc *_pm, uintfptr_t _pc,
  999     int _usermode);
 1000 
 1001 #endif /* _KERNEL */
 1002 #endif /* _SYS_PMC_H_ */

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