The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/sys/pmc.h

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    1 /*-
    2  * Copyright (c) 2003-2008, Joseph Koshy
    3  * Copyright (c) 2007 The FreeBSD Foundation
    4  * All rights reserved.
    5  *
    6  * Portions of this software were developed by A. Joseph Koshy under
    7  * sponsorship from the FreeBSD Foundation and Google, Inc.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  *
   30  * $FreeBSD$
   31  */
   32 
   33 #ifndef _SYS_PMC_H_
   34 #define _SYS_PMC_H_
   35 
   36 #include <dev/hwpmc/pmc_events.h>
   37 
   38 #include <machine/pmc_mdep.h>
   39 #include <machine/profile.h>
   40 
   41 #define PMC_MODULE_NAME         "hwpmc"
   42 #define PMC_NAME_MAX            16 /* HW counter name size */
   43 #define PMC_CLASS_MAX           6  /* max #classes of PMCs per-system */
   44 
   45 /*
   46  * Kernel<->userland API version number [MMmmpppp]
   47  *
   48  * Major numbers are to be incremented when an incompatible change to
   49  * the ABI occurs that older clients will not be able to handle.
   50  *
   51  * Minor numbers are incremented when a backwards compatible change
   52  * occurs that allows older correct programs to run unchanged.  For
   53  * example, when support for a new PMC type is added.
   54  *
   55  * The patch version is incremented for every bug fix.
   56  */
   57 #define PMC_VERSION_MAJOR       0x03
   58 #define PMC_VERSION_MINOR       0x01
   59 #define PMC_VERSION_PATCH       0x0000
   60 
   61 #define PMC_VERSION             (PMC_VERSION_MAJOR << 24 |              \
   62         PMC_VERSION_MINOR << 16 | PMC_VERSION_PATCH)
   63 
   64 /*
   65  * Kinds of CPUs known.
   66  *
   67  * We keep track of CPU variants that need to be distinguished in
   68  * some way for PMC operations.  CPU names are grouped by manufacturer
   69  * and numbered sparsely in order to minimize changes to the ABI involved
   70  * when new CPUs are added.
   71  */
   72 
   73 #define __PMC_CPUS()                                            \
   74         __PMC_CPU(AMD_K7,       0x00,   "AMD K7")               \
   75         __PMC_CPU(AMD_K8,       0x01,   "AMD K8")               \
   76         __PMC_CPU(INTEL_P5,     0x80,   "Intel Pentium")        \
   77         __PMC_CPU(INTEL_P6,     0x81,   "Intel Pentium Pro")    \
   78         __PMC_CPU(INTEL_CL,     0x82,   "Intel Celeron")        \
   79         __PMC_CPU(INTEL_PII,    0x83,   "Intel Pentium II")     \
   80         __PMC_CPU(INTEL_PIII,   0x84,   "Intel Pentium III")    \
   81         __PMC_CPU(INTEL_PM,     0x85,   "Intel Pentium M")      \
   82         __PMC_CPU(INTEL_PIV,    0x86,   "Intel Pentium IV")     \
   83         __PMC_CPU(INTEL_CORE,   0x87,   "Intel Core Solo/Duo")  \
   84         __PMC_CPU(INTEL_CORE2,  0x88,   "Intel Core2")          \
   85         __PMC_CPU(INTEL_CORE2EXTREME,   0x89,   "Intel Core2 Extreme")  \
   86         __PMC_CPU(INTEL_ATOM,   0x8A,   "Intel Atom") \
   87         __PMC_CPU(INTEL_COREI7, 0x8B,   "Intel Core i7") \
   88         __PMC_CPU(INTEL_WESTMERE, 0x8C,   "Intel Westmere")
   89 
   90 enum pmc_cputype {
   91 #undef  __PMC_CPU
   92 #define __PMC_CPU(S,V,D)        PMC_CPU_##S = V,
   93         __PMC_CPUS()
   94 };
   95 
   96 #define PMC_CPU_FIRST   PMC_CPU_AMD_K7
   97 #define PMC_CPU_LAST    PMC_CPU_INTEL_WESTMERE
   98 
   99 /*
  100  * Classes of PMCs
  101  */
  102 
  103 #define __PMC_CLASSES()                                                 \
  104         __PMC_CLASS(TSC)        /* CPU Timestamp counter */             \
  105         __PMC_CLASS(K7)         /* AMD K7 performance counters */       \
  106         __PMC_CLASS(K8)         /* AMD K8 performance counters */       \
  107         __PMC_CLASS(P5)         /* Intel Pentium counters */            \
  108         __PMC_CLASS(P6)         /* Intel Pentium Pro counters */        \
  109         __PMC_CLASS(P4)         /* Intel Pentium-IV counters */         \
  110         __PMC_CLASS(IAF)        /* Intel Core2/Atom, fixed function */  \
  111         __PMC_CLASS(IAP)        /* Intel Core...Atom, programmable */   \
  112         __PMC_CLASS(UCF)        /* Intel Uncore fixed function */       \
  113         __PMC_CLASS(UCP)        /* Intel Uncore programmable */
  114 
  115 enum pmc_class {
  116 #undef  __PMC_CLASS
  117 #define __PMC_CLASS(N)  PMC_CLASS_##N ,
  118         __PMC_CLASSES()
  119 };
  120 
  121 #define PMC_CLASS_FIRST PMC_CLASS_TSC
  122 #define PMC_CLASS_LAST  PMC_CLASS_UCP
  123 
  124 /*
  125  * A PMC can be in the following states:
  126  *
  127  * Hardware states:
  128  *   DISABLED   -- administratively prohibited from being used.
  129  *   FREE       -- HW available for use
  130  * Software states:
  131  *   ALLOCATED  -- allocated
  132  *   STOPPED    -- allocated, but not counting events
  133  *   RUNNING    -- allocated, and in operation; 'pm_runcount'
  134  *                 holds the number of CPUs using this PMC at
  135  *                 a given instant
  136  *   DELETED    -- being destroyed
  137  */
  138 
  139 #define __PMC_HWSTATES()                        \
  140         __PMC_STATE(DISABLED)                   \
  141         __PMC_STATE(FREE)
  142 
  143 #define __PMC_SWSTATES()                        \
  144         __PMC_STATE(ALLOCATED)                  \
  145         __PMC_STATE(STOPPED)                    \
  146         __PMC_STATE(RUNNING)                    \
  147         __PMC_STATE(DELETED)
  148 
  149 #define __PMC_STATES()                          \
  150         __PMC_HWSTATES()                        \
  151         __PMC_SWSTATES()
  152 
  153 enum pmc_state {
  154 #undef  __PMC_STATE
  155 #define __PMC_STATE(S)  PMC_STATE_##S,
  156         __PMC_STATES()
  157         __PMC_STATE(MAX)
  158 };
  159 
  160 #define PMC_STATE_FIRST PMC_STATE_DISABLED
  161 #define PMC_STATE_LAST  PMC_STATE_DELETED
  162 
  163 /*
  164  * An allocated PMC may used as a 'global' counter or as a
  165  * 'thread-private' one.  Each such mode of use can be in either
  166  * statistical sampling mode or in counting mode.  Thus a PMC in use
  167  *
  168  * SS i.e., SYSTEM STATISTICAL  -- system-wide statistical profiling
  169  * SC i.e., SYSTEM COUNTER      -- system-wide counting mode
  170  * TS i.e., THREAD STATISTICAL  -- thread virtual, statistical profiling
  171  * TC i.e., THREAD COUNTER      -- thread virtual, counting mode
  172  *
  173  * Statistical profiling modes rely on the PMC periodically delivering
  174  * a interrupt to the CPU (when the configured number of events have
  175  * been measured), so the PMC must have the ability to generate
  176  * interrupts.
  177  *
  178  * In counting modes, the PMC counts its configured events, with the
  179  * value of the PMC being read whenever needed by its owner process.
  180  *
  181  * The thread specific modes "virtualize" the PMCs -- the PMCs appear
  182  * to be thread private and count events only when the profiled thread
  183  * actually executes on the CPU.
  184  *
  185  * The system-wide "global" modes keep the PMCs running all the time
  186  * and are used to measure the behaviour of the whole system.
  187  */
  188 
  189 #define __PMC_MODES()                           \
  190         __PMC_MODE(SS,  0)                      \
  191         __PMC_MODE(SC,  1)                      \
  192         __PMC_MODE(TS,  2)                      \
  193         __PMC_MODE(TC,  3)
  194 
  195 enum pmc_mode {
  196 #undef  __PMC_MODE
  197 #define __PMC_MODE(M,N) PMC_MODE_##M = N,
  198         __PMC_MODES()
  199 };
  200 
  201 #define PMC_MODE_FIRST  PMC_MODE_SS
  202 #define PMC_MODE_LAST   PMC_MODE_TC
  203 
  204 #define PMC_IS_COUNTING_MODE(mode)                              \
  205         ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC)
  206 #define PMC_IS_SYSTEM_MODE(mode)                                \
  207         ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC)
  208 #define PMC_IS_SAMPLING_MODE(mode)                              \
  209         ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS)
  210 #define PMC_IS_VIRTUAL_MODE(mode)                               \
  211         ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC)
  212 
  213 /*
  214  * PMC row disposition
  215  */
  216 
  217 #define __PMC_DISPOSITIONS(N)                                   \
  218         __PMC_DISP(STANDALONE)  /* global/disabled counters */  \
  219         __PMC_DISP(FREE)        /* free/available */            \
  220         __PMC_DISP(THREAD)      /* thread-virtual PMCs */       \
  221         __PMC_DISP(UNKNOWN)     /* sentinel */
  222 
  223 enum pmc_disp {
  224 #undef  __PMC_DISP
  225 #define __PMC_DISP(D)   PMC_DISP_##D ,
  226         __PMC_DISPOSITIONS()
  227 };
  228 
  229 #define PMC_DISP_FIRST  PMC_DISP_STANDALONE
  230 #define PMC_DISP_LAST   PMC_DISP_THREAD
  231 
  232 /*
  233  * Counter capabilities
  234  *
  235  * __PMC_CAPS(NAME, VALUE, DESCRIPTION)
  236  */
  237 
  238 #define __PMC_CAPS()                                                    \
  239         __PMC_CAP(INTERRUPT,    0, "generate interrupts")               \
  240         __PMC_CAP(USER,         1, "count user-mode events")            \
  241         __PMC_CAP(SYSTEM,       2, "count system-mode events")          \
  242         __PMC_CAP(EDGE,         3, "do edge detection of events")       \
  243         __PMC_CAP(THRESHOLD,    4, "ignore events below a threshold")   \
  244         __PMC_CAP(READ,         5, "read PMC counter")                  \
  245         __PMC_CAP(WRITE,        6, "reprogram PMC counter")             \
  246         __PMC_CAP(INVERT,       7, "invert comparision sense")          \
  247         __PMC_CAP(QUALIFIER,    8, "further qualify monitored events")  \
  248         __PMC_CAP(PRECISE,      9, "perform precise sampling")          \
  249         __PMC_CAP(TAGGING,      10, "tag upstream events")              \
  250         __PMC_CAP(CASCADE,      11, "cascade counters")
  251 
  252 enum pmc_caps
  253 {
  254 #undef  __PMC_CAP
  255 #define __PMC_CAP(NAME, VALUE, DESCR)   PMC_CAP_##NAME = (1 << VALUE) ,
  256         __PMC_CAPS()
  257 };
  258 
  259 #define PMC_CAP_FIRST           PMC_CAP_INTERRUPT
  260 #define PMC_CAP_LAST            PMC_CAP_CASCADE
  261 
  262 /*
  263  * PMC Event Numbers
  264  *
  265  * These are generated from the definitions in "dev/hwpmc/pmc_events.h".
  266  */
  267 
  268 enum pmc_event {
  269 #undef  __PMC_EV
  270 #undef  __PMC_EV_BLOCK
  271 #define __PMC_EV_BLOCK(C,V)     PMC_EV_ ## C ## __BLOCK_START = (V) - 1 ,
  272 #define __PMC_EV(C,N)           PMC_EV_ ## C ## _ ## N ,
  273         __PMC_EVENTS()
  274 };
  275 
  276 /*
  277  * PMC SYSCALL INTERFACE
  278  */
  279 
  280 /*
  281  * "PMC_OPS" -- these are the commands recognized by the kernel
  282  * module, and are used when performing a system call from userland.
  283  */
  284 #define __PMC_OPS()                                                     \
  285         __PMC_OP(CONFIGURELOG, "Set log file")                          \
  286         __PMC_OP(FLUSHLOG, "Flush log file")                            \
  287         __PMC_OP(GETCPUINFO, "Get system CPU information")              \
  288         __PMC_OP(GETDRIVERSTATS, "Get driver statistics")               \
  289         __PMC_OP(GETMODULEVERSION, "Get module version")                \
  290         __PMC_OP(GETPMCINFO, "Get per-cpu PMC information")             \
  291         __PMC_OP(PMCADMIN, "Set PMC state")                             \
  292         __PMC_OP(PMCALLOCATE, "Allocate and configure a PMC")           \
  293         __PMC_OP(PMCATTACH, "Attach a PMC to a process")                \
  294         __PMC_OP(PMCDETACH, "Detach a PMC from a process")              \
  295         __PMC_OP(PMCGETMSR, "Get a PMC's hardware address")             \
  296         __PMC_OP(PMCRELEASE, "Release a PMC")                           \
  297         __PMC_OP(PMCRW, "Read/Set a PMC")                               \
  298         __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate")        \
  299         __PMC_OP(PMCSTART, "Start a PMC")                               \
  300         __PMC_OP(PMCSTOP, "Start a PMC")                                \
  301         __PMC_OP(WRITELOG, "Write a cookie to the log file")            \
  302         __PMC_OP(CLOSELOG, "Close log file")
  303 
  304 
  305 enum pmc_ops {
  306 #undef  __PMC_OP
  307 #define __PMC_OP(N, D)  PMC_OP_##N,
  308         __PMC_OPS()
  309 };
  310 
  311 
  312 /*
  313  * Flags used in operations on PMCs.
  314  */
  315 
  316 #define PMC_F_FORCE             0x00000001 /*OP ADMIN force operation */
  317 #define PMC_F_DESCENDANTS       0x00000002 /*OP ALLOCATE track descendants */
  318 #define PMC_F_LOG_PROCCSW       0x00000004 /*OP ALLOCATE track ctx switches */
  319 #define PMC_F_LOG_PROCEXIT      0x00000008 /*OP ALLOCATE log proc exits */
  320 #define PMC_F_NEWVALUE          0x00000010 /*OP RW write new value */
  321 #define PMC_F_OLDVALUE          0x00000020 /*OP RW get old value */
  322 #define PMC_F_KGMON             0x00000040 /*OP ALLOCATE kgmon(8) profiling */
  323 /* V2 API */
  324 #define PMC_F_CALLCHAIN         0x00000080 /*OP ALLOCATE capture callchains */
  325 
  326 /* internal flags */
  327 #define PMC_F_ATTACHED_TO_OWNER 0x00010000 /*attached to owner*/
  328 #define PMC_F_NEEDS_LOGFILE     0x00020000 /*needs log file */
  329 #define PMC_F_ATTACH_DONE       0x00040000 /*attached at least once */
  330 
  331 #define PMC_CALLCHAIN_DEPTH_MAX 32
  332 #define PMC_CC_F_USERSPACE      0x01       /*userspace callchain*/
  333 
  334 /*
  335  * Cookies used to denote allocated PMCs, and the values of PMCs.
  336  */
  337 
  338 typedef uint32_t        pmc_id_t;
  339 typedef uint64_t        pmc_value_t;
  340 
  341 #define PMC_ID_INVALID          (~ (pmc_id_t) 0)
  342 
  343 /*
  344  * PMC IDs have the following format:
  345  *
  346  * +--------+----------+-----------+-----------+
  347  * |   CPU  | PMC MODE | PMC CLASS | ROW INDEX |
  348  * +--------+----------+-----------+-----------+
  349  *
  350  * where each field is 8 bits wide.  Field 'CPU' is set to the
  351  * requested CPU for system-wide PMCs or PMC_CPU_ANY for process-mode
  352  * PMCs.  Field 'PMC MODE' is the allocated PMC mode.  Field 'PMC
  353  * CLASS' is the class of the PMC.  Field 'ROW INDEX' is the row index
  354  * for the PMC.
  355  *
  356  * The 'ROW INDEX' ranges over 0..NWPMCS where NHWPMCS is the total
  357  * number of hardware PMCs on this cpu.
  358  */
  359 
  360 
  361 #define PMC_ID_TO_ROWINDEX(ID)  ((ID) & 0xFF)
  362 #define PMC_ID_TO_CLASS(ID)     (((ID) & 0xFF00) >> 8)
  363 #define PMC_ID_TO_MODE(ID)      (((ID) & 0xFF0000) >> 16)
  364 #define PMC_ID_TO_CPU(ID)       (((ID) & 0xFF000000) >> 24)
  365 #define PMC_ID_MAKE_ID(CPU,MODE,CLASS,ROWINDEX)                 \
  366         ((((CPU) & 0xFF) << 24) | (((MODE) & 0xFF) << 16) |     \
  367         (((CLASS) & 0xFF) << 8) | ((ROWINDEX) & 0xFF))
  368 
  369 /*
  370  * Data structures for system calls supported by the pmc driver.
  371  */
  372 
  373 /*
  374  * OP PMCALLOCATE
  375  *
  376  * Allocate a PMC on the named CPU.
  377  */
  378 
  379 #define PMC_CPU_ANY     ~0
  380 
  381 struct pmc_op_pmcallocate {
  382         uint32_t        pm_caps;        /* PMC_CAP_* */
  383         uint32_t        pm_cpu;         /* CPU number or PMC_CPU_ANY */
  384         enum pmc_class  pm_class;       /* class of PMC desired */
  385         enum pmc_event  pm_ev;          /* [enum pmc_event] desired */
  386         uint32_t        pm_flags;       /* additional modifiers PMC_F_* */
  387         enum pmc_mode   pm_mode;        /* desired mode */
  388         pmc_id_t        pm_pmcid;       /* [return] process pmc id */
  389 
  390         union pmc_md_op_pmcallocate pm_md; /* MD layer extensions */
  391 };
  392 
  393 /*
  394  * OP PMCADMIN
  395  *
  396  * Set the administrative state (i.e., whether enabled or disabled) of
  397  * a PMC 'pm_pmc' on CPU 'pm_cpu'.  Note that 'pm_pmc' specifies an
  398  * absolute PMC number and need not have been first allocated by the
  399  * calling process.
  400  */
  401 
  402 struct pmc_op_pmcadmin {
  403         int             pm_cpu;         /* CPU# */
  404         uint32_t        pm_flags;       /* flags */
  405         int             pm_pmc;         /* PMC# */
  406         enum pmc_state  pm_state;       /* desired state */
  407 };
  408 
  409 /*
  410  * OP PMCATTACH / OP PMCDETACH
  411  *
  412  * Attach/detach a PMC and a process.
  413  */
  414 
  415 struct pmc_op_pmcattach {
  416         pmc_id_t        pm_pmc;         /* PMC to attach to */
  417         pid_t           pm_pid;         /* target process */
  418 };
  419 
  420 /*
  421  * OP PMCSETCOUNT
  422  *
  423  * Set the sampling rate (i.e., the reload count) for statistical counters.
  424  * 'pm_pmcid' need to have been previously allocated using PMCALLOCATE.
  425  */
  426 
  427 struct pmc_op_pmcsetcount {
  428         pmc_value_t     pm_count;       /* initial/sample count */
  429         pmc_id_t        pm_pmcid;       /* PMC id to set */
  430 };
  431 
  432 
  433 /*
  434  * OP PMCRW
  435  *
  436  * Read the value of a PMC named by 'pm_pmcid'.  'pm_pmcid' needs
  437  * to have been previously allocated using PMCALLOCATE.
  438  */
  439 
  440 
  441 struct pmc_op_pmcrw {
  442         uint32_t        pm_flags;       /* PMC_F_{OLD,NEW}VALUE*/
  443         pmc_id_t        pm_pmcid;       /* pmc id */
  444         pmc_value_t     pm_value;       /* new&returned value */
  445 };
  446 
  447 
  448 /*
  449  * OP GETPMCINFO
  450  *
  451  * retrieve PMC state for a named CPU.  The caller is expected to
  452  * allocate 'npmc' * 'struct pmc_info' bytes of space for the return
  453  * values.
  454  */
  455 
  456 struct pmc_info {
  457         char            pm_name[PMC_NAME_MAX]; /* pmc name */
  458         enum pmc_class  pm_class;       /* enum pmc_class */
  459         int             pm_enabled;     /* whether enabled */
  460         enum pmc_disp   pm_rowdisp;     /* FREE, THREAD or STANDLONE */
  461         pid_t           pm_ownerpid;    /* owner, or -1 */
  462         enum pmc_mode   pm_mode;        /* current mode [enum pmc_mode] */
  463         enum pmc_event  pm_event;       /* current event */
  464         uint32_t        pm_flags;       /* current flags */
  465         pmc_value_t     pm_reloadcount; /* sampling counters only */
  466 };
  467 
  468 struct pmc_op_getpmcinfo {
  469         int32_t         pm_cpu;         /* 0 <= cpu < mp_maxid */
  470         struct pmc_info pm_pmcs[];      /* space for 'npmc' structures */
  471 };
  472 
  473 
  474 /*
  475  * OP GETCPUINFO
  476  *
  477  * Retrieve system CPU information.
  478  */
  479 
  480 struct pmc_classinfo {
  481         enum pmc_class  pm_class;       /* class id */
  482         uint32_t        pm_caps;        /* counter capabilities */
  483         uint32_t        pm_width;       /* width of the PMC */
  484         uint32_t        pm_num;         /* number of PMCs in class */
  485 };
  486 
  487 struct pmc_op_getcpuinfo {
  488         enum pmc_cputype pm_cputype; /* what kind of CPU */
  489         uint32_t        pm_ncpu;    /* max CPU number */
  490         uint32_t        pm_npmc;    /* #PMCs per CPU */
  491         uint32_t        pm_nclass;  /* #classes of PMCs */
  492         struct pmc_classinfo  pm_classes[PMC_CLASS_MAX];
  493 };
  494 
  495 /*
  496  * OP CONFIGURELOG
  497  *
  498  * Configure a log file for writing system-wide statistics to.
  499  */
  500 
  501 struct pmc_op_configurelog {
  502         int             pm_flags;
  503         int             pm_logfd;   /* logfile fd (or -1) */
  504 };
  505 
  506 /*
  507  * OP GETDRIVERSTATS
  508  *
  509  * Retrieve pmc(4) driver-wide statistics.
  510  */
  511 
  512 struct pmc_op_getdriverstats {
  513         int     pm_intr_ignored;        /* #interrupts ignored */
  514         int     pm_intr_processed;      /* #interrupts processed */
  515         int     pm_intr_bufferfull;     /* #interrupts with ENOSPC */
  516         int     pm_syscalls;            /* #syscalls */
  517         int     pm_syscall_errors;      /* #syscalls with errors */
  518         int     pm_buffer_requests;     /* #buffer requests */
  519         int     pm_buffer_requests_failed; /* #failed buffer requests */
  520         int     pm_log_sweeps;          /* #sample buffer processing passes */
  521 };
  522 
  523 /*
  524  * OP RELEASE / OP START / OP STOP
  525  *
  526  * Simple operations on a PMC id.
  527  */
  528 
  529 struct pmc_op_simple {
  530         pmc_id_t        pm_pmcid;
  531 };
  532 
  533 /*
  534  * OP WRITELOG
  535  *
  536  * Flush the current log buffer and write 4 bytes of user data to it.
  537  */
  538 
  539 struct pmc_op_writelog {
  540         uint32_t        pm_userdata;
  541 };
  542 
  543 /*
  544  * OP GETMSR
  545  *
  546  * Retrieve the machine specific address assoicated with the allocated
  547  * PMC.  This number can be used subsequently with a read-performance-counter
  548  * instruction.
  549  */
  550 
  551 struct pmc_op_getmsr {
  552         uint32_t        pm_msr;         /* machine specific address */
  553         pmc_id_t        pm_pmcid;       /* allocated pmc id */
  554 };
  555 
  556 #ifdef _KERNEL
  557 
  558 #include <sys/malloc.h>
  559 #include <sys/sysctl.h>
  560 
  561 #include <machine/frame.h>
  562 
  563 #define PMC_HASH_SIZE                           16
  564 #define PMC_MTXPOOL_SIZE                        32
  565 #define PMC_LOG_BUFFER_SIZE                     4
  566 #define PMC_NLOGBUFFERS                         16
  567 #define PMC_NSAMPLES                            32
  568 #define PMC_CALLCHAIN_DEPTH                     8
  569 
  570 #define PMC_SYSCTL_NAME_PREFIX "kern." PMC_MODULE_NAME "."
  571 
  572 /*
  573  * Locking keys
  574  *
  575  * (b) - pmc_bufferlist_mtx (spin lock)
  576  * (k) - pmc_kthread_mtx (sleep lock)
  577  * (o) - po->po_mtx (spin lock)
  578  */
  579 
  580 /*
  581  * PMC commands
  582  */
  583 
  584 struct pmc_syscall_args {
  585         uint32_t        pmop_code;      /* one of PMC_OP_* */
  586         void            *pmop_data;     /* syscall parameter */
  587 };
  588 
  589 /*
  590  * Interface to processor specific s1tuff
  591  */
  592 
  593 /*
  594  * struct pmc_descr
  595  *
  596  * Machine independent (i.e., the common parts) of a human readable
  597  * PMC description.
  598  */
  599 
  600 struct pmc_descr {
  601         char            pd_name[PMC_NAME_MAX]; /* name */
  602         uint32_t        pd_caps;        /* capabilities */
  603         enum pmc_class  pd_class;       /* class of the PMC */
  604         uint32_t        pd_width;       /* width in bits */
  605 };
  606 
  607 /*
  608  * struct pmc_target
  609  *
  610  * This structure records all the target processes associated with a
  611  * PMC.
  612  */
  613 
  614 struct pmc_target {
  615         LIST_ENTRY(pmc_target)  pt_next;
  616         struct pmc_process      *pt_process; /* target descriptor */
  617 };
  618 
  619 /*
  620  * struct pmc
  621  *
  622  * Describes each allocated PMC.
  623  *
  624  * Each PMC has precisely one owner, namely the process that allocated
  625  * the PMC.
  626  *
  627  * A PMC may be attached to multiple target processes.  The
  628  * 'pm_targets' field links all the target processes being monitored
  629  * by this PMC.
  630  *
  631  * The 'pm_savedvalue' field is protected by a mutex.
  632  *
  633  * On a multi-cpu machine, multiple target threads associated with a
  634  * process-virtual PMC could be concurrently executing on different
  635  * CPUs.  The 'pm_runcount' field is atomically incremented every time
  636  * the PMC gets scheduled on a CPU and atomically decremented when it
  637  * get descheduled.  Deletion of a PMC is only permitted when this
  638  * field is ''.
  639  *
  640  */
  641 
  642 struct pmc {
  643         LIST_HEAD(,pmc_target)  pm_targets;     /* list of target processes */
  644         LIST_ENTRY(pmc)         pm_next;        /* owner's list */
  645 
  646         /*
  647          * System-wide PMCs are allocated on a CPU and are not moved
  648          * around.  For system-wide PMCs we record the CPU the PMC was
  649          * allocated on in the 'CPU' field of the pmc ID.
  650          *
  651          * Virtual PMCs run on whichever CPU is currently executing
  652          * their targets' threads.  For these PMCs we need to save
  653          * their current PMC counter values when they are taken off
  654          * CPU.
  655          */
  656 
  657         union {
  658                 pmc_value_t     pm_savedvalue;  /* Virtual PMCS */
  659         } pm_gv;
  660 
  661         /*
  662          * For sampling mode PMCs, we keep track of the PMC's "reload
  663          * count", which is the counter value to be loaded in when
  664          * arming the PMC for the next counting session.  For counting
  665          * modes on PMCs that are read-only (e.g., the x86 TSC), we
  666          * keep track of the initial value at the start of
  667          * counting-mode operation.
  668          */
  669 
  670         union {
  671                 pmc_value_t     pm_reloadcount; /* sampling PMC modes */
  672                 pmc_value_t     pm_initial;     /* counting PMC modes */
  673         } pm_sc;
  674 
  675         uint32_t        pm_stalled;     /* marks stalled sampling PMCs */
  676         uint32_t        pm_caps;        /* PMC capabilities */
  677         enum pmc_event  pm_event;       /* event being measured */
  678         uint32_t        pm_flags;       /* additional flags PMC_F_... */
  679         struct pmc_owner *pm_owner;     /* owner thread state */
  680         int             pm_runcount;    /* #cpus currently on */
  681         enum pmc_state  pm_state;       /* current PMC state */
  682 
  683         /*
  684          * The PMC ID field encodes the row-index for the PMC, its
  685          * mode, class and the CPU# associated with the PMC.
  686          */
  687 
  688         pmc_id_t        pm_id;          /* allocated PMC id */
  689 
  690         /* md extensions */
  691         union pmc_md_pmc        pm_md;
  692 };
  693 
  694 /*
  695  * Accessor macros for 'struct pmc'
  696  */
  697 
  698 #define PMC_TO_MODE(P)          PMC_ID_TO_MODE((P)->pm_id)
  699 #define PMC_TO_CLASS(P)         PMC_ID_TO_CLASS((P)->pm_id)
  700 #define PMC_TO_ROWINDEX(P)      PMC_ID_TO_ROWINDEX((P)->pm_id)
  701 #define PMC_TO_CPU(P)           PMC_ID_TO_CPU((P)->pm_id)
  702 
  703 
  704 /*
  705  * struct pmc_process
  706  *
  707  * Record a 'target' process being profiled.
  708  *
  709  * The target process being profiled could be different from the owner
  710  * process which allocated the PMCs.  Each target process descriptor
  711  * is associated with NHWPMC 'struct pmc *' pointers.  Each PMC at a
  712  * given hardware row-index 'n' will use slot 'n' of the 'pp_pmcs[]'
  713  * array.  The size of this structure is thus PMC architecture
  714  * dependent.
  715  *
  716  * TODO: Only process-private counting mode PMCs may be attached to a
  717  * process different from the allocator process (since we do not have
  718  * the infrastructure to make sense of an interrupted PC value from a
  719  * 'target' process (yet)).
  720  *
  721  */
  722 
  723 struct pmc_targetstate {
  724         struct pmc      *pp_pmc;   /* target PMC */
  725         pmc_value_t     pp_pmcval; /* per-process value */
  726 };
  727 
  728 struct pmc_process {
  729         LIST_ENTRY(pmc_process) pp_next;        /* hash chain */
  730         int             pp_refcnt;              /* reference count */
  731         uint32_t        pp_flags;               /* flags PMC_PP_* */
  732         struct proc     *pp_proc;               /* target thread */
  733         struct pmc_targetstate pp_pmcs[];       /* NHWPMCs */
  734 };
  735 
  736 #define PMC_PP_ENABLE_MSR_ACCESS        0x00000001
  737 
  738 /*
  739  * struct pmc_owner
  740  *
  741  * We associate a PMC with an 'owner' process.
  742  *
  743  * A process can be associated with 0..NCPUS*NHWPMC PMCs during its
  744  * lifetime, where NCPUS is the numbers of CPUS in the system and
  745  * NHWPMC is the number of hardware PMCs per CPU.  These are
  746  * maintained in the list headed by the 'po_pmcs' to save on space.
  747  *
  748  */
  749 
  750 struct pmc_owner  {
  751         LIST_ENTRY(pmc_owner)   po_next;        /* hash chain */
  752         LIST_ENTRY(pmc_owner)   po_ssnext;      /* list of SS PMC owners */
  753         LIST_HEAD(, pmc)        po_pmcs;        /* owned PMC list */
  754         TAILQ_HEAD(, pmclog_buffer) po_logbuffers; /* (o) logbuffer list */
  755         struct mtx              po_mtx;         /* spin lock for (o) */
  756         struct proc             *po_owner;      /* owner proc */
  757         uint32_t                po_flags;       /* (k) flags PMC_PO_* */
  758         struct proc             *po_kthread;    /* (k) helper kthread */
  759         struct pmclog_buffer    *po_curbuf;     /* current log buffer */
  760         struct file             *po_file;       /* file reference */
  761         int                     po_error;       /* recorded error */
  762         short                   po_sscount;     /* # SS PMCs owned */
  763         short                   po_logprocmaps; /* global mappings done */
  764 };
  765 
  766 #define PMC_PO_OWNS_LOGFILE             0x00000001 /* has a log file */
  767 #define PMC_PO_SHUTDOWN                 0x00000010 /* in the process of shutdown */
  768 #define PMC_PO_INITIAL_MAPPINGS_DONE    0x00000020
  769 
  770 /*
  771  * struct pmc_hw -- describe the state of the PMC hardware
  772  *
  773  * When in use, a HW PMC is associated with one allocated 'struct pmc'
  774  * pointed to by field 'phw_pmc'.  When inactive, this field is NULL.
  775  *
  776  * On an SMP box, one or more HW PMC's in process virtual mode with
  777  * the same 'phw_pmc' could be executing on different CPUs.  In order
  778  * to handle this case correctly, we need to ensure that only
  779  * incremental counts get added to the saved value in the associated
  780  * 'struct pmc'.  The 'phw_save' field is used to keep the saved PMC
  781  * value at the time the hardware is started during this context
  782  * switch (i.e., the difference between the new (hardware) count and
  783  * the saved count is atomically added to the count field in 'struct
  784  * pmc' at context switch time).
  785  *
  786  */
  787 
  788 struct pmc_hw {
  789         uint32_t        phw_state;      /* see PHW_* macros below */
  790         struct pmc      *phw_pmc;       /* current thread PMC */
  791 };
  792 
  793 #define PMC_PHW_RI_MASK         0x000000FF
  794 #define PMC_PHW_CPU_SHIFT       8
  795 #define PMC_PHW_CPU_MASK        0x0000FF00
  796 #define PMC_PHW_FLAGS_SHIFT     16
  797 #define PMC_PHW_FLAGS_MASK      0xFFFF0000
  798 
  799 #define PMC_PHW_INDEX_TO_STATE(ri)      ((ri) & PMC_PHW_RI_MASK)
  800 #define PMC_PHW_STATE_TO_INDEX(state)   ((state) & PMC_PHW_RI_MASK)
  801 #define PMC_PHW_CPU_TO_STATE(cpu)       (((cpu) << PMC_PHW_CPU_SHIFT) & \
  802         PMC_PHW_CPU_MASK)
  803 #define PMC_PHW_STATE_TO_CPU(state)     (((state) & PMC_PHW_CPU_MASK) >> \
  804         PMC_PHW_CPU_SHIFT)
  805 #define PMC_PHW_FLAGS_TO_STATE(flags)   (((flags) << PMC_PHW_FLAGS_SHIFT) & \
  806         PMC_PHW_FLAGS_MASK)
  807 #define PMC_PHW_STATE_TO_FLAGS(state)   (((state) & PMC_PHW_FLAGS_MASK) >> \
  808         PMC_PHW_FLAGS_SHIFT)
  809 #define PMC_PHW_FLAG_IS_ENABLED         (PMC_PHW_FLAGS_TO_STATE(0x01))
  810 #define PMC_PHW_FLAG_IS_SHAREABLE       (PMC_PHW_FLAGS_TO_STATE(0x02))
  811 
  812 /*
  813  * struct pmc_sample
  814  *
  815  * Space for N (tunable) PC samples and associated control data.
  816  */
  817 
  818 struct pmc_sample {
  819         uint16_t                ps_nsamples;    /* callchain depth */
  820         uint8_t                 ps_cpu;         /* cpu number */
  821         uint8_t                 ps_flags;       /* other flags */
  822         pid_t                   ps_pid;         /* process PID or -1 */
  823         struct thread           *ps_td;         /* which thread */
  824         struct pmc              *ps_pmc;        /* interrupting PMC */
  825         uintptr_t               *ps_pc;         /* (const) callchain start */
  826 };
  827 
  828 #define PMC_SAMPLE_FREE         ((uint16_t) 0)
  829 #define PMC_SAMPLE_INUSE        ((uint16_t) 0xFFFF)
  830 
  831 struct pmc_samplebuffer {
  832         struct pmc_sample * volatile ps_read;   /* read pointer */
  833         struct pmc_sample * volatile ps_write;  /* write pointer */
  834         uintptr_t               *ps_callchains; /* all saved call chains */
  835         struct pmc_sample       *ps_fence;      /* one beyond ps_samples[] */
  836         struct pmc_sample       ps_samples[];   /* array of sample entries */
  837 };
  838 
  839 
  840 /*
  841  * struct pmc_cpustate
  842  *
  843  * A CPU is modelled as a collection of HW PMCs with space for additional
  844  * flags.
  845  */
  846 
  847 struct pmc_cpu {
  848         uint32_t        pc_state;       /* physical cpu number + flags */
  849         struct pmc_samplebuffer *pc_sb; /* space for samples */
  850         struct pmc_hw   *pc_hwpmcs[];   /* 'npmc' pointers */
  851 };
  852 
  853 #define PMC_PCPU_CPU_MASK               0x000000FF
  854 #define PMC_PCPU_FLAGS_MASK             0xFFFFFF00
  855 #define PMC_PCPU_FLAGS_SHIFT            8
  856 #define PMC_PCPU_STATE_TO_CPU(S)        ((S) & PMC_PCPU_CPU_MASK)
  857 #define PMC_PCPU_STATE_TO_FLAGS(S)      (((S) & PMC_PCPU_FLAGS_MASK) >> PMC_PCPU_FLAGS_SHIFT)
  858 #define PMC_PCPU_FLAGS_TO_STATE(F)      (((F) << PMC_PCPU_FLAGS_SHIFT) & PMC_PCPU_FLAGS_MASK)
  859 #define PMC_PCPU_CPU_TO_STATE(C)        ((C) & PMC_PCPU_CPU_MASK)
  860 #define PMC_PCPU_FLAG_HTT               (PMC_PCPU_FLAGS_TO_STATE(0x1))
  861 
  862 /*
  863  * struct pmc_binding
  864  *
  865  * CPU binding information.
  866  */
  867 
  868 struct pmc_binding {
  869         int     pb_bound;       /* is bound? */
  870         int     pb_cpu;         /* if so, to which CPU */
  871 };
  872 
  873 
  874 struct pmc_mdep;
  875 
  876 /*
  877  * struct pmc_classdep
  878  *
  879  * PMC class-dependent operations.
  880  */
  881 struct pmc_classdep {
  882         uint32_t        pcd_caps;       /* class capabilities */
  883         enum pmc_class  pcd_class;      /* class id */
  884         int             pcd_num;        /* number of PMCs */
  885         int             pcd_ri;         /* row index of the first PMC in class */
  886         int             pcd_width;      /* width of the PMC */
  887 
  888         /* configuring/reading/writing the hardware PMCs */
  889         int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm);
  890         int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm);
  891         int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value);
  892         int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value);
  893 
  894         /* pmc allocation/release */
  895         int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t,
  896                 const struct pmc_op_pmcallocate *_a);
  897         int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm);
  898 
  899         /* starting and stopping PMCs */
  900         int (*pcd_start_pmc)(int _cpu, int _ri);
  901         int (*pcd_stop_pmc)(int _cpu, int _ri);
  902 
  903         /* description */
  904         int (*pcd_describe)(int _cpu, int _ri, struct pmc_info *_pi,
  905                 struct pmc **_ppmc);
  906 
  907         /* class-dependent initialization & finalization */
  908         int (*pcd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
  909         int (*pcd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
  910 
  911         /* machine-specific interface */
  912         int (*pcd_get_msr)(int _ri, uint32_t *_msr);
  913 };
  914 
  915 /*
  916  * struct pmc_mdep
  917  *
  918  * Machine dependent bits needed per CPU type.
  919  */
  920 
  921 struct pmc_mdep  {
  922         uint32_t        pmd_cputype;    /* from enum pmc_cputype */
  923         uint32_t        pmd_npmc;       /* number of PMCs per CPU */
  924         uint32_t        pmd_nclass;     /* number of PMC classes present */
  925 
  926         /*
  927          * Machine dependent methods.
  928          */
  929 
  930         /* per-cpu initialization and finalization */
  931         int (*pmd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
  932         int (*pmd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
  933 
  934         /* thread context switch in/out */
  935         int (*pmd_switch_in)(struct pmc_cpu *_p, struct pmc_process *_pp);
  936         int (*pmd_switch_out)(struct pmc_cpu *_p, struct pmc_process *_pp);
  937 
  938         /* handle a PMC interrupt */
  939         int (*pmd_intr)(int _cpu, struct trapframe *_tf);
  940 
  941         /*
  942          * PMC class dependent information.
  943          */
  944         struct pmc_classdep pmd_classdep[];
  945 };
  946 
  947 /*
  948  * Per-CPU state.  This is an array of 'mp_ncpu' pointers
  949  * to struct pmc_cpu descriptors.
  950  */
  951 
  952 extern struct pmc_cpu **pmc_pcpu;
  953 
  954 /* driver statistics */
  955 extern struct pmc_op_getdriverstats pmc_stats;
  956 
  957 #if     defined(DEBUG) && DEBUG
  958 
  959 /* debug flags, major flag groups */
  960 struct pmc_debugflags {
  961         int     pdb_CPU;
  962         int     pdb_CSW;
  963         int     pdb_LOG;
  964         int     pdb_MDP;
  965         int     pdb_MOD;
  966         int     pdb_OWN;
  967         int     pdb_PMC;
  968         int     pdb_PRC;
  969         int     pdb_SAM;
  970 };
  971 
  972 extern struct pmc_debugflags pmc_debugflags;
  973 
  974 #define PMC_DEBUG_STRSIZE               128
  975 #define PMC_DEBUG_DEFAULT_FLAGS         { 0, 0, 0, 0, 0, 0, 0, 0 }
  976 
  977 #define PMCDBG(M,N,L,F,...) do {                                        \
  978         if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N))      \
  979                 printf(#M ":" #N ":" #L  ": " F "\n", __VA_ARGS__);     \
  980 } while (0)
  981 
  982 /* Major numbers */
  983 #define PMC_DEBUG_MAJ_CPU               0 /* cpu switches */
  984 #define PMC_DEBUG_MAJ_CSW               1 /* context switches */
  985 #define PMC_DEBUG_MAJ_LOG               2 /* logging */
  986 #define PMC_DEBUG_MAJ_MDP               3 /* machine dependent */
  987 #define PMC_DEBUG_MAJ_MOD               4 /* misc module infrastructure */
  988 #define PMC_DEBUG_MAJ_OWN               5 /* owner */
  989 #define PMC_DEBUG_MAJ_PMC               6 /* pmc management */
  990 #define PMC_DEBUG_MAJ_PRC               7 /* processes */
  991 #define PMC_DEBUG_MAJ_SAM               8 /* sampling */
  992 
  993 /* Minor numbers */
  994 
  995 /* Common (8 bits) */
  996 #define PMC_DEBUG_MIN_ALL               0 /* allocation */
  997 #define PMC_DEBUG_MIN_REL               1 /* release */
  998 #define PMC_DEBUG_MIN_OPS               2 /* ops: start, stop, ... */
  999 #define PMC_DEBUG_MIN_INI               3 /* init */
 1000 #define PMC_DEBUG_MIN_FND               4 /* find */
 1001 
 1002 /* MODULE */
 1003 #define PMC_DEBUG_MIN_PMH              14 /* pmc_hook */
 1004 #define PMC_DEBUG_MIN_PMS              15 /* pmc_syscall */
 1005 
 1006 /* OWN */
 1007 #define PMC_DEBUG_MIN_ORM               8 /* owner remove */
 1008 #define PMC_DEBUG_MIN_OMR               9 /* owner maybe remove */
 1009 
 1010 /* PROCESSES */
 1011 #define PMC_DEBUG_MIN_TLK               8 /* link target */
 1012 #define PMC_DEBUG_MIN_TUL               9 /* unlink target */
 1013 #define PMC_DEBUG_MIN_EXT              10 /* process exit */
 1014 #define PMC_DEBUG_MIN_EXC              11 /* process exec */
 1015 #define PMC_DEBUG_MIN_FRK              12 /* process fork */
 1016 #define PMC_DEBUG_MIN_ATT              13 /* attach/detach */
 1017 #define PMC_DEBUG_MIN_SIG              14 /* signalling */
 1018 
 1019 /* CONTEXT SWITCHES */
 1020 #define PMC_DEBUG_MIN_SWI               8 /* switch in */
 1021 #define PMC_DEBUG_MIN_SWO               9 /* switch out */
 1022 
 1023 /* PMC */
 1024 #define PMC_DEBUG_MIN_REG               8 /* pmc register */
 1025 #define PMC_DEBUG_MIN_ALR               9 /* allocate row */
 1026 
 1027 /* MACHINE DEPENDENT LAYER */
 1028 #define PMC_DEBUG_MIN_REA               8 /* read */
 1029 #define PMC_DEBUG_MIN_WRI               9 /* write */
 1030 #define PMC_DEBUG_MIN_CFG              10 /* config */
 1031 #define PMC_DEBUG_MIN_STA              11 /* start */
 1032 #define PMC_DEBUG_MIN_STO              12 /* stop */
 1033 #define PMC_DEBUG_MIN_INT              13 /* interrupts */
 1034 
 1035 /* CPU */
 1036 #define PMC_DEBUG_MIN_BND               8 /* bind */
 1037 #define PMC_DEBUG_MIN_SEL               9 /* select */
 1038 
 1039 /* LOG */
 1040 #define PMC_DEBUG_MIN_GTB               8 /* get buf */
 1041 #define PMC_DEBUG_MIN_SIO               9 /* schedule i/o */
 1042 #define PMC_DEBUG_MIN_FLS              10 /* flush */
 1043 #define PMC_DEBUG_MIN_SAM              11 /* sample */
 1044 #define PMC_DEBUG_MIN_CLO              12 /* close */
 1045 
 1046 #else
 1047 #define PMCDBG(M,N,L,F,...)             /* nothing */
 1048 #endif
 1049 
 1050 /* declare a dedicated memory pool */
 1051 MALLOC_DECLARE(M_PMC);
 1052 
 1053 /*
 1054  * Functions
 1055  */
 1056 
 1057 struct pmc_mdep *pmc_md_initialize(void);       /* MD init function */
 1058 void    pmc_md_finalize(struct pmc_mdep *_md);  /* MD fini function */
 1059 int     pmc_getrowdisp(int _ri);
 1060 int     pmc_process_interrupt(int _cpu, struct pmc *_pm,
 1061     struct trapframe *_tf, int _inuserspace);
 1062 int     pmc_save_kernel_callchain(uintptr_t *_cc, int _maxsamples,
 1063     struct trapframe *_tf);
 1064 int     pmc_save_user_callchain(uintptr_t *_cc, int _maxsamples,
 1065     struct trapframe *_tf);
 1066 #endif /* _KERNEL */
 1067 #endif /* _SYS_PMC_H_ */

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