FreeBSD/Linux Kernel Cross Reference
sys/sys/pmc.h
1 /*-
2 * Copyright (c) 2003-2008, Joseph Koshy
3 * Copyright (c) 2007 The FreeBSD Foundation
4 * All rights reserved.
5 *
6 * Portions of this software were developed by A. Joseph Koshy under
7 * sponsorship from the FreeBSD Foundation and Google, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * $FreeBSD: releng/8.0/sys/sys/pmc.h 193388 2009-06-03 17:19:12Z jkoshy $
31 */
32
33 #ifndef _SYS_PMC_H_
34 #define _SYS_PMC_H_
35
36 #include <dev/hwpmc/pmc_events.h>
37
38 #include <machine/pmc_mdep.h>
39 #include <machine/profile.h>
40
41 #define PMC_MODULE_NAME "hwpmc"
42 #define PMC_NAME_MAX 16 /* HW counter name size */
43 #define PMC_CLASS_MAX 4 /* max #classes of PMCs per-system */
44
45 /*
46 * Kernel<->userland API version number [MMmmpppp]
47 *
48 * Major numbers are to be incremented when an incompatible change to
49 * the ABI occurs that older clients will not be able to handle.
50 *
51 * Minor numbers are incremented when a backwards compatible change
52 * occurs that allows older correct programs to run unchanged. For
53 * example, when support for a new PMC type is added.
54 *
55 * The patch version is incremented for every bug fix.
56 */
57 #define PMC_VERSION_MAJOR 0x03
58 #define PMC_VERSION_MINOR 0x01
59 #define PMC_VERSION_PATCH 0x0000
60
61 #define PMC_VERSION (PMC_VERSION_MAJOR << 24 | \
62 PMC_VERSION_MINOR << 16 | PMC_VERSION_PATCH)
63
64 /*
65 * Kinds of CPUs known.
66 *
67 * We keep track of CPU variants that need to be distinguished in
68 * some way for PMC operations. CPU names are grouped by manufacturer
69 * and numbered sparsely in order to minimize changes to the ABI involved
70 * when new CPUs are added.
71 */
72
73 #define __PMC_CPUS() \
74 __PMC_CPU(AMD_K7, 0x00, "AMD K7") \
75 __PMC_CPU(AMD_K8, 0x01, "AMD K8") \
76 __PMC_CPU(INTEL_P5, 0x80, "Intel Pentium") \
77 __PMC_CPU(INTEL_P6, 0x81, "Intel Pentium Pro") \
78 __PMC_CPU(INTEL_CL, 0x82, "Intel Celeron") \
79 __PMC_CPU(INTEL_PII, 0x83, "Intel Pentium II") \
80 __PMC_CPU(INTEL_PIII, 0x84, "Intel Pentium III") \
81 __PMC_CPU(INTEL_PM, 0x85, "Intel Pentium M") \
82 __PMC_CPU(INTEL_PIV, 0x86, "Intel Pentium IV") \
83 __PMC_CPU(INTEL_CORE, 0x87, "Intel Core Solo/Duo") \
84 __PMC_CPU(INTEL_CORE2, 0x88, "Intel Core2") \
85 __PMC_CPU(INTEL_CORE2EXTREME, 0x89, "Intel Core2 Extreme") \
86 __PMC_CPU(INTEL_ATOM, 0x8A, "Intel Atom") \
87 __PMC_CPU(INTEL_COREI7, 0x8B, "Intel Core i7")
88
89 enum pmc_cputype {
90 #undef __PMC_CPU
91 #define __PMC_CPU(S,V,D) PMC_CPU_##S = V,
92 __PMC_CPUS()
93 };
94
95 #define PMC_CPU_FIRST PMC_CPU_AMD_K7
96 #define PMC_CPU_LAST PMC_CPU_INTEL_COREI7
97
98 /*
99 * Classes of PMCs
100 */
101
102 #define __PMC_CLASSES() \
103 __PMC_CLASS(TSC) /* CPU Timestamp counter */ \
104 __PMC_CLASS(K7) /* AMD K7 performance counters */ \
105 __PMC_CLASS(K8) /* AMD K8 performance counters */ \
106 __PMC_CLASS(P5) /* Intel Pentium counters */ \
107 __PMC_CLASS(P6) /* Intel Pentium Pro counters */ \
108 __PMC_CLASS(P4) /* Intel Pentium-IV counters */ \
109 __PMC_CLASS(IAF) /* Intel Core2/Atom, fixed function */ \
110 __PMC_CLASS(IAP) /* Intel Core...Atom, programmable */
111
112 enum pmc_class {
113 #undef __PMC_CLASS
114 #define __PMC_CLASS(N) PMC_CLASS_##N ,
115 __PMC_CLASSES()
116 };
117
118 #define PMC_CLASS_FIRST PMC_CLASS_TSC
119 #define PMC_CLASS_LAST PMC_CLASS_IAP
120
121 /*
122 * A PMC can be in the following states:
123 *
124 * Hardware states:
125 * DISABLED -- administratively prohibited from being used.
126 * FREE -- HW available for use
127 * Software states:
128 * ALLOCATED -- allocated
129 * STOPPED -- allocated, but not counting events
130 * RUNNING -- allocated, and in operation; 'pm_runcount'
131 * holds the number of CPUs using this PMC at
132 * a given instant
133 * DELETED -- being destroyed
134 */
135
136 #define __PMC_HWSTATES() \
137 __PMC_STATE(DISABLED) \
138 __PMC_STATE(FREE)
139
140 #define __PMC_SWSTATES() \
141 __PMC_STATE(ALLOCATED) \
142 __PMC_STATE(STOPPED) \
143 __PMC_STATE(RUNNING) \
144 __PMC_STATE(DELETED)
145
146 #define __PMC_STATES() \
147 __PMC_HWSTATES() \
148 __PMC_SWSTATES()
149
150 enum pmc_state {
151 #undef __PMC_STATE
152 #define __PMC_STATE(S) PMC_STATE_##S,
153 __PMC_STATES()
154 __PMC_STATE(MAX)
155 };
156
157 #define PMC_STATE_FIRST PMC_STATE_DISABLED
158 #define PMC_STATE_LAST PMC_STATE_DELETED
159
160 /*
161 * An allocated PMC may used as a 'global' counter or as a
162 * 'thread-private' one. Each such mode of use can be in either
163 * statistical sampling mode or in counting mode. Thus a PMC in use
164 *
165 * SS i.e., SYSTEM STATISTICAL -- system-wide statistical profiling
166 * SC i.e., SYSTEM COUNTER -- system-wide counting mode
167 * TS i.e., THREAD STATISTICAL -- thread virtual, statistical profiling
168 * TC i.e., THREAD COUNTER -- thread virtual, counting mode
169 *
170 * Statistical profiling modes rely on the PMC periodically delivering
171 * a interrupt to the CPU (when the configured number of events have
172 * been measured), so the PMC must have the ability to generate
173 * interrupts.
174 *
175 * In counting modes, the PMC counts its configured events, with the
176 * value of the PMC being read whenever needed by its owner process.
177 *
178 * The thread specific modes "virtualize" the PMCs -- the PMCs appear
179 * to be thread private and count events only when the profiled thread
180 * actually executes on the CPU.
181 *
182 * The system-wide "global" modes keep the PMCs running all the time
183 * and are used to measure the behaviour of the whole system.
184 */
185
186 #define __PMC_MODES() \
187 __PMC_MODE(SS, 0) \
188 __PMC_MODE(SC, 1) \
189 __PMC_MODE(TS, 2) \
190 __PMC_MODE(TC, 3)
191
192 enum pmc_mode {
193 #undef __PMC_MODE
194 #define __PMC_MODE(M,N) PMC_MODE_##M = N,
195 __PMC_MODES()
196 };
197
198 #define PMC_MODE_FIRST PMC_MODE_SS
199 #define PMC_MODE_LAST PMC_MODE_TC
200
201 #define PMC_IS_COUNTING_MODE(mode) \
202 ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC)
203 #define PMC_IS_SYSTEM_MODE(mode) \
204 ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC)
205 #define PMC_IS_SAMPLING_MODE(mode) \
206 ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS)
207 #define PMC_IS_VIRTUAL_MODE(mode) \
208 ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC)
209
210 /*
211 * PMC row disposition
212 */
213
214 #define __PMC_DISPOSITIONS(N) \
215 __PMC_DISP(STANDALONE) /* global/disabled counters */ \
216 __PMC_DISP(FREE) /* free/available */ \
217 __PMC_DISP(THREAD) /* thread-virtual PMCs */ \
218 __PMC_DISP(UNKNOWN) /* sentinel */
219
220 enum pmc_disp {
221 #undef __PMC_DISP
222 #define __PMC_DISP(D) PMC_DISP_##D ,
223 __PMC_DISPOSITIONS()
224 };
225
226 #define PMC_DISP_FIRST PMC_DISP_STANDALONE
227 #define PMC_DISP_LAST PMC_DISP_THREAD
228
229 /*
230 * Counter capabilities
231 *
232 * __PMC_CAPS(NAME, VALUE, DESCRIPTION)
233 */
234
235 #define __PMC_CAPS() \
236 __PMC_CAP(INTERRUPT, 0, "generate interrupts") \
237 __PMC_CAP(USER, 1, "count user-mode events") \
238 __PMC_CAP(SYSTEM, 2, "count system-mode events") \
239 __PMC_CAP(EDGE, 3, "do edge detection of events") \
240 __PMC_CAP(THRESHOLD, 4, "ignore events below a threshold") \
241 __PMC_CAP(READ, 5, "read PMC counter") \
242 __PMC_CAP(WRITE, 6, "reprogram PMC counter") \
243 __PMC_CAP(INVERT, 7, "invert comparision sense") \
244 __PMC_CAP(QUALIFIER, 8, "further qualify monitored events") \
245 __PMC_CAP(PRECISE, 9, "perform precise sampling") \
246 __PMC_CAP(TAGGING, 10, "tag upstream events") \
247 __PMC_CAP(CASCADE, 11, "cascade counters")
248
249 enum pmc_caps
250 {
251 #undef __PMC_CAP
252 #define __PMC_CAP(NAME, VALUE, DESCR) PMC_CAP_##NAME = (1 << VALUE) ,
253 __PMC_CAPS()
254 };
255
256 #define PMC_CAP_FIRST PMC_CAP_INTERRUPT
257 #define PMC_CAP_LAST PMC_CAP_CASCADE
258
259 /*
260 * PMC Event Numbers
261 *
262 * These are generated from the definitions in "dev/hwpmc/pmc_events.h".
263 */
264
265 enum pmc_event {
266 #undef __PMC_EV
267 #undef __PMC_EV_BLOCK
268 #define __PMC_EV_BLOCK(C,V) PMC_EV_ ## C ## __BLOCK_START = (V) - 1 ,
269 #define __PMC_EV(C,N) PMC_EV_ ## C ## _ ## N ,
270 __PMC_EVENTS()
271 };
272
273 /*
274 * PMC SYSCALL INTERFACE
275 */
276
277 /*
278 * "PMC_OPS" -- these are the commands recognized by the kernel
279 * module, and are used when performing a system call from userland.
280 */
281 #define __PMC_OPS() \
282 __PMC_OP(CONFIGURELOG, "Set log file") \
283 __PMC_OP(FLUSHLOG, "Flush log file") \
284 __PMC_OP(GETCPUINFO, "Get system CPU information") \
285 __PMC_OP(GETDRIVERSTATS, "Get driver statistics") \
286 __PMC_OP(GETMODULEVERSION, "Get module version") \
287 __PMC_OP(GETPMCINFO, "Get per-cpu PMC information") \
288 __PMC_OP(PMCADMIN, "Set PMC state") \
289 __PMC_OP(PMCALLOCATE, "Allocate and configure a PMC") \
290 __PMC_OP(PMCATTACH, "Attach a PMC to a process") \
291 __PMC_OP(PMCDETACH, "Detach a PMC from a process") \
292 __PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \
293 __PMC_OP(PMCRELEASE, "Release a PMC") \
294 __PMC_OP(PMCRW, "Read/Set a PMC") \
295 __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \
296 __PMC_OP(PMCSTART, "Start a PMC") \
297 __PMC_OP(PMCSTOP, "Start a PMC") \
298 __PMC_OP(WRITELOG, "Write a cookie to the log file")
299
300
301 enum pmc_ops {
302 #undef __PMC_OP
303 #define __PMC_OP(N, D) PMC_OP_##N,
304 __PMC_OPS()
305 };
306
307
308 /*
309 * Flags used in operations on PMCs.
310 */
311
312 #define PMC_F_FORCE 0x00000001 /*OP ADMIN force operation */
313 #define PMC_F_DESCENDANTS 0x00000002 /*OP ALLOCATE track descendants */
314 #define PMC_F_LOG_PROCCSW 0x00000004 /*OP ALLOCATE track ctx switches */
315 #define PMC_F_LOG_PROCEXIT 0x00000008 /*OP ALLOCATE log proc exits */
316 #define PMC_F_NEWVALUE 0x00000010 /*OP RW write new value */
317 #define PMC_F_OLDVALUE 0x00000020 /*OP RW get old value */
318 #define PMC_F_KGMON 0x00000040 /*OP ALLOCATE kgmon(8) profiling */
319 /* V2 API */
320 #define PMC_F_CALLCHAIN 0x00000080 /*OP ALLOCATE capture callchains */
321
322 /* internal flags */
323 #define PMC_F_ATTACHED_TO_OWNER 0x00010000 /*attached to owner*/
324 #define PMC_F_NEEDS_LOGFILE 0x00020000 /*needs log file */
325 #define PMC_F_ATTACH_DONE 0x00040000 /*attached at least once */
326
327 #define PMC_CALLCHAIN_DEPTH_MAX 32
328 #define PMC_CC_F_USERSPACE 0x01 /*userspace callchain*/
329
330 /*
331 * Cookies used to denote allocated PMCs, and the values of PMCs.
332 */
333
334 typedef uint32_t pmc_id_t;
335 typedef uint64_t pmc_value_t;
336
337 #define PMC_ID_INVALID (~ (pmc_id_t) 0)
338
339 /*
340 * PMC IDs have the following format:
341 *
342 * +--------+----------+-----------+-----------+
343 * | CPU | PMC MODE | PMC CLASS | ROW INDEX |
344 * +--------+----------+-----------+-----------+
345 *
346 * where each field is 8 bits wide. Field 'CPU' is set to the
347 * requested CPU for system-wide PMCs or PMC_CPU_ANY for process-mode
348 * PMCs. Field 'PMC MODE' is the allocated PMC mode. Field 'PMC
349 * CLASS' is the class of the PMC. Field 'ROW INDEX' is the row index
350 * for the PMC.
351 *
352 * The 'ROW INDEX' ranges over 0..NWPMCS where NHWPMCS is the total
353 * number of hardware PMCs on this cpu.
354 */
355
356
357 #define PMC_ID_TO_ROWINDEX(ID) ((ID) & 0xFF)
358 #define PMC_ID_TO_CLASS(ID) (((ID) & 0xFF00) >> 8)
359 #define PMC_ID_TO_MODE(ID) (((ID) & 0xFF0000) >> 16)
360 #define PMC_ID_TO_CPU(ID) (((ID) & 0xFF000000) >> 24)
361 #define PMC_ID_MAKE_ID(CPU,MODE,CLASS,ROWINDEX) \
362 ((((CPU) & 0xFF) << 24) | (((MODE) & 0xFF) << 16) | \
363 (((CLASS) & 0xFF) << 8) | ((ROWINDEX) & 0xFF))
364
365 /*
366 * Data structures for system calls supported by the pmc driver.
367 */
368
369 /*
370 * OP PMCALLOCATE
371 *
372 * Allocate a PMC on the named CPU.
373 */
374
375 #define PMC_CPU_ANY ~0
376
377 struct pmc_op_pmcallocate {
378 uint32_t pm_caps; /* PMC_CAP_* */
379 uint32_t pm_cpu; /* CPU number or PMC_CPU_ANY */
380 enum pmc_class pm_class; /* class of PMC desired */
381 enum pmc_event pm_ev; /* [enum pmc_event] desired */
382 uint32_t pm_flags; /* additional modifiers PMC_F_* */
383 enum pmc_mode pm_mode; /* desired mode */
384 pmc_id_t pm_pmcid; /* [return] process pmc id */
385
386 union pmc_md_op_pmcallocate pm_md; /* MD layer extensions */
387 };
388
389 /*
390 * OP PMCADMIN
391 *
392 * Set the administrative state (i.e., whether enabled or disabled) of
393 * a PMC 'pm_pmc' on CPU 'pm_cpu'. Note that 'pm_pmc' specifies an
394 * absolute PMC number and need not have been first allocated by the
395 * calling process.
396 */
397
398 struct pmc_op_pmcadmin {
399 int pm_cpu; /* CPU# */
400 uint32_t pm_flags; /* flags */
401 int pm_pmc; /* PMC# */
402 enum pmc_state pm_state; /* desired state */
403 };
404
405 /*
406 * OP PMCATTACH / OP PMCDETACH
407 *
408 * Attach/detach a PMC and a process.
409 */
410
411 struct pmc_op_pmcattach {
412 pmc_id_t pm_pmc; /* PMC to attach to */
413 pid_t pm_pid; /* target process */
414 };
415
416 /*
417 * OP PMCSETCOUNT
418 *
419 * Set the sampling rate (i.e., the reload count) for statistical counters.
420 * 'pm_pmcid' need to have been previously allocated using PMCALLOCATE.
421 */
422
423 struct pmc_op_pmcsetcount {
424 pmc_value_t pm_count; /* initial/sample count */
425 pmc_id_t pm_pmcid; /* PMC id to set */
426 };
427
428
429 /*
430 * OP PMCRW
431 *
432 * Read the value of a PMC named by 'pm_pmcid'. 'pm_pmcid' needs
433 * to have been previously allocated using PMCALLOCATE.
434 */
435
436
437 struct pmc_op_pmcrw {
438 uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/
439 pmc_id_t pm_pmcid; /* pmc id */
440 pmc_value_t pm_value; /* new&returned value */
441 };
442
443
444 /*
445 * OP GETPMCINFO
446 *
447 * retrieve PMC state for a named CPU. The caller is expected to
448 * allocate 'npmc' * 'struct pmc_info' bytes of space for the return
449 * values.
450 */
451
452 struct pmc_info {
453 char pm_name[PMC_NAME_MAX]; /* pmc name */
454 enum pmc_class pm_class; /* enum pmc_class */
455 int pm_enabled; /* whether enabled */
456 enum pmc_disp pm_rowdisp; /* FREE, THREAD or STANDLONE */
457 pid_t pm_ownerpid; /* owner, or -1 */
458 enum pmc_mode pm_mode; /* current mode [enum pmc_mode] */
459 enum pmc_event pm_event; /* current event */
460 uint32_t pm_flags; /* current flags */
461 pmc_value_t pm_reloadcount; /* sampling counters only */
462 };
463
464 struct pmc_op_getpmcinfo {
465 int32_t pm_cpu; /* 0 <= cpu < mp_maxid */
466 struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */
467 };
468
469
470 /*
471 * OP GETCPUINFO
472 *
473 * Retrieve system CPU information.
474 */
475
476 struct pmc_classinfo {
477 enum pmc_class pm_class; /* class id */
478 uint32_t pm_caps; /* counter capabilities */
479 uint32_t pm_width; /* width of the PMC */
480 uint32_t pm_num; /* number of PMCs in class */
481 };
482
483 struct pmc_op_getcpuinfo {
484 enum pmc_cputype pm_cputype; /* what kind of CPU */
485 uint32_t pm_ncpu; /* max CPU number */
486 uint32_t pm_npmc; /* #PMCs per CPU */
487 uint32_t pm_nclass; /* #classes of PMCs */
488 struct pmc_classinfo pm_classes[PMC_CLASS_MAX];
489 };
490
491 /*
492 * OP CONFIGURELOG
493 *
494 * Configure a log file for writing system-wide statistics to.
495 */
496
497 struct pmc_op_configurelog {
498 int pm_flags;
499 int pm_logfd; /* logfile fd (or -1) */
500 };
501
502 /*
503 * OP GETDRIVERSTATS
504 *
505 * Retrieve pmc(4) driver-wide statistics.
506 */
507
508 struct pmc_op_getdriverstats {
509 int pm_intr_ignored; /* #interrupts ignored */
510 int pm_intr_processed; /* #interrupts processed */
511 int pm_intr_bufferfull; /* #interrupts with ENOSPC */
512 int pm_syscalls; /* #syscalls */
513 int pm_syscall_errors; /* #syscalls with errors */
514 int pm_buffer_requests; /* #buffer requests */
515 int pm_buffer_requests_failed; /* #failed buffer requests */
516 int pm_log_sweeps; /* #sample buffer processing passes */
517 };
518
519 /*
520 * OP RELEASE / OP START / OP STOP
521 *
522 * Simple operations on a PMC id.
523 */
524
525 struct pmc_op_simple {
526 pmc_id_t pm_pmcid;
527 };
528
529 /*
530 * OP WRITELOG
531 *
532 * Flush the current log buffer and write 4 bytes of user data to it.
533 */
534
535 struct pmc_op_writelog {
536 uint32_t pm_userdata;
537 };
538
539 /*
540 * OP GETMSR
541 *
542 * Retrieve the machine specific address assoicated with the allocated
543 * PMC. This number can be used subsequently with a read-performance-counter
544 * instruction.
545 */
546
547 struct pmc_op_getmsr {
548 uint32_t pm_msr; /* machine specific address */
549 pmc_id_t pm_pmcid; /* allocated pmc id */
550 };
551
552 #ifdef _KERNEL
553
554 #include <sys/malloc.h>
555 #include <sys/sysctl.h>
556
557 #include <machine/frame.h>
558
559 #define PMC_HASH_SIZE 16
560 #define PMC_MTXPOOL_SIZE 32
561 #define PMC_LOG_BUFFER_SIZE 4
562 #define PMC_NLOGBUFFERS 16
563 #define PMC_NSAMPLES 32
564 #define PMC_CALLCHAIN_DEPTH 8
565
566 #define PMC_SYSCTL_NAME_PREFIX "kern." PMC_MODULE_NAME "."
567
568 /*
569 * Locking keys
570 *
571 * (b) - pmc_bufferlist_mtx (spin lock)
572 * (k) - pmc_kthread_mtx (sleep lock)
573 * (o) - po->po_mtx (spin lock)
574 */
575
576 /*
577 * PMC commands
578 */
579
580 struct pmc_syscall_args {
581 uint32_t pmop_code; /* one of PMC_OP_* */
582 void *pmop_data; /* syscall parameter */
583 };
584
585 /*
586 * Interface to processor specific s1tuff
587 */
588
589 /*
590 * struct pmc_descr
591 *
592 * Machine independent (i.e., the common parts) of a human readable
593 * PMC description.
594 */
595
596 struct pmc_descr {
597 char pd_name[PMC_NAME_MAX]; /* name */
598 uint32_t pd_caps; /* capabilities */
599 enum pmc_class pd_class; /* class of the PMC */
600 uint32_t pd_width; /* width in bits */
601 };
602
603 /*
604 * struct pmc_target
605 *
606 * This structure records all the target processes associated with a
607 * PMC.
608 */
609
610 struct pmc_target {
611 LIST_ENTRY(pmc_target) pt_next;
612 struct pmc_process *pt_process; /* target descriptor */
613 };
614
615 /*
616 * struct pmc
617 *
618 * Describes each allocated PMC.
619 *
620 * Each PMC has precisely one owner, namely the process that allocated
621 * the PMC.
622 *
623 * A PMC may be attached to multiple target processes. The
624 * 'pm_targets' field links all the target processes being monitored
625 * by this PMC.
626 *
627 * The 'pm_savedvalue' field is protected by a mutex.
628 *
629 * On a multi-cpu machine, multiple target threads associated with a
630 * process-virtual PMC could be concurrently executing on different
631 * CPUs. The 'pm_runcount' field is atomically incremented every time
632 * the PMC gets scheduled on a CPU and atomically decremented when it
633 * get descheduled. Deletion of a PMC is only permitted when this
634 * field is ''.
635 *
636 */
637
638 struct pmc {
639 LIST_HEAD(,pmc_target) pm_targets; /* list of target processes */
640 LIST_ENTRY(pmc) pm_next; /* owner's list */
641
642 /*
643 * System-wide PMCs are allocated on a CPU and are not moved
644 * around. For system-wide PMCs we record the CPU the PMC was
645 * allocated on in the 'CPU' field of the pmc ID.
646 *
647 * Virtual PMCs run on whichever CPU is currently executing
648 * their targets' threads. For these PMCs we need to save
649 * their current PMC counter values when they are taken off
650 * CPU.
651 */
652
653 union {
654 pmc_value_t pm_savedvalue; /* Virtual PMCS */
655 } pm_gv;
656
657 /*
658 * For sampling mode PMCs, we keep track of the PMC's "reload
659 * count", which is the counter value to be loaded in when
660 * arming the PMC for the next counting session. For counting
661 * modes on PMCs that are read-only (e.g., the x86 TSC), we
662 * keep track of the initial value at the start of
663 * counting-mode operation.
664 */
665
666 union {
667 pmc_value_t pm_reloadcount; /* sampling PMC modes */
668 pmc_value_t pm_initial; /* counting PMC modes */
669 } pm_sc;
670
671 uint32_t pm_stalled; /* marks stalled sampling PMCs */
672 uint32_t pm_caps; /* PMC capabilities */
673 enum pmc_event pm_event; /* event being measured */
674 uint32_t pm_flags; /* additional flags PMC_F_... */
675 struct pmc_owner *pm_owner; /* owner thread state */
676 uint32_t pm_runcount; /* #cpus currently on */
677 enum pmc_state pm_state; /* current PMC state */
678
679 /*
680 * The PMC ID field encodes the row-index for the PMC, its
681 * mode, class and the CPU# associated with the PMC.
682 */
683
684 pmc_id_t pm_id; /* allocated PMC id */
685
686 /* md extensions */
687 union pmc_md_pmc pm_md;
688 };
689
690 /*
691 * Accessor macros for 'struct pmc'
692 */
693
694 #define PMC_TO_MODE(P) PMC_ID_TO_MODE((P)->pm_id)
695 #define PMC_TO_CLASS(P) PMC_ID_TO_CLASS((P)->pm_id)
696 #define PMC_TO_ROWINDEX(P) PMC_ID_TO_ROWINDEX((P)->pm_id)
697 #define PMC_TO_CPU(P) PMC_ID_TO_CPU((P)->pm_id)
698
699
700 /*
701 * struct pmc_process
702 *
703 * Record a 'target' process being profiled.
704 *
705 * The target process being profiled could be different from the owner
706 * process which allocated the PMCs. Each target process descriptor
707 * is associated with NHWPMC 'struct pmc *' pointers. Each PMC at a
708 * given hardware row-index 'n' will use slot 'n' of the 'pp_pmcs[]'
709 * array. The size of this structure is thus PMC architecture
710 * dependent.
711 *
712 */
713
714 struct pmc_targetstate {
715 struct pmc *pp_pmc; /* target PMC */
716 pmc_value_t pp_pmcval; /* per-process value */
717 };
718
719 struct pmc_process {
720 LIST_ENTRY(pmc_process) pp_next; /* hash chain */
721 int pp_refcnt; /* reference count */
722 uint32_t pp_flags; /* flags PMC_PP_* */
723 struct proc *pp_proc; /* target thread */
724 struct pmc_targetstate pp_pmcs[]; /* NHWPMCs */
725 };
726
727 #define PMC_PP_ENABLE_MSR_ACCESS 0x00000001
728
729 /*
730 * struct pmc_owner
731 *
732 * We associate a PMC with an 'owner' process.
733 *
734 * A process can be associated with 0..NCPUS*NHWPMC PMCs during its
735 * lifetime, where NCPUS is the numbers of CPUS in the system and
736 * NHWPMC is the number of hardware PMCs per CPU. These are
737 * maintained in the list headed by the 'po_pmcs' to save on space.
738 *
739 */
740
741 struct pmc_owner {
742 LIST_ENTRY(pmc_owner) po_next; /* hash chain */
743 LIST_ENTRY(pmc_owner) po_ssnext; /* list of SS PMC owners */
744 LIST_HEAD(, pmc) po_pmcs; /* owned PMC list */
745 TAILQ_HEAD(, pmclog_buffer) po_logbuffers; /* (o) logbuffer list */
746 struct mtx po_mtx; /* spin lock for (o) */
747 struct proc *po_owner; /* owner proc */
748 uint32_t po_flags; /* (k) flags PMC_PO_* */
749 struct proc *po_kthread; /* (k) helper kthread */
750 struct pmclog_buffer *po_curbuf; /* current log buffer */
751 struct file *po_file; /* file reference */
752 int po_error; /* recorded error */
753 int po_sscount; /* # SS PMCs owned */
754 };
755
756 #define PMC_PO_OWNS_LOGFILE 0x00000001 /* has a log file */
757 #define PMC_PO_IN_FLUSH 0x00000010 /* in the middle of a flush */
758 #define PMC_PO_INITIAL_MAPPINGS_DONE 0x00000020
759
760 /*
761 * struct pmc_hw -- describe the state of the PMC hardware
762 *
763 * When in use, a HW PMC is associated with one allocated 'struct pmc'
764 * pointed to by field 'phw_pmc'. When inactive, this field is NULL.
765 *
766 * On an SMP box, one or more HW PMC's in process virtual mode with
767 * the same 'phw_pmc' could be executing on different CPUs. In order
768 * to handle this case correctly, we need to ensure that only
769 * incremental counts get added to the saved value in the associated
770 * 'struct pmc'. The 'phw_save' field is used to keep the saved PMC
771 * value at the time the hardware is started during this context
772 * switch (i.e., the difference between the new (hardware) count and
773 * the saved count is atomically added to the count field in 'struct
774 * pmc' at context switch time).
775 *
776 */
777
778 struct pmc_hw {
779 uint32_t phw_state; /* see PHW_* macros below */
780 struct pmc *phw_pmc; /* current thread PMC */
781 };
782
783 #define PMC_PHW_RI_MASK 0x000000FF
784 #define PMC_PHW_CPU_SHIFT 8
785 #define PMC_PHW_CPU_MASK 0x0000FF00
786 #define PMC_PHW_FLAGS_SHIFT 16
787 #define PMC_PHW_FLAGS_MASK 0xFFFF0000
788
789 #define PMC_PHW_INDEX_TO_STATE(ri) ((ri) & PMC_PHW_RI_MASK)
790 #define PMC_PHW_STATE_TO_INDEX(state) ((state) & PMC_PHW_RI_MASK)
791 #define PMC_PHW_CPU_TO_STATE(cpu) (((cpu) << PMC_PHW_CPU_SHIFT) & \
792 PMC_PHW_CPU_MASK)
793 #define PMC_PHW_STATE_TO_CPU(state) (((state) & PMC_PHW_CPU_MASK) >> \
794 PMC_PHW_CPU_SHIFT)
795 #define PMC_PHW_FLAGS_TO_STATE(flags) (((flags) << PMC_PHW_FLAGS_SHIFT) & \
796 PMC_PHW_FLAGS_MASK)
797 #define PMC_PHW_STATE_TO_FLAGS(state) (((state) & PMC_PHW_FLAGS_MASK) >> \
798 PMC_PHW_FLAGS_SHIFT)
799 #define PMC_PHW_FLAG_IS_ENABLED (PMC_PHW_FLAGS_TO_STATE(0x01))
800 #define PMC_PHW_FLAG_IS_SHAREABLE (PMC_PHW_FLAGS_TO_STATE(0x02))
801
802 /*
803 * struct pmc_sample
804 *
805 * Space for N (tunable) PC samples and associated control data.
806 */
807
808 struct pmc_sample {
809 uint16_t ps_nsamples; /* callchain depth */
810 uint8_t ps_cpu; /* cpu number */
811 uint8_t ps_flags; /* other flags */
812 pid_t ps_pid; /* process PID or -1 */
813 struct thread *ps_td; /* which thread */
814 struct pmc *ps_pmc; /* interrupting PMC */
815 uintptr_t *ps_pc; /* (const) callchain start */
816 };
817
818 #define PMC_SAMPLE_FREE ((uint16_t) 0)
819 #define PMC_SAMPLE_INUSE ((uint16_t) 0xFFFF)
820
821 struct pmc_samplebuffer {
822 struct pmc_sample * volatile ps_read; /* read pointer */
823 struct pmc_sample * volatile ps_write; /* write pointer */
824 uintptr_t *ps_callchains; /* all saved call chains */
825 struct pmc_sample *ps_fence; /* one beyond ps_samples[] */
826 struct pmc_sample ps_samples[]; /* array of sample entries */
827 };
828
829
830 /*
831 * struct pmc_cpustate
832 *
833 * A CPU is modelled as a collection of HW PMCs with space for additional
834 * flags.
835 */
836
837 struct pmc_cpu {
838 uint32_t pc_state; /* physical cpu number + flags */
839 struct pmc_samplebuffer *pc_sb; /* space for samples */
840 struct pmc_hw *pc_hwpmcs[]; /* 'npmc' pointers */
841 };
842
843 #define PMC_PCPU_CPU_MASK 0x000000FF
844 #define PMC_PCPU_FLAGS_MASK 0xFFFFFF00
845 #define PMC_PCPU_FLAGS_SHIFT 8
846 #define PMC_PCPU_STATE_TO_CPU(S) ((S) & PMC_PCPU_CPU_MASK)
847 #define PMC_PCPU_STATE_TO_FLAGS(S) (((S) & PMC_PCPU_FLAGS_MASK) >> PMC_PCPU_FLAGS_SHIFT)
848 #define PMC_PCPU_FLAGS_TO_STATE(F) (((F) << PMC_PCPU_FLAGS_SHIFT) & PMC_PCPU_FLAGS_MASK)
849 #define PMC_PCPU_CPU_TO_STATE(C) ((C) & PMC_PCPU_CPU_MASK)
850 #define PMC_PCPU_FLAG_HTT (PMC_PCPU_FLAGS_TO_STATE(0x1))
851
852 /*
853 * struct pmc_binding
854 *
855 * CPU binding information.
856 */
857
858 struct pmc_binding {
859 int pb_bound; /* is bound? */
860 int pb_cpu; /* if so, to which CPU */
861 };
862
863
864 struct pmc_mdep;
865
866 /*
867 * struct pmc_classdep
868 *
869 * PMC class-dependent operations.
870 */
871 struct pmc_classdep {
872 uint32_t pcd_caps; /* class capabilities */
873 enum pmc_class pcd_class; /* class id */
874 int pcd_num; /* number of PMCs */
875 int pcd_ri; /* row index of the first PMC in class */
876 int pcd_width; /* width of the PMC */
877
878 /* configuring/reading/writing the hardware PMCs */
879 int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm);
880 int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm);
881 int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value);
882 int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value);
883
884 /* pmc allocation/release */
885 int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t,
886 const struct pmc_op_pmcallocate *_a);
887 int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm);
888
889 /* starting and stopping PMCs */
890 int (*pcd_start_pmc)(int _cpu, int _ri);
891 int (*pcd_stop_pmc)(int _cpu, int _ri);
892
893 /* description */
894 int (*pcd_describe)(int _cpu, int _ri, struct pmc_info *_pi,
895 struct pmc **_ppmc);
896
897 /* class-dependent initialization & finalization */
898 int (*pcd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
899 int (*pcd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
900
901 /* machine-specific interface */
902 int (*pcd_get_msr)(int _ri, uint32_t *_msr);
903 };
904
905 /*
906 * struct pmc_mdep
907 *
908 * Machine dependent bits needed per CPU type.
909 */
910
911 struct pmc_mdep {
912 uint32_t pmd_cputype; /* from enum pmc_cputype */
913 uint32_t pmd_npmc; /* number of PMCs per CPU */
914 uint32_t pmd_nclass; /* number of PMC classes present */
915
916 /*
917 * Machine dependent methods.
918 */
919
920 /* per-cpu initialization and finalization */
921 int (*pmd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
922 int (*pmd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
923
924 /* thread context switch in/out */
925 int (*pmd_switch_in)(struct pmc_cpu *_p, struct pmc_process *_pp);
926 int (*pmd_switch_out)(struct pmc_cpu *_p, struct pmc_process *_pp);
927
928 /* handle a PMC interrupt */
929 int (*pmd_intr)(int _cpu, struct trapframe *_tf);
930
931 /*
932 * PMC class dependent information.
933 */
934 struct pmc_classdep pmd_classdep[];
935 };
936
937 /*
938 * Per-CPU state. This is an array of 'mp_ncpu' pointers
939 * to struct pmc_cpu descriptors.
940 */
941
942 extern struct pmc_cpu **pmc_pcpu;
943
944 /* driver statistics */
945 extern struct pmc_op_getdriverstats pmc_stats;
946
947 #if defined(DEBUG) && DEBUG
948
949 /* debug flags, major flag groups */
950 struct pmc_debugflags {
951 int pdb_CPU;
952 int pdb_CSW;
953 int pdb_LOG;
954 int pdb_MDP;
955 int pdb_MOD;
956 int pdb_OWN;
957 int pdb_PMC;
958 int pdb_PRC;
959 int pdb_SAM;
960 };
961
962 extern struct pmc_debugflags pmc_debugflags;
963
964 #define PMC_DEBUG_STRSIZE 128
965 #define PMC_DEBUG_DEFAULT_FLAGS { 0, 0, 0, 0, 0, 0, 0, 0 }
966
967 #define PMCDBG(M,N,L,F,...) do { \
968 if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \
969 printf(#M ":" #N ":" #L ": " F "\n", __VA_ARGS__); \
970 } while (0)
971
972 /* Major numbers */
973 #define PMC_DEBUG_MAJ_CPU 0 /* cpu switches */
974 #define PMC_DEBUG_MAJ_CSW 1 /* context switches */
975 #define PMC_DEBUG_MAJ_LOG 2 /* logging */
976 #define PMC_DEBUG_MAJ_MDP 3 /* machine dependent */
977 #define PMC_DEBUG_MAJ_MOD 4 /* misc module infrastructure */
978 #define PMC_DEBUG_MAJ_OWN 5 /* owner */
979 #define PMC_DEBUG_MAJ_PMC 6 /* pmc management */
980 #define PMC_DEBUG_MAJ_PRC 7 /* processes */
981 #define PMC_DEBUG_MAJ_SAM 8 /* sampling */
982
983 /* Minor numbers */
984
985 /* Common (8 bits) */
986 #define PMC_DEBUG_MIN_ALL 0 /* allocation */
987 #define PMC_DEBUG_MIN_REL 1 /* release */
988 #define PMC_DEBUG_MIN_OPS 2 /* ops: start, stop, ... */
989 #define PMC_DEBUG_MIN_INI 3 /* init */
990 #define PMC_DEBUG_MIN_FND 4 /* find */
991
992 /* MODULE */
993 #define PMC_DEBUG_MIN_PMH 14 /* pmc_hook */
994 #define PMC_DEBUG_MIN_PMS 15 /* pmc_syscall */
995
996 /* OWN */
997 #define PMC_DEBUG_MIN_ORM 8 /* owner remove */
998 #define PMC_DEBUG_MIN_OMR 9 /* owner maybe remove */
999
1000 /* PROCESSES */
1001 #define PMC_DEBUG_MIN_TLK 8 /* link target */
1002 #define PMC_DEBUG_MIN_TUL 9 /* unlink target */
1003 #define PMC_DEBUG_MIN_EXT 10 /* process exit */
1004 #define PMC_DEBUG_MIN_EXC 11 /* process exec */
1005 #define PMC_DEBUG_MIN_FRK 12 /* process fork */
1006 #define PMC_DEBUG_MIN_ATT 13 /* attach/detach */
1007 #define PMC_DEBUG_MIN_SIG 14 /* signalling */
1008
1009 /* CONTEXT SWITCHES */
1010 #define PMC_DEBUG_MIN_SWI 8 /* switch in */
1011 #define PMC_DEBUG_MIN_SWO 9 /* switch out */
1012
1013 /* PMC */
1014 #define PMC_DEBUG_MIN_REG 8 /* pmc register */
1015 #define PMC_DEBUG_MIN_ALR 9 /* allocate row */
1016
1017 /* MACHINE DEPENDENT LAYER */
1018 #define PMC_DEBUG_MIN_REA 8 /* read */
1019 #define PMC_DEBUG_MIN_WRI 9 /* write */
1020 #define PMC_DEBUG_MIN_CFG 10 /* config */
1021 #define PMC_DEBUG_MIN_STA 11 /* start */
1022 #define PMC_DEBUG_MIN_STO 12 /* stop */
1023 #define PMC_DEBUG_MIN_INT 13 /* interrupts */
1024
1025 /* CPU */
1026 #define PMC_DEBUG_MIN_BND 8 /* bind */
1027 #define PMC_DEBUG_MIN_SEL 9 /* select */
1028
1029 /* LOG */
1030 #define PMC_DEBUG_MIN_GTB 8 /* get buf */
1031 #define PMC_DEBUG_MIN_SIO 9 /* schedule i/o */
1032 #define PMC_DEBUG_MIN_FLS 10 /* flush */
1033 #define PMC_DEBUG_MIN_SAM 11 /* sample */
1034
1035 #else
1036 #define PMCDBG(M,N,L,F,...) /* nothing */
1037 #endif
1038
1039 /* declare a dedicated memory pool */
1040 MALLOC_DECLARE(M_PMC);
1041
1042 /*
1043 * Functions
1044 */
1045
1046 struct pmc_mdep *pmc_md_initialize(void); /* MD init function */
1047 void pmc_md_finalize(struct pmc_mdep *_md); /* MD fini function */
1048 int pmc_getrowdisp(int _ri);
1049 int pmc_process_interrupt(int _cpu, struct pmc *_pm,
1050 struct trapframe *_tf, int _inuserspace);
1051 int pmc_save_kernel_callchain(uintptr_t *_cc, int _maxsamples,
1052 struct trapframe *_tf);
1053 int pmc_save_user_callchain(uintptr_t *_cc, int _maxsamples,
1054 struct trapframe *_tf);
1055 #endif /* _KERNEL */
1056 #endif /* _SYS_PMC_H_ */
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