The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/sys/pmc.h

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    1 /*-
    2  * Copyright (c) 2003-2008, Joseph Koshy
    3  * Copyright (c) 2007 The FreeBSD Foundation
    4  * All rights reserved.
    5  *
    6  * Portions of this software were developed by A. Joseph Koshy under
    7  * sponsorship from the FreeBSD Foundation and Google, Inc.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  *
   30  * $FreeBSD: releng/8.1/sys/sys/pmc.h 206701 2010-04-16 15:43:24Z fabient $
   31  */
   32 
   33 #ifndef _SYS_PMC_H_
   34 #define _SYS_PMC_H_
   35 
   36 #include <dev/hwpmc/pmc_events.h>
   37 
   38 #include <machine/pmc_mdep.h>
   39 #include <machine/profile.h>
   40 
   41 #define PMC_MODULE_NAME         "hwpmc"
   42 #define PMC_NAME_MAX            16 /* HW counter name size */
   43 #define PMC_CLASS_MAX           6  /* max #classes of PMCs per-system */
   44 
   45 /*
   46  * Kernel<->userland API version number [MMmmpppp]
   47  *
   48  * Major numbers are to be incremented when an incompatible change to
   49  * the ABI occurs that older clients will not be able to handle.
   50  *
   51  * Minor numbers are incremented when a backwards compatible change
   52  * occurs that allows older correct programs to run unchanged.  For
   53  * example, when support for a new PMC type is added.
   54  *
   55  * The patch version is incremented for every bug fix.
   56  */
   57 #define PMC_VERSION_MAJOR       0x03
   58 #define PMC_VERSION_MINOR       0x01
   59 #define PMC_VERSION_PATCH       0x0000
   60 
   61 #define PMC_VERSION             (PMC_VERSION_MAJOR << 24 |              \
   62         PMC_VERSION_MINOR << 16 | PMC_VERSION_PATCH)
   63 
   64 /*
   65  * Kinds of CPUs known.
   66  *
   67  * We keep track of CPU variants that need to be distinguished in
   68  * some way for PMC operations.  CPU names are grouped by manufacturer
   69  * and numbered sparsely in order to minimize changes to the ABI involved
   70  * when new CPUs are added.
   71  */
   72 
   73 #define __PMC_CPUS()                                            \
   74         __PMC_CPU(AMD_K7,       0x00,   "AMD K7")               \
   75         __PMC_CPU(AMD_K8,       0x01,   "AMD K8")               \
   76         __PMC_CPU(INTEL_P5,     0x80,   "Intel Pentium")        \
   77         __PMC_CPU(INTEL_P6,     0x81,   "Intel Pentium Pro")    \
   78         __PMC_CPU(INTEL_CL,     0x82,   "Intel Celeron")        \
   79         __PMC_CPU(INTEL_PII,    0x83,   "Intel Pentium II")     \
   80         __PMC_CPU(INTEL_PIII,   0x84,   "Intel Pentium III")    \
   81         __PMC_CPU(INTEL_PM,     0x85,   "Intel Pentium M")      \
   82         __PMC_CPU(INTEL_PIV,    0x86,   "Intel Pentium IV")     \
   83         __PMC_CPU(INTEL_CORE,   0x87,   "Intel Core Solo/Duo")  \
   84         __PMC_CPU(INTEL_CORE2,  0x88,   "Intel Core2")          \
   85         __PMC_CPU(INTEL_CORE2EXTREME,   0x89,   "Intel Core2 Extreme")  \
   86         __PMC_CPU(INTEL_ATOM,   0x8A,   "Intel Atom")           \
   87         __PMC_CPU(INTEL_COREI7, 0x8B,   "Intel Core i7")        \
   88         __PMC_CPU(INTEL_WESTMERE, 0x8C,   "Intel Westmere")
   89 
   90 enum pmc_cputype {
   91 #undef  __PMC_CPU
   92 #define __PMC_CPU(S,V,D)        PMC_CPU_##S = V,
   93         __PMC_CPUS()
   94 };
   95 
   96 #define PMC_CPU_FIRST   PMC_CPU_AMD_K7
   97 #define PMC_CPU_LAST    PMC_CPU_INTEL_WESTMERE
   98 
   99 /*
  100  * Classes of PMCs
  101  */
  102 
  103 #define __PMC_CLASSES()                                                 \
  104         __PMC_CLASS(TSC)        /* CPU Timestamp counter */             \
  105         __PMC_CLASS(K7)         /* AMD K7 performance counters */       \
  106         __PMC_CLASS(K8)         /* AMD K8 performance counters */       \
  107         __PMC_CLASS(P5)         /* Intel Pentium counters */            \
  108         __PMC_CLASS(P6)         /* Intel Pentium Pro counters */        \
  109         __PMC_CLASS(P4)         /* Intel Pentium-IV counters */         \
  110         __PMC_CLASS(IAF)        /* Intel Core2/Atom, fixed function */  \
  111         __PMC_CLASS(IAP)        /* Intel Core...Atom, programmable */   \
  112         __PMC_CLASS(UCF)        /* Intel Uncore programmable */         \
  113         __PMC_CLASS(UCP)        /* Intel Uncore fixed function */
  114 
  115 enum pmc_class {
  116 #undef  __PMC_CLASS
  117 #define __PMC_CLASS(N)  PMC_CLASS_##N ,
  118         __PMC_CLASSES()
  119 };
  120 
  121 #define PMC_CLASS_FIRST PMC_CLASS_TSC
  122 #define PMC_CLASS_LAST  PMC_CLASS_UCP
  123 
  124 /*
  125  * A PMC can be in the following states:
  126  *
  127  * Hardware states:
  128  *   DISABLED   -- administratively prohibited from being used.
  129  *   FREE       -- HW available for use
  130  * Software states:
  131  *   ALLOCATED  -- allocated
  132  *   STOPPED    -- allocated, but not counting events
  133  *   RUNNING    -- allocated, and in operation; 'pm_runcount'
  134  *                 holds the number of CPUs using this PMC at
  135  *                 a given instant
  136  *   DELETED    -- being destroyed
  137  */
  138 
  139 #define __PMC_HWSTATES()                        \
  140         __PMC_STATE(DISABLED)                   \
  141         __PMC_STATE(FREE)
  142 
  143 #define __PMC_SWSTATES()                        \
  144         __PMC_STATE(ALLOCATED)                  \
  145         __PMC_STATE(STOPPED)                    \
  146         __PMC_STATE(RUNNING)                    \
  147         __PMC_STATE(DELETED)
  148 
  149 #define __PMC_STATES()                          \
  150         __PMC_HWSTATES()                        \
  151         __PMC_SWSTATES()
  152 
  153 enum pmc_state {
  154 #undef  __PMC_STATE
  155 #define __PMC_STATE(S)  PMC_STATE_##S,
  156         __PMC_STATES()
  157         __PMC_STATE(MAX)
  158 };
  159 
  160 #define PMC_STATE_FIRST PMC_STATE_DISABLED
  161 #define PMC_STATE_LAST  PMC_STATE_DELETED
  162 
  163 /*
  164  * An allocated PMC may used as a 'global' counter or as a
  165  * 'thread-private' one.  Each such mode of use can be in either
  166  * statistical sampling mode or in counting mode.  Thus a PMC in use
  167  *
  168  * SS i.e., SYSTEM STATISTICAL  -- system-wide statistical profiling
  169  * SC i.e., SYSTEM COUNTER      -- system-wide counting mode
  170  * TS i.e., THREAD STATISTICAL  -- thread virtual, statistical profiling
  171  * TC i.e., THREAD COUNTER      -- thread virtual, counting mode
  172  *
  173  * Statistical profiling modes rely on the PMC periodically delivering
  174  * a interrupt to the CPU (when the configured number of events have
  175  * been measured), so the PMC must have the ability to generate
  176  * interrupts.
  177  *
  178  * In counting modes, the PMC counts its configured events, with the
  179  * value of the PMC being read whenever needed by its owner process.
  180  *
  181  * The thread specific modes "virtualize" the PMCs -- the PMCs appear
  182  * to be thread private and count events only when the profiled thread
  183  * actually executes on the CPU.
  184  *
  185  * The system-wide "global" modes keep the PMCs running all the time
  186  * and are used to measure the behaviour of the whole system.
  187  */
  188 
  189 #define __PMC_MODES()                           \
  190         __PMC_MODE(SS,  0)                      \
  191         __PMC_MODE(SC,  1)                      \
  192         __PMC_MODE(TS,  2)                      \
  193         __PMC_MODE(TC,  3)
  194 
  195 enum pmc_mode {
  196 #undef  __PMC_MODE
  197 #define __PMC_MODE(M,N) PMC_MODE_##M = N,
  198         __PMC_MODES()
  199 };
  200 
  201 #define PMC_MODE_FIRST  PMC_MODE_SS
  202 #define PMC_MODE_LAST   PMC_MODE_TC
  203 
  204 #define PMC_IS_COUNTING_MODE(mode)                              \
  205         ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC)
  206 #define PMC_IS_SYSTEM_MODE(mode)                                \
  207         ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC)
  208 #define PMC_IS_SAMPLING_MODE(mode)                              \
  209         ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS)
  210 #define PMC_IS_VIRTUAL_MODE(mode)                               \
  211         ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC)
  212 
  213 /*
  214  * PMC row disposition
  215  */
  216 
  217 #define __PMC_DISPOSITIONS(N)                                   \
  218         __PMC_DISP(STANDALONE)  /* global/disabled counters */  \
  219         __PMC_DISP(FREE)        /* free/available */            \
  220         __PMC_DISP(THREAD)      /* thread-virtual PMCs */       \
  221         __PMC_DISP(UNKNOWN)     /* sentinel */
  222 
  223 enum pmc_disp {
  224 #undef  __PMC_DISP
  225 #define __PMC_DISP(D)   PMC_DISP_##D ,
  226         __PMC_DISPOSITIONS()
  227 };
  228 
  229 #define PMC_DISP_FIRST  PMC_DISP_STANDALONE
  230 #define PMC_DISP_LAST   PMC_DISP_THREAD
  231 
  232 /*
  233  * Counter capabilities
  234  *
  235  * __PMC_CAPS(NAME, VALUE, DESCRIPTION)
  236  */
  237 
  238 #define __PMC_CAPS()                                                    \
  239         __PMC_CAP(INTERRUPT,    0, "generate interrupts")               \
  240         __PMC_CAP(USER,         1, "count user-mode events")            \
  241         __PMC_CAP(SYSTEM,       2, "count system-mode events")          \
  242         __PMC_CAP(EDGE,         3, "do edge detection of events")       \
  243         __PMC_CAP(THRESHOLD,    4, "ignore events below a threshold")   \
  244         __PMC_CAP(READ,         5, "read PMC counter")                  \
  245         __PMC_CAP(WRITE,        6, "reprogram PMC counter")             \
  246         __PMC_CAP(INVERT,       7, "invert comparision sense")          \
  247         __PMC_CAP(QUALIFIER,    8, "further qualify monitored events")  \
  248         __PMC_CAP(PRECISE,      9, "perform precise sampling")          \
  249         __PMC_CAP(TAGGING,      10, "tag upstream events")              \
  250         __PMC_CAP(CASCADE,      11, "cascade counters")
  251 
  252 enum pmc_caps
  253 {
  254 #undef  __PMC_CAP
  255 #define __PMC_CAP(NAME, VALUE, DESCR)   PMC_CAP_##NAME = (1 << VALUE) ,
  256         __PMC_CAPS()
  257 };
  258 
  259 #define PMC_CAP_FIRST           PMC_CAP_INTERRUPT
  260 #define PMC_CAP_LAST            PMC_CAP_CASCADE
  261 
  262 /*
  263  * PMC Event Numbers
  264  *
  265  * These are generated from the definitions in "dev/hwpmc/pmc_events.h".
  266  */
  267 
  268 enum pmc_event {
  269 #undef  __PMC_EV
  270 #undef  __PMC_EV_BLOCK
  271 #define __PMC_EV_BLOCK(C,V)     PMC_EV_ ## C ## __BLOCK_START = (V) - 1 ,
  272 #define __PMC_EV(C,N)           PMC_EV_ ## C ## _ ## N ,
  273         __PMC_EVENTS()
  274 };
  275 
  276 /*
  277  * PMC SYSCALL INTERFACE
  278  */
  279 
  280 /*
  281  * "PMC_OPS" -- these are the commands recognized by the kernel
  282  * module, and are used when performing a system call from userland.
  283  */
  284 #define __PMC_OPS()                                                     \
  285         __PMC_OP(CONFIGURELOG, "Set log file")                          \
  286         __PMC_OP(FLUSHLOG, "Flush log file")                            \
  287         __PMC_OP(GETCPUINFO, "Get system CPU information")              \
  288         __PMC_OP(GETDRIVERSTATS, "Get driver statistics")               \
  289         __PMC_OP(GETMODULEVERSION, "Get module version")                \
  290         __PMC_OP(GETPMCINFO, "Get per-cpu PMC information")             \
  291         __PMC_OP(PMCADMIN, "Set PMC state")                             \
  292         __PMC_OP(PMCALLOCATE, "Allocate and configure a PMC")           \
  293         __PMC_OP(PMCATTACH, "Attach a PMC to a process")                \
  294         __PMC_OP(PMCDETACH, "Detach a PMC from a process")              \
  295         __PMC_OP(PMCGETMSR, "Get a PMC's hardware address")             \
  296         __PMC_OP(PMCRELEASE, "Release a PMC")                           \
  297         __PMC_OP(PMCRW, "Read/Set a PMC")                               \
  298         __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate")        \
  299         __PMC_OP(PMCSTART, "Start a PMC")                               \
  300         __PMC_OP(PMCSTOP, "Start a PMC")                                \
  301         __PMC_OP(WRITELOG, "Write a cookie to the log file")
  302 
  303 
  304 enum pmc_ops {
  305 #undef  __PMC_OP
  306 #define __PMC_OP(N, D)  PMC_OP_##N,
  307         __PMC_OPS()
  308 };
  309 
  310 
  311 /*
  312  * Flags used in operations on PMCs.
  313  */
  314 
  315 #define PMC_F_FORCE             0x00000001 /*OP ADMIN force operation */
  316 #define PMC_F_DESCENDANTS       0x00000002 /*OP ALLOCATE track descendants */
  317 #define PMC_F_LOG_PROCCSW       0x00000004 /*OP ALLOCATE track ctx switches */
  318 #define PMC_F_LOG_PROCEXIT      0x00000008 /*OP ALLOCATE log proc exits */
  319 #define PMC_F_NEWVALUE          0x00000010 /*OP RW write new value */
  320 #define PMC_F_OLDVALUE          0x00000020 /*OP RW get old value */
  321 #define PMC_F_KGMON             0x00000040 /*OP ALLOCATE kgmon(8) profiling */
  322 /* V2 API */
  323 #define PMC_F_CALLCHAIN         0x00000080 /*OP ALLOCATE capture callchains */
  324 
  325 /* internal flags */
  326 #define PMC_F_ATTACHED_TO_OWNER 0x00010000 /*attached to owner*/
  327 #define PMC_F_NEEDS_LOGFILE     0x00020000 /*needs log file */
  328 #define PMC_F_ATTACH_DONE       0x00040000 /*attached at least once */
  329 
  330 #define PMC_CALLCHAIN_DEPTH_MAX 32
  331 #define PMC_CC_F_USERSPACE      0x01       /*userspace callchain*/
  332 
  333 /*
  334  * Cookies used to denote allocated PMCs, and the values of PMCs.
  335  */
  336 
  337 typedef uint32_t        pmc_id_t;
  338 typedef uint64_t        pmc_value_t;
  339 
  340 #define PMC_ID_INVALID          (~ (pmc_id_t) 0)
  341 
  342 /*
  343  * PMC IDs have the following format:
  344  *
  345  * +--------+----------+-----------+-----------+
  346  * |   CPU  | PMC MODE | PMC CLASS | ROW INDEX |
  347  * +--------+----------+-----------+-----------+
  348  *
  349  * where each field is 8 bits wide.  Field 'CPU' is set to the
  350  * requested CPU for system-wide PMCs or PMC_CPU_ANY for process-mode
  351  * PMCs.  Field 'PMC MODE' is the allocated PMC mode.  Field 'PMC
  352  * CLASS' is the class of the PMC.  Field 'ROW INDEX' is the row index
  353  * for the PMC.
  354  *
  355  * The 'ROW INDEX' ranges over 0..NWPMCS where NHWPMCS is the total
  356  * number of hardware PMCs on this cpu.
  357  */
  358 
  359 
  360 #define PMC_ID_TO_ROWINDEX(ID)  ((ID) & 0xFF)
  361 #define PMC_ID_TO_CLASS(ID)     (((ID) & 0xFF00) >> 8)
  362 #define PMC_ID_TO_MODE(ID)      (((ID) & 0xFF0000) >> 16)
  363 #define PMC_ID_TO_CPU(ID)       (((ID) & 0xFF000000) >> 24)
  364 #define PMC_ID_MAKE_ID(CPU,MODE,CLASS,ROWINDEX)                 \
  365         ((((CPU) & 0xFF) << 24) | (((MODE) & 0xFF) << 16) |     \
  366         (((CLASS) & 0xFF) << 8) | ((ROWINDEX) & 0xFF))
  367 
  368 /*
  369  * Data structures for system calls supported by the pmc driver.
  370  */
  371 
  372 /*
  373  * OP PMCALLOCATE
  374  *
  375  * Allocate a PMC on the named CPU.
  376  */
  377 
  378 #define PMC_CPU_ANY     ~0
  379 
  380 struct pmc_op_pmcallocate {
  381         uint32_t        pm_caps;        /* PMC_CAP_* */
  382         uint32_t        pm_cpu;         /* CPU number or PMC_CPU_ANY */
  383         enum pmc_class  pm_class;       /* class of PMC desired */
  384         enum pmc_event  pm_ev;          /* [enum pmc_event] desired */
  385         uint32_t        pm_flags;       /* additional modifiers PMC_F_* */
  386         enum pmc_mode   pm_mode;        /* desired mode */
  387         pmc_id_t        pm_pmcid;       /* [return] process pmc id */
  388 
  389         union pmc_md_op_pmcallocate pm_md; /* MD layer extensions */
  390 };
  391 
  392 /*
  393  * OP PMCADMIN
  394  *
  395  * Set the administrative state (i.e., whether enabled or disabled) of
  396  * a PMC 'pm_pmc' on CPU 'pm_cpu'.  Note that 'pm_pmc' specifies an
  397  * absolute PMC number and need not have been first allocated by the
  398  * calling process.
  399  */
  400 
  401 struct pmc_op_pmcadmin {
  402         int             pm_cpu;         /* CPU# */
  403         uint32_t        pm_flags;       /* flags */
  404         int             pm_pmc;         /* PMC# */
  405         enum pmc_state  pm_state;       /* desired state */
  406 };
  407 
  408 /*
  409  * OP PMCATTACH / OP PMCDETACH
  410  *
  411  * Attach/detach a PMC and a process.
  412  */
  413 
  414 struct pmc_op_pmcattach {
  415         pmc_id_t        pm_pmc;         /* PMC to attach to */
  416         pid_t           pm_pid;         /* target process */
  417 };
  418 
  419 /*
  420  * OP PMCSETCOUNT
  421  *
  422  * Set the sampling rate (i.e., the reload count) for statistical counters.
  423  * 'pm_pmcid' need to have been previously allocated using PMCALLOCATE.
  424  */
  425 
  426 struct pmc_op_pmcsetcount {
  427         pmc_value_t     pm_count;       /* initial/sample count */
  428         pmc_id_t        pm_pmcid;       /* PMC id to set */
  429 };
  430 
  431 
  432 /*
  433  * OP PMCRW
  434  *
  435  * Read the value of a PMC named by 'pm_pmcid'.  'pm_pmcid' needs
  436  * to have been previously allocated using PMCALLOCATE.
  437  */
  438 
  439 
  440 struct pmc_op_pmcrw {
  441         uint32_t        pm_flags;       /* PMC_F_{OLD,NEW}VALUE*/
  442         pmc_id_t        pm_pmcid;       /* pmc id */
  443         pmc_value_t     pm_value;       /* new&returned value */
  444 };
  445 
  446 
  447 /*
  448  * OP GETPMCINFO
  449  *
  450  * retrieve PMC state for a named CPU.  The caller is expected to
  451  * allocate 'npmc' * 'struct pmc_info' bytes of space for the return
  452  * values.
  453  */
  454 
  455 struct pmc_info {
  456         char            pm_name[PMC_NAME_MAX]; /* pmc name */
  457         enum pmc_class  pm_class;       /* enum pmc_class */
  458         int             pm_enabled;     /* whether enabled */
  459         enum pmc_disp   pm_rowdisp;     /* FREE, THREAD or STANDLONE */
  460         pid_t           pm_ownerpid;    /* owner, or -1 */
  461         enum pmc_mode   pm_mode;        /* current mode [enum pmc_mode] */
  462         enum pmc_event  pm_event;       /* current event */
  463         uint32_t        pm_flags;       /* current flags */
  464         pmc_value_t     pm_reloadcount; /* sampling counters only */
  465 };
  466 
  467 struct pmc_op_getpmcinfo {
  468         int32_t         pm_cpu;         /* 0 <= cpu < mp_maxid */
  469         struct pmc_info pm_pmcs[];      /* space for 'npmc' structures */
  470 };
  471 
  472 
  473 /*
  474  * OP GETCPUINFO
  475  *
  476  * Retrieve system CPU information.
  477  */
  478 
  479 struct pmc_classinfo {
  480         enum pmc_class  pm_class;       /* class id */
  481         uint32_t        pm_caps;        /* counter capabilities */
  482         uint32_t        pm_width;       /* width of the PMC */
  483         uint32_t        pm_num;         /* number of PMCs in class */
  484 };
  485 
  486 struct pmc_op_getcpuinfo {
  487         enum pmc_cputype pm_cputype; /* what kind of CPU */
  488         uint32_t        pm_ncpu;    /* max CPU number */
  489         uint32_t        pm_npmc;    /* #PMCs per CPU */
  490         uint32_t        pm_nclass;  /* #classes of PMCs */
  491         struct pmc_classinfo  pm_classes[PMC_CLASS_MAX];
  492 };
  493 
  494 /*
  495  * OP CONFIGURELOG
  496  *
  497  * Configure a log file for writing system-wide statistics to.
  498  */
  499 
  500 struct pmc_op_configurelog {
  501         int             pm_flags;
  502         int             pm_logfd;   /* logfile fd (or -1) */
  503 };
  504 
  505 /*
  506  * OP GETDRIVERSTATS
  507  *
  508  * Retrieve pmc(4) driver-wide statistics.
  509  */
  510 
  511 struct pmc_op_getdriverstats {
  512         int     pm_intr_ignored;        /* #interrupts ignored */
  513         int     pm_intr_processed;      /* #interrupts processed */
  514         int     pm_intr_bufferfull;     /* #interrupts with ENOSPC */
  515         int     pm_syscalls;            /* #syscalls */
  516         int     pm_syscall_errors;      /* #syscalls with errors */
  517         int     pm_buffer_requests;     /* #buffer requests */
  518         int     pm_buffer_requests_failed; /* #failed buffer requests */
  519         int     pm_log_sweeps;          /* #sample buffer processing passes */
  520 };
  521 
  522 /*
  523  * OP RELEASE / OP START / OP STOP
  524  *
  525  * Simple operations on a PMC id.
  526  */
  527 
  528 struct pmc_op_simple {
  529         pmc_id_t        pm_pmcid;
  530 };
  531 
  532 /*
  533  * OP WRITELOG
  534  *
  535  * Flush the current log buffer and write 4 bytes of user data to it.
  536  */
  537 
  538 struct pmc_op_writelog {
  539         uint32_t        pm_userdata;
  540 };
  541 
  542 /*
  543  * OP GETMSR
  544  *
  545  * Retrieve the machine specific address assoicated with the allocated
  546  * PMC.  This number can be used subsequently with a read-performance-counter
  547  * instruction.
  548  */
  549 
  550 struct pmc_op_getmsr {
  551         uint32_t        pm_msr;         /* machine specific address */
  552         pmc_id_t        pm_pmcid;       /* allocated pmc id */
  553 };
  554 
  555 #ifdef _KERNEL
  556 
  557 #include <sys/malloc.h>
  558 #include <sys/sysctl.h>
  559 
  560 #include <machine/frame.h>
  561 
  562 #define PMC_HASH_SIZE                           16
  563 #define PMC_MTXPOOL_SIZE                        32
  564 #define PMC_LOG_BUFFER_SIZE                     4
  565 #define PMC_NLOGBUFFERS                         16
  566 #define PMC_NSAMPLES                            32
  567 #define PMC_CALLCHAIN_DEPTH                     8
  568 
  569 #define PMC_SYSCTL_NAME_PREFIX "kern." PMC_MODULE_NAME "."
  570 
  571 /*
  572  * Locking keys
  573  *
  574  * (b) - pmc_bufferlist_mtx (spin lock)
  575  * (k) - pmc_kthread_mtx (sleep lock)
  576  * (o) - po->po_mtx (spin lock)
  577  */
  578 
  579 /*
  580  * PMC commands
  581  */
  582 
  583 struct pmc_syscall_args {
  584         uint32_t        pmop_code;      /* one of PMC_OP_* */
  585         void            *pmop_data;     /* syscall parameter */
  586 };
  587 
  588 /*
  589  * Interface to processor specific s1tuff
  590  */
  591 
  592 /*
  593  * struct pmc_descr
  594  *
  595  * Machine independent (i.e., the common parts) of a human readable
  596  * PMC description.
  597  */
  598 
  599 struct pmc_descr {
  600         char            pd_name[PMC_NAME_MAX]; /* name */
  601         uint32_t        pd_caps;        /* capabilities */
  602         enum pmc_class  pd_class;       /* class of the PMC */
  603         uint32_t        pd_width;       /* width in bits */
  604 };
  605 
  606 /*
  607  * struct pmc_target
  608  *
  609  * This structure records all the target processes associated with a
  610  * PMC.
  611  */
  612 
  613 struct pmc_target {
  614         LIST_ENTRY(pmc_target)  pt_next;
  615         struct pmc_process      *pt_process; /* target descriptor */
  616 };
  617 
  618 /*
  619  * struct pmc
  620  *
  621  * Describes each allocated PMC.
  622  *
  623  * Each PMC has precisely one owner, namely the process that allocated
  624  * the PMC.
  625  *
  626  * A PMC may be attached to multiple target processes.  The
  627  * 'pm_targets' field links all the target processes being monitored
  628  * by this PMC.
  629  *
  630  * The 'pm_savedvalue' field is protected by a mutex.
  631  *
  632  * On a multi-cpu machine, multiple target threads associated with a
  633  * process-virtual PMC could be concurrently executing on different
  634  * CPUs.  The 'pm_runcount' field is atomically incremented every time
  635  * the PMC gets scheduled on a CPU and atomically decremented when it
  636  * get descheduled.  Deletion of a PMC is only permitted when this
  637  * field is ''.
  638  *
  639  */
  640 
  641 struct pmc {
  642         LIST_HEAD(,pmc_target)  pm_targets;     /* list of target processes */
  643         LIST_ENTRY(pmc)         pm_next;        /* owner's list */
  644 
  645         /*
  646          * System-wide PMCs are allocated on a CPU and are not moved
  647          * around.  For system-wide PMCs we record the CPU the PMC was
  648          * allocated on in the 'CPU' field of the pmc ID.
  649          *
  650          * Virtual PMCs run on whichever CPU is currently executing
  651          * their targets' threads.  For these PMCs we need to save
  652          * their current PMC counter values when they are taken off
  653          * CPU.
  654          */
  655 
  656         union {
  657                 pmc_value_t     pm_savedvalue;  /* Virtual PMCS */
  658         } pm_gv;
  659 
  660         /*
  661          * For sampling mode PMCs, we keep track of the PMC's "reload
  662          * count", which is the counter value to be loaded in when
  663          * arming the PMC for the next counting session.  For counting
  664          * modes on PMCs that are read-only (e.g., the x86 TSC), we
  665          * keep track of the initial value at the start of
  666          * counting-mode operation.
  667          */
  668 
  669         union {
  670                 pmc_value_t     pm_reloadcount; /* sampling PMC modes */
  671                 pmc_value_t     pm_initial;     /* counting PMC modes */
  672         } pm_sc;
  673 
  674         uint32_t        pm_stalled;     /* marks stalled sampling PMCs */
  675         uint32_t        pm_caps;        /* PMC capabilities */
  676         enum pmc_event  pm_event;       /* event being measured */
  677         uint32_t        pm_flags;       /* additional flags PMC_F_... */
  678         struct pmc_owner *pm_owner;     /* owner thread state */
  679         uint32_t        pm_runcount;    /* #cpus currently on */
  680         enum pmc_state  pm_state;       /* current PMC state */
  681 
  682         /*
  683          * The PMC ID field encodes the row-index for the PMC, its
  684          * mode, class and the CPU# associated with the PMC.
  685          */
  686 
  687         pmc_id_t        pm_id;          /* allocated PMC id */
  688 
  689         /* md extensions */
  690         union pmc_md_pmc        pm_md;
  691 };
  692 
  693 /*
  694  * Accessor macros for 'struct pmc'
  695  */
  696 
  697 #define PMC_TO_MODE(P)          PMC_ID_TO_MODE((P)->pm_id)
  698 #define PMC_TO_CLASS(P)         PMC_ID_TO_CLASS((P)->pm_id)
  699 #define PMC_TO_ROWINDEX(P)      PMC_ID_TO_ROWINDEX((P)->pm_id)
  700 #define PMC_TO_CPU(P)           PMC_ID_TO_CPU((P)->pm_id)
  701 
  702 
  703 /*
  704  * struct pmc_process
  705  *
  706  * Record a 'target' process being profiled.
  707  *
  708  * The target process being profiled could be different from the owner
  709  * process which allocated the PMCs.  Each target process descriptor
  710  * is associated with NHWPMC 'struct pmc *' pointers.  Each PMC at a
  711  * given hardware row-index 'n' will use slot 'n' of the 'pp_pmcs[]'
  712  * array.  The size of this structure is thus PMC architecture
  713  * dependent.
  714  *
  715  */
  716 
  717 struct pmc_targetstate {
  718         struct pmc      *pp_pmc;   /* target PMC */
  719         pmc_value_t     pp_pmcval; /* per-process value */
  720 };
  721 
  722 struct pmc_process {
  723         LIST_ENTRY(pmc_process) pp_next;        /* hash chain */
  724         int             pp_refcnt;              /* reference count */
  725         uint32_t        pp_flags;               /* flags PMC_PP_* */
  726         struct proc     *pp_proc;               /* target thread */
  727         struct pmc_targetstate pp_pmcs[];       /* NHWPMCs */
  728 };
  729 
  730 #define PMC_PP_ENABLE_MSR_ACCESS        0x00000001
  731 
  732 /*
  733  * struct pmc_owner
  734  *
  735  * We associate a PMC with an 'owner' process.
  736  *
  737  * A process can be associated with 0..NCPUS*NHWPMC PMCs during its
  738  * lifetime, where NCPUS is the numbers of CPUS in the system and
  739  * NHWPMC is the number of hardware PMCs per CPU.  These are
  740  * maintained in the list headed by the 'po_pmcs' to save on space.
  741  *
  742  */
  743 
  744 struct pmc_owner  {
  745         LIST_ENTRY(pmc_owner)   po_next;        /* hash chain */
  746         LIST_ENTRY(pmc_owner)   po_ssnext;      /* list of SS PMC owners */
  747         LIST_HEAD(, pmc)        po_pmcs;        /* owned PMC list */
  748         TAILQ_HEAD(, pmclog_buffer) po_logbuffers; /* (o) logbuffer list */
  749         struct mtx              po_mtx;         /* spin lock for (o) */
  750         struct proc             *po_owner;      /* owner proc */
  751         uint32_t                po_flags;       /* (k) flags PMC_PO_* */
  752         struct proc             *po_kthread;    /* (k) helper kthread */
  753         struct pmclog_buffer    *po_curbuf;     /* current log buffer */
  754         struct file             *po_file;       /* file reference */
  755         int                     po_error;       /* recorded error */
  756         short                   po_sscount;     /* # SS PMCs owned */
  757         short                   po_logprocmaps; /* global mappings done */
  758 };
  759 
  760 #define PMC_PO_OWNS_LOGFILE             0x00000001 /* has a log file */
  761 #define PMC_PO_SHUTDOWN                 0x00000010 /* in the process of shutdown */
  762 #define PMC_PO_INITIAL_MAPPINGS_DONE    0x00000020
  763 
  764 /*
  765  * struct pmc_hw -- describe the state of the PMC hardware
  766  *
  767  * When in use, a HW PMC is associated with one allocated 'struct pmc'
  768  * pointed to by field 'phw_pmc'.  When inactive, this field is NULL.
  769  *
  770  * On an SMP box, one or more HW PMC's in process virtual mode with
  771  * the same 'phw_pmc' could be executing on different CPUs.  In order
  772  * to handle this case correctly, we need to ensure that only
  773  * incremental counts get added to the saved value in the associated
  774  * 'struct pmc'.  The 'phw_save' field is used to keep the saved PMC
  775  * value at the time the hardware is started during this context
  776  * switch (i.e., the difference between the new (hardware) count and
  777  * the saved count is atomically added to the count field in 'struct
  778  * pmc' at context switch time).
  779  *
  780  */
  781 
  782 struct pmc_hw {
  783         uint32_t        phw_state;      /* see PHW_* macros below */
  784         struct pmc      *phw_pmc;       /* current thread PMC */
  785 };
  786 
  787 #define PMC_PHW_RI_MASK         0x000000FF
  788 #define PMC_PHW_CPU_SHIFT       8
  789 #define PMC_PHW_CPU_MASK        0x0000FF00
  790 #define PMC_PHW_FLAGS_SHIFT     16
  791 #define PMC_PHW_FLAGS_MASK      0xFFFF0000
  792 
  793 #define PMC_PHW_INDEX_TO_STATE(ri)      ((ri) & PMC_PHW_RI_MASK)
  794 #define PMC_PHW_STATE_TO_INDEX(state)   ((state) & PMC_PHW_RI_MASK)
  795 #define PMC_PHW_CPU_TO_STATE(cpu)       (((cpu) << PMC_PHW_CPU_SHIFT) & \
  796         PMC_PHW_CPU_MASK)
  797 #define PMC_PHW_STATE_TO_CPU(state)     (((state) & PMC_PHW_CPU_MASK) >> \
  798         PMC_PHW_CPU_SHIFT)
  799 #define PMC_PHW_FLAGS_TO_STATE(flags)   (((flags) << PMC_PHW_FLAGS_SHIFT) & \
  800         PMC_PHW_FLAGS_MASK)
  801 #define PMC_PHW_STATE_TO_FLAGS(state)   (((state) & PMC_PHW_FLAGS_MASK) >> \
  802         PMC_PHW_FLAGS_SHIFT)
  803 #define PMC_PHW_FLAG_IS_ENABLED         (PMC_PHW_FLAGS_TO_STATE(0x01))
  804 #define PMC_PHW_FLAG_IS_SHAREABLE       (PMC_PHW_FLAGS_TO_STATE(0x02))
  805 
  806 /*
  807  * struct pmc_sample
  808  *
  809  * Space for N (tunable) PC samples and associated control data.
  810  */
  811 
  812 struct pmc_sample {
  813         uint16_t                ps_nsamples;    /* callchain depth */
  814         uint8_t                 ps_cpu;         /* cpu number */
  815         uint8_t                 ps_flags;       /* other flags */
  816         pid_t                   ps_pid;         /* process PID or -1 */
  817         struct thread           *ps_td;         /* which thread */
  818         struct pmc              *ps_pmc;        /* interrupting PMC */
  819         uintptr_t               *ps_pc;         /* (const) callchain start */
  820 };
  821 
  822 #define PMC_SAMPLE_FREE         ((uint16_t) 0)
  823 #define PMC_SAMPLE_INUSE        ((uint16_t) 0xFFFF)
  824 
  825 struct pmc_samplebuffer {
  826         struct pmc_sample * volatile ps_read;   /* read pointer */
  827         struct pmc_sample * volatile ps_write;  /* write pointer */
  828         uintptr_t               *ps_callchains; /* all saved call chains */
  829         struct pmc_sample       *ps_fence;      /* one beyond ps_samples[] */
  830         struct pmc_sample       ps_samples[];   /* array of sample entries */
  831 };
  832 
  833 
  834 /*
  835  * struct pmc_cpustate
  836  *
  837  * A CPU is modelled as a collection of HW PMCs with space for additional
  838  * flags.
  839  */
  840 
  841 struct pmc_cpu {
  842         uint32_t        pc_state;       /* physical cpu number + flags */
  843         struct pmc_samplebuffer *pc_sb; /* space for samples */
  844         struct pmc_hw   *pc_hwpmcs[];   /* 'npmc' pointers */
  845 };
  846 
  847 #define PMC_PCPU_CPU_MASK               0x000000FF
  848 #define PMC_PCPU_FLAGS_MASK             0xFFFFFF00
  849 #define PMC_PCPU_FLAGS_SHIFT            8
  850 #define PMC_PCPU_STATE_TO_CPU(S)        ((S) & PMC_PCPU_CPU_MASK)
  851 #define PMC_PCPU_STATE_TO_FLAGS(S)      (((S) & PMC_PCPU_FLAGS_MASK) >> PMC_PCPU_FLAGS_SHIFT)
  852 #define PMC_PCPU_FLAGS_TO_STATE(F)      (((F) << PMC_PCPU_FLAGS_SHIFT) & PMC_PCPU_FLAGS_MASK)
  853 #define PMC_PCPU_CPU_TO_STATE(C)        ((C) & PMC_PCPU_CPU_MASK)
  854 #define PMC_PCPU_FLAG_HTT               (PMC_PCPU_FLAGS_TO_STATE(0x1))
  855 
  856 /*
  857  * struct pmc_binding
  858  *
  859  * CPU binding information.
  860  */
  861 
  862 struct pmc_binding {
  863         int     pb_bound;       /* is bound? */
  864         int     pb_cpu;         /* if so, to which CPU */
  865 };
  866 
  867 
  868 struct pmc_mdep;
  869 
  870 /*
  871  * struct pmc_classdep
  872  *
  873  * PMC class-dependent operations.
  874  */
  875 struct pmc_classdep {
  876         uint32_t        pcd_caps;       /* class capabilities */
  877         enum pmc_class  pcd_class;      /* class id */
  878         int             pcd_num;        /* number of PMCs */
  879         int             pcd_ri;         /* row index of the first PMC in class */
  880         int             pcd_width;      /* width of the PMC */
  881 
  882         /* configuring/reading/writing the hardware PMCs */
  883         int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm);
  884         int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm);
  885         int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value);
  886         int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value);
  887 
  888         /* pmc allocation/release */
  889         int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t,
  890                 const struct pmc_op_pmcallocate *_a);
  891         int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm);
  892 
  893         /* starting and stopping PMCs */
  894         int (*pcd_start_pmc)(int _cpu, int _ri);
  895         int (*pcd_stop_pmc)(int _cpu, int _ri);
  896 
  897         /* description */
  898         int (*pcd_describe)(int _cpu, int _ri, struct pmc_info *_pi,
  899                 struct pmc **_ppmc);
  900 
  901         /* class-dependent initialization & finalization */
  902         int (*pcd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
  903         int (*pcd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
  904 
  905         /* machine-specific interface */
  906         int (*pcd_get_msr)(int _ri, uint32_t *_msr);
  907 };
  908 
  909 /*
  910  * struct pmc_mdep
  911  *
  912  * Machine dependent bits needed per CPU type.
  913  */
  914 
  915 struct pmc_mdep  {
  916         uint32_t        pmd_cputype;    /* from enum pmc_cputype */
  917         uint32_t        pmd_npmc;       /* number of PMCs per CPU */
  918         uint32_t        pmd_nclass;     /* number of PMC classes present */
  919 
  920         /*
  921          * Machine dependent methods.
  922          */
  923 
  924         /* per-cpu initialization and finalization */
  925         int (*pmd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
  926         int (*pmd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
  927 
  928         /* thread context switch in/out */
  929         int (*pmd_switch_in)(struct pmc_cpu *_p, struct pmc_process *_pp);
  930         int (*pmd_switch_out)(struct pmc_cpu *_p, struct pmc_process *_pp);
  931 
  932         /* handle a PMC interrupt */
  933         int (*pmd_intr)(int _cpu, struct trapframe *_tf);
  934 
  935         /*
  936          * PMC class dependent information.
  937          */
  938         struct pmc_classdep pmd_classdep[];
  939 };
  940 
  941 /*
  942  * Per-CPU state.  This is an array of 'mp_ncpu' pointers
  943  * to struct pmc_cpu descriptors.
  944  */
  945 
  946 extern struct pmc_cpu **pmc_pcpu;
  947 
  948 /* driver statistics */
  949 extern struct pmc_op_getdriverstats pmc_stats;
  950 
  951 #if     defined(DEBUG) && DEBUG
  952 
  953 /* debug flags, major flag groups */
  954 struct pmc_debugflags {
  955         int     pdb_CPU;
  956         int     pdb_CSW;
  957         int     pdb_LOG;
  958         int     pdb_MDP;
  959         int     pdb_MOD;
  960         int     pdb_OWN;
  961         int     pdb_PMC;
  962         int     pdb_PRC;
  963         int     pdb_SAM;
  964 };
  965 
  966 extern struct pmc_debugflags pmc_debugflags;
  967 
  968 #define PMC_DEBUG_STRSIZE               128
  969 #define PMC_DEBUG_DEFAULT_FLAGS         { 0, 0, 0, 0, 0, 0, 0, 0 }
  970 
  971 #define PMCDBG(M,N,L,F,...) do {                                        \
  972         if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N))      \
  973                 printf(#M ":" #N ":" #L  ": " F "\n", __VA_ARGS__);     \
  974 } while (0)
  975 
  976 /* Major numbers */
  977 #define PMC_DEBUG_MAJ_CPU               0 /* cpu switches */
  978 #define PMC_DEBUG_MAJ_CSW               1 /* context switches */
  979 #define PMC_DEBUG_MAJ_LOG               2 /* logging */
  980 #define PMC_DEBUG_MAJ_MDP               3 /* machine dependent */
  981 #define PMC_DEBUG_MAJ_MOD               4 /* misc module infrastructure */
  982 #define PMC_DEBUG_MAJ_OWN               5 /* owner */
  983 #define PMC_DEBUG_MAJ_PMC               6 /* pmc management */
  984 #define PMC_DEBUG_MAJ_PRC               7 /* processes */
  985 #define PMC_DEBUG_MAJ_SAM               8 /* sampling */
  986 
  987 /* Minor numbers */
  988 
  989 /* Common (8 bits) */
  990 #define PMC_DEBUG_MIN_ALL               0 /* allocation */
  991 #define PMC_DEBUG_MIN_REL               1 /* release */
  992 #define PMC_DEBUG_MIN_OPS               2 /* ops: start, stop, ... */
  993 #define PMC_DEBUG_MIN_INI               3 /* init */
  994 #define PMC_DEBUG_MIN_FND               4 /* find */
  995 
  996 /* MODULE */
  997 #define PMC_DEBUG_MIN_PMH              14 /* pmc_hook */
  998 #define PMC_DEBUG_MIN_PMS              15 /* pmc_syscall */
  999 
 1000 /* OWN */
 1001 #define PMC_DEBUG_MIN_ORM               8 /* owner remove */
 1002 #define PMC_DEBUG_MIN_OMR               9 /* owner maybe remove */
 1003 
 1004 /* PROCESSES */
 1005 #define PMC_DEBUG_MIN_TLK               8 /* link target */
 1006 #define PMC_DEBUG_MIN_TUL               9 /* unlink target */
 1007 #define PMC_DEBUG_MIN_EXT              10 /* process exit */
 1008 #define PMC_DEBUG_MIN_EXC              11 /* process exec */
 1009 #define PMC_DEBUG_MIN_FRK              12 /* process fork */
 1010 #define PMC_DEBUG_MIN_ATT              13 /* attach/detach */
 1011 #define PMC_DEBUG_MIN_SIG              14 /* signalling */
 1012 
 1013 /* CONTEXT SWITCHES */
 1014 #define PMC_DEBUG_MIN_SWI               8 /* switch in */
 1015 #define PMC_DEBUG_MIN_SWO               9 /* switch out */
 1016 
 1017 /* PMC */
 1018 #define PMC_DEBUG_MIN_REG               8 /* pmc register */
 1019 #define PMC_DEBUG_MIN_ALR               9 /* allocate row */
 1020 
 1021 /* MACHINE DEPENDENT LAYER */
 1022 #define PMC_DEBUG_MIN_REA               8 /* read */
 1023 #define PMC_DEBUG_MIN_WRI               9 /* write */
 1024 #define PMC_DEBUG_MIN_CFG              10 /* config */
 1025 #define PMC_DEBUG_MIN_STA              11 /* start */
 1026 #define PMC_DEBUG_MIN_STO              12 /* stop */
 1027 #define PMC_DEBUG_MIN_INT              13 /* interrupts */
 1028 
 1029 /* CPU */
 1030 #define PMC_DEBUG_MIN_BND               8 /* bind */
 1031 #define PMC_DEBUG_MIN_SEL               9 /* select */
 1032 
 1033 /* LOG */
 1034 #define PMC_DEBUG_MIN_GTB               8 /* get buf */
 1035 #define PMC_DEBUG_MIN_SIO               9 /* schedule i/o */
 1036 #define PMC_DEBUG_MIN_FLS              10 /* flush */
 1037 #define PMC_DEBUG_MIN_SAM              11 /* sample */
 1038 
 1039 #else
 1040 #define PMCDBG(M,N,L,F,...)             /* nothing */
 1041 #endif
 1042 
 1043 /* declare a dedicated memory pool */
 1044 MALLOC_DECLARE(M_PMC);
 1045 
 1046 /*
 1047  * Functions
 1048  */
 1049 
 1050 struct pmc_mdep *pmc_md_initialize(void);       /* MD init function */
 1051 void    pmc_md_finalize(struct pmc_mdep *_md);  /* MD fini function */
 1052 int     pmc_getrowdisp(int _ri);
 1053 int     pmc_process_interrupt(int _cpu, struct pmc *_pm,
 1054     struct trapframe *_tf, int _inuserspace);
 1055 int     pmc_save_kernel_callchain(uintptr_t *_cc, int _maxsamples,
 1056     struct trapframe *_tf);
 1057 int     pmc_save_user_callchain(uintptr_t *_cc, int _maxsamples,
 1058     struct trapframe *_tf);
 1059 #endif /* _KERNEL */
 1060 #endif /* _SYS_PMC_H_ */

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