FreeBSD/Linux Kernel Cross Reference
sys/sys/pmc.h
1 /*-
2 * Copyright (c) 2003-2008, Joseph Koshy
3 * Copyright (c) 2007 The FreeBSD Foundation
4 * All rights reserved.
5 *
6 * Portions of this software were developed by A. Joseph Koshy under
7 * sponsorship from the FreeBSD Foundation and Google, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * $FreeBSD: releng/8.2/sys/sys/pmc.h 215938 2010-11-27 12:26:40Z jchandra $
31 */
32
33 #ifndef _SYS_PMC_H_
34 #define _SYS_PMC_H_
35
36 #include <dev/hwpmc/pmc_events.h>
37
38 #include <machine/pmc_mdep.h>
39 #include <machine/profile.h>
40
41 #define PMC_MODULE_NAME "hwpmc"
42 #define PMC_NAME_MAX 16 /* HW counter name size */
43 #define PMC_CLASS_MAX 6 /* max #classes of PMCs per-system */
44
45 /*
46 * Kernel<->userland API version number [MMmmpppp]
47 *
48 * Major numbers are to be incremented when an incompatible change to
49 * the ABI occurs that older clients will not be able to handle.
50 *
51 * Minor numbers are incremented when a backwards compatible change
52 * occurs that allows older correct programs to run unchanged. For
53 * example, when support for a new PMC type is added.
54 *
55 * The patch version is incremented for every bug fix.
56 */
57 #define PMC_VERSION_MAJOR 0x03
58 #define PMC_VERSION_MINOR 0x01
59 #define PMC_VERSION_PATCH 0x0000
60
61 #define PMC_VERSION (PMC_VERSION_MAJOR << 24 | \
62 PMC_VERSION_MINOR << 16 | PMC_VERSION_PATCH)
63
64 /*
65 * Kinds of CPUs known.
66 *
67 * We keep track of CPU variants that need to be distinguished in
68 * some way for PMC operations. CPU names are grouped by manufacturer
69 * and numbered sparsely in order to minimize changes to the ABI involved
70 * when new CPUs are added.
71 */
72
73 #define __PMC_CPUS() \
74 __PMC_CPU(AMD_K7, 0x00, "AMD K7") \
75 __PMC_CPU(AMD_K8, 0x01, "AMD K8") \
76 __PMC_CPU(INTEL_P5, 0x80, "Intel Pentium") \
77 __PMC_CPU(INTEL_P6, 0x81, "Intel Pentium Pro") \
78 __PMC_CPU(INTEL_CL, 0x82, "Intel Celeron") \
79 __PMC_CPU(INTEL_PII, 0x83, "Intel Pentium II") \
80 __PMC_CPU(INTEL_PIII, 0x84, "Intel Pentium III") \
81 __PMC_CPU(INTEL_PM, 0x85, "Intel Pentium M") \
82 __PMC_CPU(INTEL_PIV, 0x86, "Intel Pentium IV") \
83 __PMC_CPU(INTEL_CORE, 0x87, "Intel Core Solo/Duo") \
84 __PMC_CPU(INTEL_CORE2, 0x88, "Intel Core2") \
85 __PMC_CPU(INTEL_CORE2EXTREME, 0x89, "Intel Core2 Extreme") \
86 __PMC_CPU(INTEL_ATOM, 0x8A, "Intel Atom") \
87 __PMC_CPU(INTEL_COREI7, 0x8B, "Intel Core i7") \
88 __PMC_CPU(INTEL_WESTMERE, 0x8C, "Intel Westmere") \
89 __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K")
90
91 enum pmc_cputype {
92 #undef __PMC_CPU
93 #define __PMC_CPU(S,V,D) PMC_CPU_##S = V,
94 __PMC_CPUS()
95 };
96
97 #define PMC_CPU_FIRST PMC_CPU_AMD_K7
98 #define PMC_CPU_LAST PMC_CPU_MIPS_24K
99
100 /*
101 * Classes of PMCs
102 */
103
104 #define __PMC_CLASSES() \
105 __PMC_CLASS(TSC) /* CPU Timestamp counter */ \
106 __PMC_CLASS(K7) /* AMD K7 performance counters */ \
107 __PMC_CLASS(K8) /* AMD K8 performance counters */ \
108 __PMC_CLASS(P5) /* Intel Pentium counters */ \
109 __PMC_CLASS(P6) /* Intel Pentium Pro counters */ \
110 __PMC_CLASS(P4) /* Intel Pentium-IV counters */ \
111 __PMC_CLASS(IAF) /* Intel Core2/Atom, fixed function */ \
112 __PMC_CLASS(IAP) /* Intel Core...Atom, programmable */ \
113 __PMC_CLASS(UCF) /* Intel Uncore fixed function */ \
114 __PMC_CLASS(UCP) /* Intel Uncore programmable */ \
115 __PMC_CLASS(MIPS24K) /* MIPS 24K */
116
117 enum pmc_class {
118 #undef __PMC_CLASS
119 #define __PMC_CLASS(N) PMC_CLASS_##N ,
120 __PMC_CLASSES()
121 };
122
123 #define PMC_CLASS_FIRST PMC_CLASS_TSC
124 #define PMC_CLASS_LAST PMC_CLASS_MIPS24K
125
126 /*
127 * A PMC can be in the following states:
128 *
129 * Hardware states:
130 * DISABLED -- administratively prohibited from being used.
131 * FREE -- HW available for use
132 * Software states:
133 * ALLOCATED -- allocated
134 * STOPPED -- allocated, but not counting events
135 * RUNNING -- allocated, and in operation; 'pm_runcount'
136 * holds the number of CPUs using this PMC at
137 * a given instant
138 * DELETED -- being destroyed
139 */
140
141 #define __PMC_HWSTATES() \
142 __PMC_STATE(DISABLED) \
143 __PMC_STATE(FREE)
144
145 #define __PMC_SWSTATES() \
146 __PMC_STATE(ALLOCATED) \
147 __PMC_STATE(STOPPED) \
148 __PMC_STATE(RUNNING) \
149 __PMC_STATE(DELETED)
150
151 #define __PMC_STATES() \
152 __PMC_HWSTATES() \
153 __PMC_SWSTATES()
154
155 enum pmc_state {
156 #undef __PMC_STATE
157 #define __PMC_STATE(S) PMC_STATE_##S,
158 __PMC_STATES()
159 __PMC_STATE(MAX)
160 };
161
162 #define PMC_STATE_FIRST PMC_STATE_DISABLED
163 #define PMC_STATE_LAST PMC_STATE_DELETED
164
165 /*
166 * An allocated PMC may used as a 'global' counter or as a
167 * 'thread-private' one. Each such mode of use can be in either
168 * statistical sampling mode or in counting mode. Thus a PMC in use
169 *
170 * SS i.e., SYSTEM STATISTICAL -- system-wide statistical profiling
171 * SC i.e., SYSTEM COUNTER -- system-wide counting mode
172 * TS i.e., THREAD STATISTICAL -- thread virtual, statistical profiling
173 * TC i.e., THREAD COUNTER -- thread virtual, counting mode
174 *
175 * Statistical profiling modes rely on the PMC periodically delivering
176 * a interrupt to the CPU (when the configured number of events have
177 * been measured), so the PMC must have the ability to generate
178 * interrupts.
179 *
180 * In counting modes, the PMC counts its configured events, with the
181 * value of the PMC being read whenever needed by its owner process.
182 *
183 * The thread specific modes "virtualize" the PMCs -- the PMCs appear
184 * to be thread private and count events only when the profiled thread
185 * actually executes on the CPU.
186 *
187 * The system-wide "global" modes keep the PMCs running all the time
188 * and are used to measure the behaviour of the whole system.
189 */
190
191 #define __PMC_MODES() \
192 __PMC_MODE(SS, 0) \
193 __PMC_MODE(SC, 1) \
194 __PMC_MODE(TS, 2) \
195 __PMC_MODE(TC, 3)
196
197 enum pmc_mode {
198 #undef __PMC_MODE
199 #define __PMC_MODE(M,N) PMC_MODE_##M = N,
200 __PMC_MODES()
201 };
202
203 #define PMC_MODE_FIRST PMC_MODE_SS
204 #define PMC_MODE_LAST PMC_MODE_TC
205
206 #define PMC_IS_COUNTING_MODE(mode) \
207 ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC)
208 #define PMC_IS_SYSTEM_MODE(mode) \
209 ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC)
210 #define PMC_IS_SAMPLING_MODE(mode) \
211 ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS)
212 #define PMC_IS_VIRTUAL_MODE(mode) \
213 ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC)
214
215 /*
216 * PMC row disposition
217 */
218
219 #define __PMC_DISPOSITIONS(N) \
220 __PMC_DISP(STANDALONE) /* global/disabled counters */ \
221 __PMC_DISP(FREE) /* free/available */ \
222 __PMC_DISP(THREAD) /* thread-virtual PMCs */ \
223 __PMC_DISP(UNKNOWN) /* sentinel */
224
225 enum pmc_disp {
226 #undef __PMC_DISP
227 #define __PMC_DISP(D) PMC_DISP_##D ,
228 __PMC_DISPOSITIONS()
229 };
230
231 #define PMC_DISP_FIRST PMC_DISP_STANDALONE
232 #define PMC_DISP_LAST PMC_DISP_THREAD
233
234 /*
235 * Counter capabilities
236 *
237 * __PMC_CAPS(NAME, VALUE, DESCRIPTION)
238 */
239
240 #define __PMC_CAPS() \
241 __PMC_CAP(INTERRUPT, 0, "generate interrupts") \
242 __PMC_CAP(USER, 1, "count user-mode events") \
243 __PMC_CAP(SYSTEM, 2, "count system-mode events") \
244 __PMC_CAP(EDGE, 3, "do edge detection of events") \
245 __PMC_CAP(THRESHOLD, 4, "ignore events below a threshold") \
246 __PMC_CAP(READ, 5, "read PMC counter") \
247 __PMC_CAP(WRITE, 6, "reprogram PMC counter") \
248 __PMC_CAP(INVERT, 7, "invert comparision sense") \
249 __PMC_CAP(QUALIFIER, 8, "further qualify monitored events") \
250 __PMC_CAP(PRECISE, 9, "perform precise sampling") \
251 __PMC_CAP(TAGGING, 10, "tag upstream events") \
252 __PMC_CAP(CASCADE, 11, "cascade counters")
253
254 enum pmc_caps
255 {
256 #undef __PMC_CAP
257 #define __PMC_CAP(NAME, VALUE, DESCR) PMC_CAP_##NAME = (1 << VALUE) ,
258 __PMC_CAPS()
259 };
260
261 #define PMC_CAP_FIRST PMC_CAP_INTERRUPT
262 #define PMC_CAP_LAST PMC_CAP_CASCADE
263
264 /*
265 * PMC Event Numbers
266 *
267 * These are generated from the definitions in "dev/hwpmc/pmc_events.h".
268 */
269
270 enum pmc_event {
271 #undef __PMC_EV
272 #undef __PMC_EV_BLOCK
273 #define __PMC_EV_BLOCK(C,V) PMC_EV_ ## C ## __BLOCK_START = (V) - 1 ,
274 #define __PMC_EV(C,N) PMC_EV_ ## C ## _ ## N ,
275 __PMC_EVENTS()
276 };
277
278 /*
279 * PMC SYSCALL INTERFACE
280 */
281
282 /*
283 * "PMC_OPS" -- these are the commands recognized by the kernel
284 * module, and are used when performing a system call from userland.
285 */
286 #define __PMC_OPS() \
287 __PMC_OP(CONFIGURELOG, "Set log file") \
288 __PMC_OP(FLUSHLOG, "Flush log file") \
289 __PMC_OP(GETCPUINFO, "Get system CPU information") \
290 __PMC_OP(GETDRIVERSTATS, "Get driver statistics") \
291 __PMC_OP(GETMODULEVERSION, "Get module version") \
292 __PMC_OP(GETPMCINFO, "Get per-cpu PMC information") \
293 __PMC_OP(PMCADMIN, "Set PMC state") \
294 __PMC_OP(PMCALLOCATE, "Allocate and configure a PMC") \
295 __PMC_OP(PMCATTACH, "Attach a PMC to a process") \
296 __PMC_OP(PMCDETACH, "Detach a PMC from a process") \
297 __PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \
298 __PMC_OP(PMCRELEASE, "Release a PMC") \
299 __PMC_OP(PMCRW, "Read/Set a PMC") \
300 __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \
301 __PMC_OP(PMCSTART, "Start a PMC") \
302 __PMC_OP(PMCSTOP, "Start a PMC") \
303 __PMC_OP(WRITELOG, "Write a cookie to the log file")
304
305
306 enum pmc_ops {
307 #undef __PMC_OP
308 #define __PMC_OP(N, D) PMC_OP_##N,
309 __PMC_OPS()
310 };
311
312
313 /*
314 * Flags used in operations on PMCs.
315 */
316
317 #define PMC_F_FORCE 0x00000001 /*OP ADMIN force operation */
318 #define PMC_F_DESCENDANTS 0x00000002 /*OP ALLOCATE track descendants */
319 #define PMC_F_LOG_PROCCSW 0x00000004 /*OP ALLOCATE track ctx switches */
320 #define PMC_F_LOG_PROCEXIT 0x00000008 /*OP ALLOCATE log proc exits */
321 #define PMC_F_NEWVALUE 0x00000010 /*OP RW write new value */
322 #define PMC_F_OLDVALUE 0x00000020 /*OP RW get old value */
323 #define PMC_F_KGMON 0x00000040 /*OP ALLOCATE kgmon(8) profiling */
324 /* V2 API */
325 #define PMC_F_CALLCHAIN 0x00000080 /*OP ALLOCATE capture callchains */
326
327 /* internal flags */
328 #define PMC_F_ATTACHED_TO_OWNER 0x00010000 /*attached to owner*/
329 #define PMC_F_NEEDS_LOGFILE 0x00020000 /*needs log file */
330 #define PMC_F_ATTACH_DONE 0x00040000 /*attached at least once */
331
332 #define PMC_CALLCHAIN_DEPTH_MAX 32
333 #define PMC_CC_F_USERSPACE 0x01 /*userspace callchain*/
334
335 /*
336 * Cookies used to denote allocated PMCs, and the values of PMCs.
337 */
338
339 typedef uint32_t pmc_id_t;
340 typedef uint64_t pmc_value_t;
341
342 #define PMC_ID_INVALID (~ (pmc_id_t) 0)
343
344 /*
345 * PMC IDs have the following format:
346 *
347 * +--------+----------+-----------+-----------+
348 * | CPU | PMC MODE | PMC CLASS | ROW INDEX |
349 * +--------+----------+-----------+-----------+
350 *
351 * where each field is 8 bits wide. Field 'CPU' is set to the
352 * requested CPU for system-wide PMCs or PMC_CPU_ANY for process-mode
353 * PMCs. Field 'PMC MODE' is the allocated PMC mode. Field 'PMC
354 * CLASS' is the class of the PMC. Field 'ROW INDEX' is the row index
355 * for the PMC.
356 *
357 * The 'ROW INDEX' ranges over 0..NWPMCS where NHWPMCS is the total
358 * number of hardware PMCs on this cpu.
359 */
360
361
362 #define PMC_ID_TO_ROWINDEX(ID) ((ID) & 0xFF)
363 #define PMC_ID_TO_CLASS(ID) (((ID) & 0xFF00) >> 8)
364 #define PMC_ID_TO_MODE(ID) (((ID) & 0xFF0000) >> 16)
365 #define PMC_ID_TO_CPU(ID) (((ID) & 0xFF000000) >> 24)
366 #define PMC_ID_MAKE_ID(CPU,MODE,CLASS,ROWINDEX) \
367 ((((CPU) & 0xFF) << 24) | (((MODE) & 0xFF) << 16) | \
368 (((CLASS) & 0xFF) << 8) | ((ROWINDEX) & 0xFF))
369
370 /*
371 * Data structures for system calls supported by the pmc driver.
372 */
373
374 /*
375 * OP PMCALLOCATE
376 *
377 * Allocate a PMC on the named CPU.
378 */
379
380 #define PMC_CPU_ANY ~0
381
382 struct pmc_op_pmcallocate {
383 uint32_t pm_caps; /* PMC_CAP_* */
384 uint32_t pm_cpu; /* CPU number or PMC_CPU_ANY */
385 enum pmc_class pm_class; /* class of PMC desired */
386 enum pmc_event pm_ev; /* [enum pmc_event] desired */
387 uint32_t pm_flags; /* additional modifiers PMC_F_* */
388 enum pmc_mode pm_mode; /* desired mode */
389 pmc_id_t pm_pmcid; /* [return] process pmc id */
390
391 union pmc_md_op_pmcallocate pm_md; /* MD layer extensions */
392 };
393
394 /*
395 * OP PMCADMIN
396 *
397 * Set the administrative state (i.e., whether enabled or disabled) of
398 * a PMC 'pm_pmc' on CPU 'pm_cpu'. Note that 'pm_pmc' specifies an
399 * absolute PMC number and need not have been first allocated by the
400 * calling process.
401 */
402
403 struct pmc_op_pmcadmin {
404 int pm_cpu; /* CPU# */
405 uint32_t pm_flags; /* flags */
406 int pm_pmc; /* PMC# */
407 enum pmc_state pm_state; /* desired state */
408 };
409
410 /*
411 * OP PMCATTACH / OP PMCDETACH
412 *
413 * Attach/detach a PMC and a process.
414 */
415
416 struct pmc_op_pmcattach {
417 pmc_id_t pm_pmc; /* PMC to attach to */
418 pid_t pm_pid; /* target process */
419 };
420
421 /*
422 * OP PMCSETCOUNT
423 *
424 * Set the sampling rate (i.e., the reload count) for statistical counters.
425 * 'pm_pmcid' need to have been previously allocated using PMCALLOCATE.
426 */
427
428 struct pmc_op_pmcsetcount {
429 pmc_value_t pm_count; /* initial/sample count */
430 pmc_id_t pm_pmcid; /* PMC id to set */
431 };
432
433
434 /*
435 * OP PMCRW
436 *
437 * Read the value of a PMC named by 'pm_pmcid'. 'pm_pmcid' needs
438 * to have been previously allocated using PMCALLOCATE.
439 */
440
441
442 struct pmc_op_pmcrw {
443 uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/
444 pmc_id_t pm_pmcid; /* pmc id */
445 pmc_value_t pm_value; /* new&returned value */
446 };
447
448
449 /*
450 * OP GETPMCINFO
451 *
452 * retrieve PMC state for a named CPU. The caller is expected to
453 * allocate 'npmc' * 'struct pmc_info' bytes of space for the return
454 * values.
455 */
456
457 struct pmc_info {
458 char pm_name[PMC_NAME_MAX]; /* pmc name */
459 enum pmc_class pm_class; /* enum pmc_class */
460 int pm_enabled; /* whether enabled */
461 enum pmc_disp pm_rowdisp; /* FREE, THREAD or STANDLONE */
462 pid_t pm_ownerpid; /* owner, or -1 */
463 enum pmc_mode pm_mode; /* current mode [enum pmc_mode] */
464 enum pmc_event pm_event; /* current event */
465 uint32_t pm_flags; /* current flags */
466 pmc_value_t pm_reloadcount; /* sampling counters only */
467 };
468
469 struct pmc_op_getpmcinfo {
470 int32_t pm_cpu; /* 0 <= cpu < mp_maxid */
471 struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */
472 };
473
474
475 /*
476 * OP GETCPUINFO
477 *
478 * Retrieve system CPU information.
479 */
480
481 struct pmc_classinfo {
482 enum pmc_class pm_class; /* class id */
483 uint32_t pm_caps; /* counter capabilities */
484 uint32_t pm_width; /* width of the PMC */
485 uint32_t pm_num; /* number of PMCs in class */
486 };
487
488 struct pmc_op_getcpuinfo {
489 enum pmc_cputype pm_cputype; /* what kind of CPU */
490 uint32_t pm_ncpu; /* max CPU number */
491 uint32_t pm_npmc; /* #PMCs per CPU */
492 uint32_t pm_nclass; /* #classes of PMCs */
493 struct pmc_classinfo pm_classes[PMC_CLASS_MAX];
494 };
495
496 /*
497 * OP CONFIGURELOG
498 *
499 * Configure a log file for writing system-wide statistics to.
500 */
501
502 struct pmc_op_configurelog {
503 int pm_flags;
504 int pm_logfd; /* logfile fd (or -1) */
505 };
506
507 /*
508 * OP GETDRIVERSTATS
509 *
510 * Retrieve pmc(4) driver-wide statistics.
511 */
512
513 struct pmc_op_getdriverstats {
514 int pm_intr_ignored; /* #interrupts ignored */
515 int pm_intr_processed; /* #interrupts processed */
516 int pm_intr_bufferfull; /* #interrupts with ENOSPC */
517 int pm_syscalls; /* #syscalls */
518 int pm_syscall_errors; /* #syscalls with errors */
519 int pm_buffer_requests; /* #buffer requests */
520 int pm_buffer_requests_failed; /* #failed buffer requests */
521 int pm_log_sweeps; /* #sample buffer processing passes */
522 };
523
524 /*
525 * OP RELEASE / OP START / OP STOP
526 *
527 * Simple operations on a PMC id.
528 */
529
530 struct pmc_op_simple {
531 pmc_id_t pm_pmcid;
532 };
533
534 /*
535 * OP WRITELOG
536 *
537 * Flush the current log buffer and write 4 bytes of user data to it.
538 */
539
540 struct pmc_op_writelog {
541 uint32_t pm_userdata;
542 };
543
544 /*
545 * OP GETMSR
546 *
547 * Retrieve the machine specific address assoicated with the allocated
548 * PMC. This number can be used subsequently with a read-performance-counter
549 * instruction.
550 */
551
552 struct pmc_op_getmsr {
553 uint32_t pm_msr; /* machine specific address */
554 pmc_id_t pm_pmcid; /* allocated pmc id */
555 };
556
557 #ifdef _KERNEL
558
559 #include <sys/malloc.h>
560 #include <sys/sysctl.h>
561
562 #include <machine/frame.h>
563
564 #define PMC_HASH_SIZE 16
565 #define PMC_MTXPOOL_SIZE 32
566 #define PMC_LOG_BUFFER_SIZE 4
567 #define PMC_NLOGBUFFERS 16
568 #define PMC_NSAMPLES 32
569 #define PMC_CALLCHAIN_DEPTH 8
570
571 #define PMC_SYSCTL_NAME_PREFIX "kern." PMC_MODULE_NAME "."
572
573 /*
574 * Locking keys
575 *
576 * (b) - pmc_bufferlist_mtx (spin lock)
577 * (k) - pmc_kthread_mtx (sleep lock)
578 * (o) - po->po_mtx (spin lock)
579 */
580
581 /*
582 * PMC commands
583 */
584
585 struct pmc_syscall_args {
586 uint32_t pmop_code; /* one of PMC_OP_* */
587 void *pmop_data; /* syscall parameter */
588 };
589
590 /*
591 * Interface to processor specific s1tuff
592 */
593
594 /*
595 * struct pmc_descr
596 *
597 * Machine independent (i.e., the common parts) of a human readable
598 * PMC description.
599 */
600
601 struct pmc_descr {
602 char pd_name[PMC_NAME_MAX]; /* name */
603 uint32_t pd_caps; /* capabilities */
604 enum pmc_class pd_class; /* class of the PMC */
605 uint32_t pd_width; /* width in bits */
606 };
607
608 /*
609 * struct pmc_target
610 *
611 * This structure records all the target processes associated with a
612 * PMC.
613 */
614
615 struct pmc_target {
616 LIST_ENTRY(pmc_target) pt_next;
617 struct pmc_process *pt_process; /* target descriptor */
618 };
619
620 /*
621 * struct pmc
622 *
623 * Describes each allocated PMC.
624 *
625 * Each PMC has precisely one owner, namely the process that allocated
626 * the PMC.
627 *
628 * A PMC may be attached to multiple target processes. The
629 * 'pm_targets' field links all the target processes being monitored
630 * by this PMC.
631 *
632 * The 'pm_savedvalue' field is protected by a mutex.
633 *
634 * On a multi-cpu machine, multiple target threads associated with a
635 * process-virtual PMC could be concurrently executing on different
636 * CPUs. The 'pm_runcount' field is atomically incremented every time
637 * the PMC gets scheduled on a CPU and atomically decremented when it
638 * get descheduled. Deletion of a PMC is only permitted when this
639 * field is ''.
640 *
641 */
642
643 struct pmc {
644 LIST_HEAD(,pmc_target) pm_targets; /* list of target processes */
645 LIST_ENTRY(pmc) pm_next; /* owner's list */
646
647 /*
648 * System-wide PMCs are allocated on a CPU and are not moved
649 * around. For system-wide PMCs we record the CPU the PMC was
650 * allocated on in the 'CPU' field of the pmc ID.
651 *
652 * Virtual PMCs run on whichever CPU is currently executing
653 * their targets' threads. For these PMCs we need to save
654 * their current PMC counter values when they are taken off
655 * CPU.
656 */
657
658 union {
659 pmc_value_t pm_savedvalue; /* Virtual PMCS */
660 } pm_gv;
661
662 /*
663 * For sampling mode PMCs, we keep track of the PMC's "reload
664 * count", which is the counter value to be loaded in when
665 * arming the PMC for the next counting session. For counting
666 * modes on PMCs that are read-only (e.g., the x86 TSC), we
667 * keep track of the initial value at the start of
668 * counting-mode operation.
669 */
670
671 union {
672 pmc_value_t pm_reloadcount; /* sampling PMC modes */
673 pmc_value_t pm_initial; /* counting PMC modes */
674 } pm_sc;
675
676 uint32_t pm_stalled; /* marks stalled sampling PMCs */
677 uint32_t pm_caps; /* PMC capabilities */
678 enum pmc_event pm_event; /* event being measured */
679 uint32_t pm_flags; /* additional flags PMC_F_... */
680 struct pmc_owner *pm_owner; /* owner thread state */
681 int pm_runcount; /* #cpus currently on */
682 enum pmc_state pm_state; /* current PMC state */
683
684 /*
685 * The PMC ID field encodes the row-index for the PMC, its
686 * mode, class and the CPU# associated with the PMC.
687 */
688
689 pmc_id_t pm_id; /* allocated PMC id */
690
691 /* md extensions */
692 union pmc_md_pmc pm_md;
693 };
694
695 /*
696 * Accessor macros for 'struct pmc'
697 */
698
699 #define PMC_TO_MODE(P) PMC_ID_TO_MODE((P)->pm_id)
700 #define PMC_TO_CLASS(P) PMC_ID_TO_CLASS((P)->pm_id)
701 #define PMC_TO_ROWINDEX(P) PMC_ID_TO_ROWINDEX((P)->pm_id)
702 #define PMC_TO_CPU(P) PMC_ID_TO_CPU((P)->pm_id)
703
704
705 /*
706 * struct pmc_process
707 *
708 * Record a 'target' process being profiled.
709 *
710 * The target process being profiled could be different from the owner
711 * process which allocated the PMCs. Each target process descriptor
712 * is associated with NHWPMC 'struct pmc *' pointers. Each PMC at a
713 * given hardware row-index 'n' will use slot 'n' of the 'pp_pmcs[]'
714 * array. The size of this structure is thus PMC architecture
715 * dependent.
716 *
717 */
718
719 struct pmc_targetstate {
720 struct pmc *pp_pmc; /* target PMC */
721 pmc_value_t pp_pmcval; /* per-process value */
722 };
723
724 struct pmc_process {
725 LIST_ENTRY(pmc_process) pp_next; /* hash chain */
726 int pp_refcnt; /* reference count */
727 uint32_t pp_flags; /* flags PMC_PP_* */
728 struct proc *pp_proc; /* target thread */
729 struct pmc_targetstate pp_pmcs[]; /* NHWPMCs */
730 };
731
732 #define PMC_PP_ENABLE_MSR_ACCESS 0x00000001
733
734 /*
735 * struct pmc_owner
736 *
737 * We associate a PMC with an 'owner' process.
738 *
739 * A process can be associated with 0..NCPUS*NHWPMC PMCs during its
740 * lifetime, where NCPUS is the numbers of CPUS in the system and
741 * NHWPMC is the number of hardware PMCs per CPU. These are
742 * maintained in the list headed by the 'po_pmcs' to save on space.
743 *
744 */
745
746 struct pmc_owner {
747 LIST_ENTRY(pmc_owner) po_next; /* hash chain */
748 LIST_ENTRY(pmc_owner) po_ssnext; /* list of SS PMC owners */
749 LIST_HEAD(, pmc) po_pmcs; /* owned PMC list */
750 TAILQ_HEAD(, pmclog_buffer) po_logbuffers; /* (o) logbuffer list */
751 struct mtx po_mtx; /* spin lock for (o) */
752 struct proc *po_owner; /* owner proc */
753 uint32_t po_flags; /* (k) flags PMC_PO_* */
754 struct proc *po_kthread; /* (k) helper kthread */
755 struct pmclog_buffer *po_curbuf; /* current log buffer */
756 struct file *po_file; /* file reference */
757 int po_error; /* recorded error */
758 short po_sscount; /* # SS PMCs owned */
759 short po_logprocmaps; /* global mappings done */
760 };
761
762 #define PMC_PO_OWNS_LOGFILE 0x00000001 /* has a log file */
763 #define PMC_PO_SHUTDOWN 0x00000010 /* in the process of shutdown */
764 #define PMC_PO_INITIAL_MAPPINGS_DONE 0x00000020
765
766 /*
767 * struct pmc_hw -- describe the state of the PMC hardware
768 *
769 * When in use, a HW PMC is associated with one allocated 'struct pmc'
770 * pointed to by field 'phw_pmc'. When inactive, this field is NULL.
771 *
772 * On an SMP box, one or more HW PMC's in process virtual mode with
773 * the same 'phw_pmc' could be executing on different CPUs. In order
774 * to handle this case correctly, we need to ensure that only
775 * incremental counts get added to the saved value in the associated
776 * 'struct pmc'. The 'phw_save' field is used to keep the saved PMC
777 * value at the time the hardware is started during this context
778 * switch (i.e., the difference between the new (hardware) count and
779 * the saved count is atomically added to the count field in 'struct
780 * pmc' at context switch time).
781 *
782 */
783
784 struct pmc_hw {
785 uint32_t phw_state; /* see PHW_* macros below */
786 struct pmc *phw_pmc; /* current thread PMC */
787 };
788
789 #define PMC_PHW_RI_MASK 0x000000FF
790 #define PMC_PHW_CPU_SHIFT 8
791 #define PMC_PHW_CPU_MASK 0x0000FF00
792 #define PMC_PHW_FLAGS_SHIFT 16
793 #define PMC_PHW_FLAGS_MASK 0xFFFF0000
794
795 #define PMC_PHW_INDEX_TO_STATE(ri) ((ri) & PMC_PHW_RI_MASK)
796 #define PMC_PHW_STATE_TO_INDEX(state) ((state) & PMC_PHW_RI_MASK)
797 #define PMC_PHW_CPU_TO_STATE(cpu) (((cpu) << PMC_PHW_CPU_SHIFT) & \
798 PMC_PHW_CPU_MASK)
799 #define PMC_PHW_STATE_TO_CPU(state) (((state) & PMC_PHW_CPU_MASK) >> \
800 PMC_PHW_CPU_SHIFT)
801 #define PMC_PHW_FLAGS_TO_STATE(flags) (((flags) << PMC_PHW_FLAGS_SHIFT) & \
802 PMC_PHW_FLAGS_MASK)
803 #define PMC_PHW_STATE_TO_FLAGS(state) (((state) & PMC_PHW_FLAGS_MASK) >> \
804 PMC_PHW_FLAGS_SHIFT)
805 #define PMC_PHW_FLAG_IS_ENABLED (PMC_PHW_FLAGS_TO_STATE(0x01))
806 #define PMC_PHW_FLAG_IS_SHAREABLE (PMC_PHW_FLAGS_TO_STATE(0x02))
807
808 /*
809 * struct pmc_sample
810 *
811 * Space for N (tunable) PC samples and associated control data.
812 */
813
814 struct pmc_sample {
815 uint16_t ps_nsamples; /* callchain depth */
816 uint8_t ps_cpu; /* cpu number */
817 uint8_t ps_flags; /* other flags */
818 pid_t ps_pid; /* process PID or -1 */
819 struct thread *ps_td; /* which thread */
820 struct pmc *ps_pmc; /* interrupting PMC */
821 uintptr_t *ps_pc; /* (const) callchain start */
822 };
823
824 #define PMC_SAMPLE_FREE ((uint16_t) 0)
825 #define PMC_SAMPLE_INUSE ((uint16_t) 0xFFFF)
826
827 struct pmc_samplebuffer {
828 struct pmc_sample * volatile ps_read; /* read pointer */
829 struct pmc_sample * volatile ps_write; /* write pointer */
830 uintptr_t *ps_callchains; /* all saved call chains */
831 struct pmc_sample *ps_fence; /* one beyond ps_samples[] */
832 struct pmc_sample ps_samples[]; /* array of sample entries */
833 };
834
835
836 /*
837 * struct pmc_cpustate
838 *
839 * A CPU is modelled as a collection of HW PMCs with space for additional
840 * flags.
841 */
842
843 struct pmc_cpu {
844 uint32_t pc_state; /* physical cpu number + flags */
845 struct pmc_samplebuffer *pc_sb; /* space for samples */
846 struct pmc_hw *pc_hwpmcs[]; /* 'npmc' pointers */
847 };
848
849 #define PMC_PCPU_CPU_MASK 0x000000FF
850 #define PMC_PCPU_FLAGS_MASK 0xFFFFFF00
851 #define PMC_PCPU_FLAGS_SHIFT 8
852 #define PMC_PCPU_STATE_TO_CPU(S) ((S) & PMC_PCPU_CPU_MASK)
853 #define PMC_PCPU_STATE_TO_FLAGS(S) (((S) & PMC_PCPU_FLAGS_MASK) >> PMC_PCPU_FLAGS_SHIFT)
854 #define PMC_PCPU_FLAGS_TO_STATE(F) (((F) << PMC_PCPU_FLAGS_SHIFT) & PMC_PCPU_FLAGS_MASK)
855 #define PMC_PCPU_CPU_TO_STATE(C) ((C) & PMC_PCPU_CPU_MASK)
856 #define PMC_PCPU_FLAG_HTT (PMC_PCPU_FLAGS_TO_STATE(0x1))
857
858 /*
859 * struct pmc_binding
860 *
861 * CPU binding information.
862 */
863
864 struct pmc_binding {
865 int pb_bound; /* is bound? */
866 int pb_cpu; /* if so, to which CPU */
867 };
868
869
870 struct pmc_mdep;
871
872 /*
873 * struct pmc_classdep
874 *
875 * PMC class-dependent operations.
876 */
877 struct pmc_classdep {
878 uint32_t pcd_caps; /* class capabilities */
879 enum pmc_class pcd_class; /* class id */
880 int pcd_num; /* number of PMCs */
881 int pcd_ri; /* row index of the first PMC in class */
882 int pcd_width; /* width of the PMC */
883
884 /* configuring/reading/writing the hardware PMCs */
885 int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm);
886 int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm);
887 int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value);
888 int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value);
889
890 /* pmc allocation/release */
891 int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t,
892 const struct pmc_op_pmcallocate *_a);
893 int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm);
894
895 /* starting and stopping PMCs */
896 int (*pcd_start_pmc)(int _cpu, int _ri);
897 int (*pcd_stop_pmc)(int _cpu, int _ri);
898
899 /* description */
900 int (*pcd_describe)(int _cpu, int _ri, struct pmc_info *_pi,
901 struct pmc **_ppmc);
902
903 /* class-dependent initialization & finalization */
904 int (*pcd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
905 int (*pcd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
906
907 /* machine-specific interface */
908 int (*pcd_get_msr)(int _ri, uint32_t *_msr);
909 };
910
911 /*
912 * struct pmc_mdep
913 *
914 * Machine dependent bits needed per CPU type.
915 */
916
917 struct pmc_mdep {
918 uint32_t pmd_cputype; /* from enum pmc_cputype */
919 uint32_t pmd_npmc; /* number of PMCs per CPU */
920 uint32_t pmd_nclass; /* number of PMC classes present */
921
922 /*
923 * Machine dependent methods.
924 */
925
926 /* per-cpu initialization and finalization */
927 int (*pmd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
928 int (*pmd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
929
930 /* thread context switch in/out */
931 int (*pmd_switch_in)(struct pmc_cpu *_p, struct pmc_process *_pp);
932 int (*pmd_switch_out)(struct pmc_cpu *_p, struct pmc_process *_pp);
933
934 /* handle a PMC interrupt */
935 int (*pmd_intr)(int _cpu, struct trapframe *_tf);
936
937 /*
938 * PMC class dependent information.
939 */
940 struct pmc_classdep pmd_classdep[];
941 };
942
943 /*
944 * Per-CPU state. This is an array of 'mp_ncpu' pointers
945 * to struct pmc_cpu descriptors.
946 */
947
948 extern struct pmc_cpu **pmc_pcpu;
949
950 /* driver statistics */
951 extern struct pmc_op_getdriverstats pmc_stats;
952
953 #if defined(DEBUG) && DEBUG
954
955 /* debug flags, major flag groups */
956 struct pmc_debugflags {
957 int pdb_CPU;
958 int pdb_CSW;
959 int pdb_LOG;
960 int pdb_MDP;
961 int pdb_MOD;
962 int pdb_OWN;
963 int pdb_PMC;
964 int pdb_PRC;
965 int pdb_SAM;
966 };
967
968 extern struct pmc_debugflags pmc_debugflags;
969
970 #define PMC_DEBUG_STRSIZE 128
971 #define PMC_DEBUG_DEFAULT_FLAGS { 0, 0, 0, 0, 0, 0, 0, 0 }
972
973 #define PMCDBG(M,N,L,F,...) do { \
974 if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \
975 printf(#M ":" #N ":" #L ": " F "\n", __VA_ARGS__); \
976 } while (0)
977
978 /* Major numbers */
979 #define PMC_DEBUG_MAJ_CPU 0 /* cpu switches */
980 #define PMC_DEBUG_MAJ_CSW 1 /* context switches */
981 #define PMC_DEBUG_MAJ_LOG 2 /* logging */
982 #define PMC_DEBUG_MAJ_MDP 3 /* machine dependent */
983 #define PMC_DEBUG_MAJ_MOD 4 /* misc module infrastructure */
984 #define PMC_DEBUG_MAJ_OWN 5 /* owner */
985 #define PMC_DEBUG_MAJ_PMC 6 /* pmc management */
986 #define PMC_DEBUG_MAJ_PRC 7 /* processes */
987 #define PMC_DEBUG_MAJ_SAM 8 /* sampling */
988
989 /* Minor numbers */
990
991 /* Common (8 bits) */
992 #define PMC_DEBUG_MIN_ALL 0 /* allocation */
993 #define PMC_DEBUG_MIN_REL 1 /* release */
994 #define PMC_DEBUG_MIN_OPS 2 /* ops: start, stop, ... */
995 #define PMC_DEBUG_MIN_INI 3 /* init */
996 #define PMC_DEBUG_MIN_FND 4 /* find */
997
998 /* MODULE */
999 #define PMC_DEBUG_MIN_PMH 14 /* pmc_hook */
1000 #define PMC_DEBUG_MIN_PMS 15 /* pmc_syscall */
1001
1002 /* OWN */
1003 #define PMC_DEBUG_MIN_ORM 8 /* owner remove */
1004 #define PMC_DEBUG_MIN_OMR 9 /* owner maybe remove */
1005
1006 /* PROCESSES */
1007 #define PMC_DEBUG_MIN_TLK 8 /* link target */
1008 #define PMC_DEBUG_MIN_TUL 9 /* unlink target */
1009 #define PMC_DEBUG_MIN_EXT 10 /* process exit */
1010 #define PMC_DEBUG_MIN_EXC 11 /* process exec */
1011 #define PMC_DEBUG_MIN_FRK 12 /* process fork */
1012 #define PMC_DEBUG_MIN_ATT 13 /* attach/detach */
1013 #define PMC_DEBUG_MIN_SIG 14 /* signalling */
1014
1015 /* CONTEXT SWITCHES */
1016 #define PMC_DEBUG_MIN_SWI 8 /* switch in */
1017 #define PMC_DEBUG_MIN_SWO 9 /* switch out */
1018
1019 /* PMC */
1020 #define PMC_DEBUG_MIN_REG 8 /* pmc register */
1021 #define PMC_DEBUG_MIN_ALR 9 /* allocate row */
1022
1023 /* MACHINE DEPENDENT LAYER */
1024 #define PMC_DEBUG_MIN_REA 8 /* read */
1025 #define PMC_DEBUG_MIN_WRI 9 /* write */
1026 #define PMC_DEBUG_MIN_CFG 10 /* config */
1027 #define PMC_DEBUG_MIN_STA 11 /* start */
1028 #define PMC_DEBUG_MIN_STO 12 /* stop */
1029 #define PMC_DEBUG_MIN_INT 13 /* interrupts */
1030
1031 /* CPU */
1032 #define PMC_DEBUG_MIN_BND 8 /* bind */
1033 #define PMC_DEBUG_MIN_SEL 9 /* select */
1034
1035 /* LOG */
1036 #define PMC_DEBUG_MIN_GTB 8 /* get buf */
1037 #define PMC_DEBUG_MIN_SIO 9 /* schedule i/o */
1038 #define PMC_DEBUG_MIN_FLS 10 /* flush */
1039 #define PMC_DEBUG_MIN_SAM 11 /* sample */
1040
1041 #else
1042 #define PMCDBG(M,N,L,F,...) /* nothing */
1043 #endif
1044
1045 /* declare a dedicated memory pool */
1046 MALLOC_DECLARE(M_PMC);
1047
1048 /*
1049 * Functions
1050 */
1051
1052 struct pmc_mdep *pmc_md_initialize(void); /* MD init function */
1053 void pmc_md_finalize(struct pmc_mdep *_md); /* MD fini function */
1054 int pmc_getrowdisp(int _ri);
1055 int pmc_process_interrupt(int _cpu, struct pmc *_pm,
1056 struct trapframe *_tf, int _inuserspace);
1057 int pmc_save_kernel_callchain(uintptr_t *_cc, int _maxsamples,
1058 struct trapframe *_tf);
1059 int pmc_save_user_callchain(uintptr_t *_cc, int _maxsamples,
1060 struct trapframe *_tf);
1061 #endif /* _KERNEL */
1062 #endif /* _SYS_PMC_H_ */
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