The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/sys/pmc.h

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    1 /*-
    2  * Copyright (c) 2003-2008, Joseph Koshy
    3  * Copyright (c) 2007 The FreeBSD Foundation
    4  * All rights reserved.
    5  *
    6  * Portions of this software were developed by A. Joseph Koshy under
    7  * sponsorship from the FreeBSD Foundation and Google, Inc.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  *
   30  * $FreeBSD: releng/9.0/sys/sys/pmc.h 209196 2010-06-15 09:12:31Z fabient $
   31  */
   32 
   33 #ifndef _SYS_PMC_H_
   34 #define _SYS_PMC_H_
   35 
   36 #include <dev/hwpmc/pmc_events.h>
   37 
   38 #include <machine/pmc_mdep.h>
   39 #include <machine/profile.h>
   40 
   41 #define PMC_MODULE_NAME         "hwpmc"
   42 #define PMC_NAME_MAX            16 /* HW counter name size */
   43 #define PMC_CLASS_MAX           6  /* max #classes of PMCs per-system */
   44 
   45 /*
   46  * Kernel<->userland API version number [MMmmpppp]
   47  *
   48  * Major numbers are to be incremented when an incompatible change to
   49  * the ABI occurs that older clients will not be able to handle.
   50  *
   51  * Minor numbers are incremented when a backwards compatible change
   52  * occurs that allows older correct programs to run unchanged.  For
   53  * example, when support for a new PMC type is added.
   54  *
   55  * The patch version is incremented for every bug fix.
   56  */
   57 #define PMC_VERSION_MAJOR       0x03
   58 #define PMC_VERSION_MINOR       0x01
   59 #define PMC_VERSION_PATCH       0x0000
   60 
   61 #define PMC_VERSION             (PMC_VERSION_MAJOR << 24 |              \
   62         PMC_VERSION_MINOR << 16 | PMC_VERSION_PATCH)
   63 
   64 /*
   65  * Kinds of CPUs known.
   66  *
   67  * We keep track of CPU variants that need to be distinguished in
   68  * some way for PMC operations.  CPU names are grouped by manufacturer
   69  * and numbered sparsely in order to minimize changes to the ABI involved
   70  * when new CPUs are added.
   71  */
   72 
   73 #define __PMC_CPUS()                                            \
   74         __PMC_CPU(AMD_K7,       0x00,   "AMD K7")               \
   75         __PMC_CPU(AMD_K8,       0x01,   "AMD K8")               \
   76         __PMC_CPU(INTEL_P5,     0x80,   "Intel Pentium")        \
   77         __PMC_CPU(INTEL_P6,     0x81,   "Intel Pentium Pro")    \
   78         __PMC_CPU(INTEL_CL,     0x82,   "Intel Celeron")        \
   79         __PMC_CPU(INTEL_PII,    0x83,   "Intel Pentium II")     \
   80         __PMC_CPU(INTEL_PIII,   0x84,   "Intel Pentium III")    \
   81         __PMC_CPU(INTEL_PM,     0x85,   "Intel Pentium M")      \
   82         __PMC_CPU(INTEL_PIV,    0x86,   "Intel Pentium IV")     \
   83         __PMC_CPU(INTEL_CORE,   0x87,   "Intel Core Solo/Duo")  \
   84         __PMC_CPU(INTEL_CORE2,  0x88,   "Intel Core2")          \
   85         __PMC_CPU(INTEL_CORE2EXTREME,   0x89,   "Intel Core2 Extreme")  \
   86         __PMC_CPU(INTEL_ATOM,   0x8A,   "Intel Atom") \
   87         __PMC_CPU(INTEL_COREI7, 0x8B,   "Intel Core i7") \
   88         __PMC_CPU(INTEL_WESTMERE, 0x8C,   "Intel Westmere") \
   89         __PMC_CPU(INTEL_XSCALE, 0x100,  "Intel XScale") \
   90         __PMC_CPU(MIPS_24K,     0x200,  "MIPS 24K") 
   91 
   92 enum pmc_cputype {
   93 #undef  __PMC_CPU
   94 #define __PMC_CPU(S,V,D)        PMC_CPU_##S = V,
   95         __PMC_CPUS()
   96 };
   97 
   98 #define PMC_CPU_FIRST   PMC_CPU_AMD_K7
   99 #define PMC_CPU_LAST    PMC_CPU_MIPS_24K
  100 
  101 /*
  102  * Classes of PMCs
  103  */
  104 
  105 #define __PMC_CLASSES()                                                 \
  106         __PMC_CLASS(TSC)        /* CPU Timestamp counter */             \
  107         __PMC_CLASS(K7)         /* AMD K7 performance counters */       \
  108         __PMC_CLASS(K8)         /* AMD K8 performance counters */       \
  109         __PMC_CLASS(P5)         /* Intel Pentium counters */            \
  110         __PMC_CLASS(P6)         /* Intel Pentium Pro counters */        \
  111         __PMC_CLASS(P4)         /* Intel Pentium-IV counters */         \
  112         __PMC_CLASS(IAF)        /* Intel Core2/Atom, fixed function */  \
  113         __PMC_CLASS(IAP)        /* Intel Core...Atom, programmable */   \
  114         __PMC_CLASS(UCF)        /* Intel Uncore fixed function */       \
  115         __PMC_CLASS(UCP)        /* Intel Uncore programmable */         \
  116         __PMC_CLASS(XSCALE)     /* Intel XScale counters */             \
  117         __PMC_CLASS(MIPS24K)    /* MIPS 24K */
  118 
  119 enum pmc_class {
  120 #undef  __PMC_CLASS
  121 #define __PMC_CLASS(N)  PMC_CLASS_##N ,
  122         __PMC_CLASSES()
  123 };
  124 
  125 #define PMC_CLASS_FIRST PMC_CLASS_TSC
  126 #define PMC_CLASS_LAST  PMC_CLASS_MIPS24K
  127 
  128 /*
  129  * A PMC can be in the following states:
  130  *
  131  * Hardware states:
  132  *   DISABLED   -- administratively prohibited from being used.
  133  *   FREE       -- HW available for use
  134  * Software states:
  135  *   ALLOCATED  -- allocated
  136  *   STOPPED    -- allocated, but not counting events
  137  *   RUNNING    -- allocated, and in operation; 'pm_runcount'
  138  *                 holds the number of CPUs using this PMC at
  139  *                 a given instant
  140  *   DELETED    -- being destroyed
  141  */
  142 
  143 #define __PMC_HWSTATES()                        \
  144         __PMC_STATE(DISABLED)                   \
  145         __PMC_STATE(FREE)
  146 
  147 #define __PMC_SWSTATES()                        \
  148         __PMC_STATE(ALLOCATED)                  \
  149         __PMC_STATE(STOPPED)                    \
  150         __PMC_STATE(RUNNING)                    \
  151         __PMC_STATE(DELETED)
  152 
  153 #define __PMC_STATES()                          \
  154         __PMC_HWSTATES()                        \
  155         __PMC_SWSTATES()
  156 
  157 enum pmc_state {
  158 #undef  __PMC_STATE
  159 #define __PMC_STATE(S)  PMC_STATE_##S,
  160         __PMC_STATES()
  161         __PMC_STATE(MAX)
  162 };
  163 
  164 #define PMC_STATE_FIRST PMC_STATE_DISABLED
  165 #define PMC_STATE_LAST  PMC_STATE_DELETED
  166 
  167 /*
  168  * An allocated PMC may used as a 'global' counter or as a
  169  * 'thread-private' one.  Each such mode of use can be in either
  170  * statistical sampling mode or in counting mode.  Thus a PMC in use
  171  *
  172  * SS i.e., SYSTEM STATISTICAL  -- system-wide statistical profiling
  173  * SC i.e., SYSTEM COUNTER      -- system-wide counting mode
  174  * TS i.e., THREAD STATISTICAL  -- thread virtual, statistical profiling
  175  * TC i.e., THREAD COUNTER      -- thread virtual, counting mode
  176  *
  177  * Statistical profiling modes rely on the PMC periodically delivering
  178  * a interrupt to the CPU (when the configured number of events have
  179  * been measured), so the PMC must have the ability to generate
  180  * interrupts.
  181  *
  182  * In counting modes, the PMC counts its configured events, with the
  183  * value of the PMC being read whenever needed by its owner process.
  184  *
  185  * The thread specific modes "virtualize" the PMCs -- the PMCs appear
  186  * to be thread private and count events only when the profiled thread
  187  * actually executes on the CPU.
  188  *
  189  * The system-wide "global" modes keep the PMCs running all the time
  190  * and are used to measure the behaviour of the whole system.
  191  */
  192 
  193 #define __PMC_MODES()                           \
  194         __PMC_MODE(SS,  0)                      \
  195         __PMC_MODE(SC,  1)                      \
  196         __PMC_MODE(TS,  2)                      \
  197         __PMC_MODE(TC,  3)
  198 
  199 enum pmc_mode {
  200 #undef  __PMC_MODE
  201 #define __PMC_MODE(M,N) PMC_MODE_##M = N,
  202         __PMC_MODES()
  203 };
  204 
  205 #define PMC_MODE_FIRST  PMC_MODE_SS
  206 #define PMC_MODE_LAST   PMC_MODE_TC
  207 
  208 #define PMC_IS_COUNTING_MODE(mode)                              \
  209         ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC)
  210 #define PMC_IS_SYSTEM_MODE(mode)                                \
  211         ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC)
  212 #define PMC_IS_SAMPLING_MODE(mode)                              \
  213         ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS)
  214 #define PMC_IS_VIRTUAL_MODE(mode)                               \
  215         ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC)
  216 
  217 /*
  218  * PMC row disposition
  219  */
  220 
  221 #define __PMC_DISPOSITIONS(N)                                   \
  222         __PMC_DISP(STANDALONE)  /* global/disabled counters */  \
  223         __PMC_DISP(FREE)        /* free/available */            \
  224         __PMC_DISP(THREAD)      /* thread-virtual PMCs */       \
  225         __PMC_DISP(UNKNOWN)     /* sentinel */
  226 
  227 enum pmc_disp {
  228 #undef  __PMC_DISP
  229 #define __PMC_DISP(D)   PMC_DISP_##D ,
  230         __PMC_DISPOSITIONS()
  231 };
  232 
  233 #define PMC_DISP_FIRST  PMC_DISP_STANDALONE
  234 #define PMC_DISP_LAST   PMC_DISP_THREAD
  235 
  236 /*
  237  * Counter capabilities
  238  *
  239  * __PMC_CAPS(NAME, VALUE, DESCRIPTION)
  240  */
  241 
  242 #define __PMC_CAPS()                                                    \
  243         __PMC_CAP(INTERRUPT,    0, "generate interrupts")               \
  244         __PMC_CAP(USER,         1, "count user-mode events")            \
  245         __PMC_CAP(SYSTEM,       2, "count system-mode events")          \
  246         __PMC_CAP(EDGE,         3, "do edge detection of events")       \
  247         __PMC_CAP(THRESHOLD,    4, "ignore events below a threshold")   \
  248         __PMC_CAP(READ,         5, "read PMC counter")                  \
  249         __PMC_CAP(WRITE,        6, "reprogram PMC counter")             \
  250         __PMC_CAP(INVERT,       7, "invert comparision sense")          \
  251         __PMC_CAP(QUALIFIER,    8, "further qualify monitored events")  \
  252         __PMC_CAP(PRECISE,      9, "perform precise sampling")          \
  253         __PMC_CAP(TAGGING,      10, "tag upstream events")              \
  254         __PMC_CAP(CASCADE,      11, "cascade counters")
  255 
  256 enum pmc_caps
  257 {
  258 #undef  __PMC_CAP
  259 #define __PMC_CAP(NAME, VALUE, DESCR)   PMC_CAP_##NAME = (1 << VALUE) ,
  260         __PMC_CAPS()
  261 };
  262 
  263 #define PMC_CAP_FIRST           PMC_CAP_INTERRUPT
  264 #define PMC_CAP_LAST            PMC_CAP_CASCADE
  265 
  266 /*
  267  * PMC Event Numbers
  268  *
  269  * These are generated from the definitions in "dev/hwpmc/pmc_events.h".
  270  */
  271 
  272 enum pmc_event {
  273 #undef  __PMC_EV
  274 #undef  __PMC_EV_BLOCK
  275 #define __PMC_EV_BLOCK(C,V)     PMC_EV_ ## C ## __BLOCK_START = (V) - 1 ,
  276 #define __PMC_EV(C,N)           PMC_EV_ ## C ## _ ## N ,
  277         __PMC_EVENTS()
  278 };
  279 
  280 /*
  281  * PMC SYSCALL INTERFACE
  282  */
  283 
  284 /*
  285  * "PMC_OPS" -- these are the commands recognized by the kernel
  286  * module, and are used when performing a system call from userland.
  287  */
  288 #define __PMC_OPS()                                                     \
  289         __PMC_OP(CONFIGURELOG, "Set log file")                          \
  290         __PMC_OP(FLUSHLOG, "Flush log file")                            \
  291         __PMC_OP(GETCPUINFO, "Get system CPU information")              \
  292         __PMC_OP(GETDRIVERSTATS, "Get driver statistics")               \
  293         __PMC_OP(GETMODULEVERSION, "Get module version")                \
  294         __PMC_OP(GETPMCINFO, "Get per-cpu PMC information")             \
  295         __PMC_OP(PMCADMIN, "Set PMC state")                             \
  296         __PMC_OP(PMCALLOCATE, "Allocate and configure a PMC")           \
  297         __PMC_OP(PMCATTACH, "Attach a PMC to a process")                \
  298         __PMC_OP(PMCDETACH, "Detach a PMC from a process")              \
  299         __PMC_OP(PMCGETMSR, "Get a PMC's hardware address")             \
  300         __PMC_OP(PMCRELEASE, "Release a PMC")                           \
  301         __PMC_OP(PMCRW, "Read/Set a PMC")                               \
  302         __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate")        \
  303         __PMC_OP(PMCSTART, "Start a PMC")                               \
  304         __PMC_OP(PMCSTOP, "Stop a PMC")                                 \
  305         __PMC_OP(WRITELOG, "Write a cookie to the log file")
  306 
  307 
  308 enum pmc_ops {
  309 #undef  __PMC_OP
  310 #define __PMC_OP(N, D)  PMC_OP_##N,
  311         __PMC_OPS()
  312 };
  313 
  314 
  315 /*
  316  * Flags used in operations on PMCs.
  317  */
  318 
  319 #define PMC_F_FORCE             0x00000001 /*OP ADMIN force operation */
  320 #define PMC_F_DESCENDANTS       0x00000002 /*OP ALLOCATE track descendants */
  321 #define PMC_F_LOG_PROCCSW       0x00000004 /*OP ALLOCATE track ctx switches */
  322 #define PMC_F_LOG_PROCEXIT      0x00000008 /*OP ALLOCATE log proc exits */
  323 #define PMC_F_NEWVALUE          0x00000010 /*OP RW write new value */
  324 #define PMC_F_OLDVALUE          0x00000020 /*OP RW get old value */
  325 #define PMC_F_KGMON             0x00000040 /*OP ALLOCATE kgmon(8) profiling */
  326 /* V2 API */
  327 #define PMC_F_CALLCHAIN         0x00000080 /*OP ALLOCATE capture callchains */
  328 
  329 /* internal flags */
  330 #define PMC_F_ATTACHED_TO_OWNER 0x00010000 /*attached to owner*/
  331 #define PMC_F_NEEDS_LOGFILE     0x00020000 /*needs log file */
  332 #define PMC_F_ATTACH_DONE       0x00040000 /*attached at least once */
  333 
  334 #define PMC_CALLCHAIN_DEPTH_MAX 32
  335 #define PMC_CC_F_USERSPACE      0x01       /*userspace callchain*/
  336 
  337 /*
  338  * Cookies used to denote allocated PMCs, and the values of PMCs.
  339  */
  340 
  341 typedef uint32_t        pmc_id_t;
  342 typedef uint64_t        pmc_value_t;
  343 
  344 #define PMC_ID_INVALID          (~ (pmc_id_t) 0)
  345 
  346 /*
  347  * PMC IDs have the following format:
  348  *
  349  * +--------+----------+-----------+-----------+
  350  * |   CPU  | PMC MODE | PMC CLASS | ROW INDEX |
  351  * +--------+----------+-----------+-----------+
  352  *
  353  * where each field is 8 bits wide.  Field 'CPU' is set to the
  354  * requested CPU for system-wide PMCs or PMC_CPU_ANY for process-mode
  355  * PMCs.  Field 'PMC MODE' is the allocated PMC mode.  Field 'PMC
  356  * CLASS' is the class of the PMC.  Field 'ROW INDEX' is the row index
  357  * for the PMC.
  358  *
  359  * The 'ROW INDEX' ranges over 0..NWPMCS where NHWPMCS is the total
  360  * number of hardware PMCs on this cpu.
  361  */
  362 
  363 
  364 #define PMC_ID_TO_ROWINDEX(ID)  ((ID) & 0xFF)
  365 #define PMC_ID_TO_CLASS(ID)     (((ID) & 0xFF00) >> 8)
  366 #define PMC_ID_TO_MODE(ID)      (((ID) & 0xFF0000) >> 16)
  367 #define PMC_ID_TO_CPU(ID)       (((ID) & 0xFF000000) >> 24)
  368 #define PMC_ID_MAKE_ID(CPU,MODE,CLASS,ROWINDEX)                 \
  369         ((((CPU) & 0xFF) << 24) | (((MODE) & 0xFF) << 16) |     \
  370         (((CLASS) & 0xFF) << 8) | ((ROWINDEX) & 0xFF))
  371 
  372 /*
  373  * Data structures for system calls supported by the pmc driver.
  374  */
  375 
  376 /*
  377  * OP PMCALLOCATE
  378  *
  379  * Allocate a PMC on the named CPU.
  380  */
  381 
  382 #define PMC_CPU_ANY     ~0
  383 
  384 struct pmc_op_pmcallocate {
  385         uint32_t        pm_caps;        /* PMC_CAP_* */
  386         uint32_t        pm_cpu;         /* CPU number or PMC_CPU_ANY */
  387         enum pmc_class  pm_class;       /* class of PMC desired */
  388         enum pmc_event  pm_ev;          /* [enum pmc_event] desired */
  389         uint32_t        pm_flags;       /* additional modifiers PMC_F_* */
  390         enum pmc_mode   pm_mode;        /* desired mode */
  391         pmc_id_t        pm_pmcid;       /* [return] process pmc id */
  392 
  393         union pmc_md_op_pmcallocate pm_md; /* MD layer extensions */
  394 };
  395 
  396 /*
  397  * OP PMCADMIN
  398  *
  399  * Set the administrative state (i.e., whether enabled or disabled) of
  400  * a PMC 'pm_pmc' on CPU 'pm_cpu'.  Note that 'pm_pmc' specifies an
  401  * absolute PMC number and need not have been first allocated by the
  402  * calling process.
  403  */
  404 
  405 struct pmc_op_pmcadmin {
  406         int             pm_cpu;         /* CPU# */
  407         uint32_t        pm_flags;       /* flags */
  408         int             pm_pmc;         /* PMC# */
  409         enum pmc_state  pm_state;       /* desired state */
  410 };
  411 
  412 /*
  413  * OP PMCATTACH / OP PMCDETACH
  414  *
  415  * Attach/detach a PMC and a process.
  416  */
  417 
  418 struct pmc_op_pmcattach {
  419         pmc_id_t        pm_pmc;         /* PMC to attach to */
  420         pid_t           pm_pid;         /* target process */
  421 };
  422 
  423 /*
  424  * OP PMCSETCOUNT
  425  *
  426  * Set the sampling rate (i.e., the reload count) for statistical counters.
  427  * 'pm_pmcid' need to have been previously allocated using PMCALLOCATE.
  428  */
  429 
  430 struct pmc_op_pmcsetcount {
  431         pmc_value_t     pm_count;       /* initial/sample count */
  432         pmc_id_t        pm_pmcid;       /* PMC id to set */
  433 };
  434 
  435 
  436 /*
  437  * OP PMCRW
  438  *
  439  * Read the value of a PMC named by 'pm_pmcid'.  'pm_pmcid' needs
  440  * to have been previously allocated using PMCALLOCATE.
  441  */
  442 
  443 
  444 struct pmc_op_pmcrw {
  445         uint32_t        pm_flags;       /* PMC_F_{OLD,NEW}VALUE*/
  446         pmc_id_t        pm_pmcid;       /* pmc id */
  447         pmc_value_t     pm_value;       /* new&returned value */
  448 };
  449 
  450 
  451 /*
  452  * OP GETPMCINFO
  453  *
  454  * retrieve PMC state for a named CPU.  The caller is expected to
  455  * allocate 'npmc' * 'struct pmc_info' bytes of space for the return
  456  * values.
  457  */
  458 
  459 struct pmc_info {
  460         char            pm_name[PMC_NAME_MAX]; /* pmc name */
  461         enum pmc_class  pm_class;       /* enum pmc_class */
  462         int             pm_enabled;     /* whether enabled */
  463         enum pmc_disp   pm_rowdisp;     /* FREE, THREAD or STANDLONE */
  464         pid_t           pm_ownerpid;    /* owner, or -1 */
  465         enum pmc_mode   pm_mode;        /* current mode [enum pmc_mode] */
  466         enum pmc_event  pm_event;       /* current event */
  467         uint32_t        pm_flags;       /* current flags */
  468         pmc_value_t     pm_reloadcount; /* sampling counters only */
  469 };
  470 
  471 struct pmc_op_getpmcinfo {
  472         int32_t         pm_cpu;         /* 0 <= cpu < mp_maxid */
  473         struct pmc_info pm_pmcs[];      /* space for 'npmc' structures */
  474 };
  475 
  476 
  477 /*
  478  * OP GETCPUINFO
  479  *
  480  * Retrieve system CPU information.
  481  */
  482 
  483 struct pmc_classinfo {
  484         enum pmc_class  pm_class;       /* class id */
  485         uint32_t        pm_caps;        /* counter capabilities */
  486         uint32_t        pm_width;       /* width of the PMC */
  487         uint32_t        pm_num;         /* number of PMCs in class */
  488 };
  489 
  490 struct pmc_op_getcpuinfo {
  491         enum pmc_cputype pm_cputype; /* what kind of CPU */
  492         uint32_t        pm_ncpu;    /* max CPU number */
  493         uint32_t        pm_npmc;    /* #PMCs per CPU */
  494         uint32_t        pm_nclass;  /* #classes of PMCs */
  495         struct pmc_classinfo  pm_classes[PMC_CLASS_MAX];
  496 };
  497 
  498 /*
  499  * OP CONFIGURELOG
  500  *
  501  * Configure a log file for writing system-wide statistics to.
  502  */
  503 
  504 struct pmc_op_configurelog {
  505         int             pm_flags;
  506         int             pm_logfd;   /* logfile fd (or -1) */
  507 };
  508 
  509 /*
  510  * OP GETDRIVERSTATS
  511  *
  512  * Retrieve pmc(4) driver-wide statistics.
  513  */
  514 
  515 struct pmc_op_getdriverstats {
  516         int     pm_intr_ignored;        /* #interrupts ignored */
  517         int     pm_intr_processed;      /* #interrupts processed */
  518         int     pm_intr_bufferfull;     /* #interrupts with ENOSPC */
  519         int     pm_syscalls;            /* #syscalls */
  520         int     pm_syscall_errors;      /* #syscalls with errors */
  521         int     pm_buffer_requests;     /* #buffer requests */
  522         int     pm_buffer_requests_failed; /* #failed buffer requests */
  523         int     pm_log_sweeps;          /* #sample buffer processing passes */
  524 };
  525 
  526 /*
  527  * OP RELEASE / OP START / OP STOP
  528  *
  529  * Simple operations on a PMC id.
  530  */
  531 
  532 struct pmc_op_simple {
  533         pmc_id_t        pm_pmcid;
  534 };
  535 
  536 /*
  537  * OP WRITELOG
  538  *
  539  * Flush the current log buffer and write 4 bytes of user data to it.
  540  */
  541 
  542 struct pmc_op_writelog {
  543         uint32_t        pm_userdata;
  544 };
  545 
  546 /*
  547  * OP GETMSR
  548  *
  549  * Retrieve the machine specific address assoicated with the allocated
  550  * PMC.  This number can be used subsequently with a read-performance-counter
  551  * instruction.
  552  */
  553 
  554 struct pmc_op_getmsr {
  555         uint32_t        pm_msr;         /* machine specific address */
  556         pmc_id_t        pm_pmcid;       /* allocated pmc id */
  557 };
  558 
  559 #ifdef _KERNEL
  560 
  561 #include <sys/malloc.h>
  562 #include <sys/sysctl.h>
  563 
  564 #include <machine/frame.h>
  565 
  566 #define PMC_HASH_SIZE                           16
  567 #define PMC_MTXPOOL_SIZE                        32
  568 #define PMC_LOG_BUFFER_SIZE                     4
  569 #define PMC_NLOGBUFFERS                         16
  570 #define PMC_NSAMPLES                            32
  571 #define PMC_CALLCHAIN_DEPTH                     8
  572 
  573 #define PMC_SYSCTL_NAME_PREFIX "kern." PMC_MODULE_NAME "."
  574 
  575 /*
  576  * Locking keys
  577  *
  578  * (b) - pmc_bufferlist_mtx (spin lock)
  579  * (k) - pmc_kthread_mtx (sleep lock)
  580  * (o) - po->po_mtx (spin lock)
  581  */
  582 
  583 /*
  584  * PMC commands
  585  */
  586 
  587 struct pmc_syscall_args {
  588         uint32_t        pmop_code;      /* one of PMC_OP_* */
  589         void            *pmop_data;     /* syscall parameter */
  590 };
  591 
  592 /*
  593  * Interface to processor specific s1tuff
  594  */
  595 
  596 /*
  597  * struct pmc_descr
  598  *
  599  * Machine independent (i.e., the common parts) of a human readable
  600  * PMC description.
  601  */
  602 
  603 struct pmc_descr {
  604         char            pd_name[PMC_NAME_MAX]; /* name */
  605         uint32_t        pd_caps;        /* capabilities */
  606         enum pmc_class  pd_class;       /* class of the PMC */
  607         uint32_t        pd_width;       /* width in bits */
  608 };
  609 
  610 /*
  611  * struct pmc_target
  612  *
  613  * This structure records all the target processes associated with a
  614  * PMC.
  615  */
  616 
  617 struct pmc_target {
  618         LIST_ENTRY(pmc_target)  pt_next;
  619         struct pmc_process      *pt_process; /* target descriptor */
  620 };
  621 
  622 /*
  623  * struct pmc
  624  *
  625  * Describes each allocated PMC.
  626  *
  627  * Each PMC has precisely one owner, namely the process that allocated
  628  * the PMC.
  629  *
  630  * A PMC may be attached to multiple target processes.  The
  631  * 'pm_targets' field links all the target processes being monitored
  632  * by this PMC.
  633  *
  634  * The 'pm_savedvalue' field is protected by a mutex.
  635  *
  636  * On a multi-cpu machine, multiple target threads associated with a
  637  * process-virtual PMC could be concurrently executing on different
  638  * CPUs.  The 'pm_runcount' field is atomically incremented every time
  639  * the PMC gets scheduled on a CPU and atomically decremented when it
  640  * get descheduled.  Deletion of a PMC is only permitted when this
  641  * field is ''.
  642  *
  643  */
  644 
  645 struct pmc {
  646         LIST_HEAD(,pmc_target)  pm_targets;     /* list of target processes */
  647         LIST_ENTRY(pmc)         pm_next;        /* owner's list */
  648 
  649         /*
  650          * System-wide PMCs are allocated on a CPU and are not moved
  651          * around.  For system-wide PMCs we record the CPU the PMC was
  652          * allocated on in the 'CPU' field of the pmc ID.
  653          *
  654          * Virtual PMCs run on whichever CPU is currently executing
  655          * their targets' threads.  For these PMCs we need to save
  656          * their current PMC counter values when they are taken off
  657          * CPU.
  658          */
  659 
  660         union {
  661                 pmc_value_t     pm_savedvalue;  /* Virtual PMCS */
  662         } pm_gv;
  663 
  664         /*
  665          * For sampling mode PMCs, we keep track of the PMC's "reload
  666          * count", which is the counter value to be loaded in when
  667          * arming the PMC for the next counting session.  For counting
  668          * modes on PMCs that are read-only (e.g., the x86 TSC), we
  669          * keep track of the initial value at the start of
  670          * counting-mode operation.
  671          */
  672 
  673         union {
  674                 pmc_value_t     pm_reloadcount; /* sampling PMC modes */
  675                 pmc_value_t     pm_initial;     /* counting PMC modes */
  676         } pm_sc;
  677 
  678         uint32_t        pm_stalled;     /* marks stalled sampling PMCs */
  679         uint32_t        pm_caps;        /* PMC capabilities */
  680         enum pmc_event  pm_event;       /* event being measured */
  681         uint32_t        pm_flags;       /* additional flags PMC_F_... */
  682         struct pmc_owner *pm_owner;     /* owner thread state */
  683         int             pm_runcount;    /* #cpus currently on */
  684         enum pmc_state  pm_state;       /* current PMC state */
  685 
  686         /*
  687          * The PMC ID field encodes the row-index for the PMC, its
  688          * mode, class and the CPU# associated with the PMC.
  689          */
  690 
  691         pmc_id_t        pm_id;          /* allocated PMC id */
  692 
  693         /* md extensions */
  694         union pmc_md_pmc        pm_md;
  695 };
  696 
  697 /*
  698  * Accessor macros for 'struct pmc'
  699  */
  700 
  701 #define PMC_TO_MODE(P)          PMC_ID_TO_MODE((P)->pm_id)
  702 #define PMC_TO_CLASS(P)         PMC_ID_TO_CLASS((P)->pm_id)
  703 #define PMC_TO_ROWINDEX(P)      PMC_ID_TO_ROWINDEX((P)->pm_id)
  704 #define PMC_TO_CPU(P)           PMC_ID_TO_CPU((P)->pm_id)
  705 
  706 
  707 /*
  708  * struct pmc_process
  709  *
  710  * Record a 'target' process being profiled.
  711  *
  712  * The target process being profiled could be different from the owner
  713  * process which allocated the PMCs.  Each target process descriptor
  714  * is associated with NHWPMC 'struct pmc *' pointers.  Each PMC at a
  715  * given hardware row-index 'n' will use slot 'n' of the 'pp_pmcs[]'
  716  * array.  The size of this structure is thus PMC architecture
  717  * dependent.
  718  *
  719  */
  720 
  721 struct pmc_targetstate {
  722         struct pmc      *pp_pmc;   /* target PMC */
  723         pmc_value_t     pp_pmcval; /* per-process value */
  724 };
  725 
  726 struct pmc_process {
  727         LIST_ENTRY(pmc_process) pp_next;        /* hash chain */
  728         int             pp_refcnt;              /* reference count */
  729         uint32_t        pp_flags;               /* flags PMC_PP_* */
  730         struct proc     *pp_proc;               /* target thread */
  731         struct pmc_targetstate pp_pmcs[];       /* NHWPMCs */
  732 };
  733 
  734 #define PMC_PP_ENABLE_MSR_ACCESS        0x00000001
  735 
  736 /*
  737  * struct pmc_owner
  738  *
  739  * We associate a PMC with an 'owner' process.
  740  *
  741  * A process can be associated with 0..NCPUS*NHWPMC PMCs during its
  742  * lifetime, where NCPUS is the numbers of CPUS in the system and
  743  * NHWPMC is the number of hardware PMCs per CPU.  These are
  744  * maintained in the list headed by the 'po_pmcs' to save on space.
  745  *
  746  */
  747 
  748 struct pmc_owner  {
  749         LIST_ENTRY(pmc_owner)   po_next;        /* hash chain */
  750         LIST_ENTRY(pmc_owner)   po_ssnext;      /* list of SS PMC owners */
  751         LIST_HEAD(, pmc)        po_pmcs;        /* owned PMC list */
  752         TAILQ_HEAD(, pmclog_buffer) po_logbuffers; /* (o) logbuffer list */
  753         struct mtx              po_mtx;         /* spin lock for (o) */
  754         struct proc             *po_owner;      /* owner proc */
  755         uint32_t                po_flags;       /* (k) flags PMC_PO_* */
  756         struct proc             *po_kthread;    /* (k) helper kthread */
  757         struct pmclog_buffer    *po_curbuf;     /* current log buffer */
  758         struct file             *po_file;       /* file reference */
  759         int                     po_error;       /* recorded error */
  760         short                   po_sscount;     /* # SS PMCs owned */
  761         short                   po_logprocmaps; /* global mappings done */
  762 };
  763 
  764 #define PMC_PO_OWNS_LOGFILE             0x00000001 /* has a log file */
  765 #define PMC_PO_SHUTDOWN                 0x00000010 /* in the process of shutdown */
  766 #define PMC_PO_INITIAL_MAPPINGS_DONE    0x00000020
  767 
  768 /*
  769  * struct pmc_hw -- describe the state of the PMC hardware
  770  *
  771  * When in use, a HW PMC is associated with one allocated 'struct pmc'
  772  * pointed to by field 'phw_pmc'.  When inactive, this field is NULL.
  773  *
  774  * On an SMP box, one or more HW PMC's in process virtual mode with
  775  * the same 'phw_pmc' could be executing on different CPUs.  In order
  776  * to handle this case correctly, we need to ensure that only
  777  * incremental counts get added to the saved value in the associated
  778  * 'struct pmc'.  The 'phw_save' field is used to keep the saved PMC
  779  * value at the time the hardware is started during this context
  780  * switch (i.e., the difference between the new (hardware) count and
  781  * the saved count is atomically added to the count field in 'struct
  782  * pmc' at context switch time).
  783  *
  784  */
  785 
  786 struct pmc_hw {
  787         uint32_t        phw_state;      /* see PHW_* macros below */
  788         struct pmc      *phw_pmc;       /* current thread PMC */
  789 };
  790 
  791 #define PMC_PHW_RI_MASK         0x000000FF
  792 #define PMC_PHW_CPU_SHIFT       8
  793 #define PMC_PHW_CPU_MASK        0x0000FF00
  794 #define PMC_PHW_FLAGS_SHIFT     16
  795 #define PMC_PHW_FLAGS_MASK      0xFFFF0000
  796 
  797 #define PMC_PHW_INDEX_TO_STATE(ri)      ((ri) & PMC_PHW_RI_MASK)
  798 #define PMC_PHW_STATE_TO_INDEX(state)   ((state) & PMC_PHW_RI_MASK)
  799 #define PMC_PHW_CPU_TO_STATE(cpu)       (((cpu) << PMC_PHW_CPU_SHIFT) & \
  800         PMC_PHW_CPU_MASK)
  801 #define PMC_PHW_STATE_TO_CPU(state)     (((state) & PMC_PHW_CPU_MASK) >> \
  802         PMC_PHW_CPU_SHIFT)
  803 #define PMC_PHW_FLAGS_TO_STATE(flags)   (((flags) << PMC_PHW_FLAGS_SHIFT) & \
  804         PMC_PHW_FLAGS_MASK)
  805 #define PMC_PHW_STATE_TO_FLAGS(state)   (((state) & PMC_PHW_FLAGS_MASK) >> \
  806         PMC_PHW_FLAGS_SHIFT)
  807 #define PMC_PHW_FLAG_IS_ENABLED         (PMC_PHW_FLAGS_TO_STATE(0x01))
  808 #define PMC_PHW_FLAG_IS_SHAREABLE       (PMC_PHW_FLAGS_TO_STATE(0x02))
  809 
  810 /*
  811  * struct pmc_sample
  812  *
  813  * Space for N (tunable) PC samples and associated control data.
  814  */
  815 
  816 struct pmc_sample {
  817         uint16_t                ps_nsamples;    /* callchain depth */
  818         uint8_t                 ps_cpu;         /* cpu number */
  819         uint8_t                 ps_flags;       /* other flags */
  820         pid_t                   ps_pid;         /* process PID or -1 */
  821         struct thread           *ps_td;         /* which thread */
  822         struct pmc              *ps_pmc;        /* interrupting PMC */
  823         uintptr_t               *ps_pc;         /* (const) callchain start */
  824 };
  825 
  826 #define PMC_SAMPLE_FREE         ((uint16_t) 0)
  827 #define PMC_SAMPLE_INUSE        ((uint16_t) 0xFFFF)
  828 
  829 struct pmc_samplebuffer {
  830         struct pmc_sample * volatile ps_read;   /* read pointer */
  831         struct pmc_sample * volatile ps_write;  /* write pointer */
  832         uintptr_t               *ps_callchains; /* all saved call chains */
  833         struct pmc_sample       *ps_fence;      /* one beyond ps_samples[] */
  834         struct pmc_sample       ps_samples[];   /* array of sample entries */
  835 };
  836 
  837 
  838 /*
  839  * struct pmc_cpustate
  840  *
  841  * A CPU is modelled as a collection of HW PMCs with space for additional
  842  * flags.
  843  */
  844 
  845 struct pmc_cpu {
  846         uint32_t        pc_state;       /* physical cpu number + flags */
  847         struct pmc_samplebuffer *pc_sb; /* space for samples */
  848         struct pmc_hw   *pc_hwpmcs[];   /* 'npmc' pointers */
  849 };
  850 
  851 #define PMC_PCPU_CPU_MASK               0x000000FF
  852 #define PMC_PCPU_FLAGS_MASK             0xFFFFFF00
  853 #define PMC_PCPU_FLAGS_SHIFT            8
  854 #define PMC_PCPU_STATE_TO_CPU(S)        ((S) & PMC_PCPU_CPU_MASK)
  855 #define PMC_PCPU_STATE_TO_FLAGS(S)      (((S) & PMC_PCPU_FLAGS_MASK) >> PMC_PCPU_FLAGS_SHIFT)
  856 #define PMC_PCPU_FLAGS_TO_STATE(F)      (((F) << PMC_PCPU_FLAGS_SHIFT) & PMC_PCPU_FLAGS_MASK)
  857 #define PMC_PCPU_CPU_TO_STATE(C)        ((C) & PMC_PCPU_CPU_MASK)
  858 #define PMC_PCPU_FLAG_HTT               (PMC_PCPU_FLAGS_TO_STATE(0x1))
  859 
  860 /*
  861  * struct pmc_binding
  862  *
  863  * CPU binding information.
  864  */
  865 
  866 struct pmc_binding {
  867         int     pb_bound;       /* is bound? */
  868         int     pb_cpu;         /* if so, to which CPU */
  869 };
  870 
  871 
  872 struct pmc_mdep;
  873 
  874 /*
  875  * struct pmc_classdep
  876  *
  877  * PMC class-dependent operations.
  878  */
  879 struct pmc_classdep {
  880         uint32_t        pcd_caps;       /* class capabilities */
  881         enum pmc_class  pcd_class;      /* class id */
  882         int             pcd_num;        /* number of PMCs */
  883         int             pcd_ri;         /* row index of the first PMC in class */
  884         int             pcd_width;      /* width of the PMC */
  885 
  886         /* configuring/reading/writing the hardware PMCs */
  887         int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm);
  888         int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm);
  889         int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value);
  890         int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value);
  891 
  892         /* pmc allocation/release */
  893         int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t,
  894                 const struct pmc_op_pmcallocate *_a);
  895         int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm);
  896 
  897         /* starting and stopping PMCs */
  898         int (*pcd_start_pmc)(int _cpu, int _ri);
  899         int (*pcd_stop_pmc)(int _cpu, int _ri);
  900 
  901         /* description */
  902         int (*pcd_describe)(int _cpu, int _ri, struct pmc_info *_pi,
  903                 struct pmc **_ppmc);
  904 
  905         /* class-dependent initialization & finalization */
  906         int (*pcd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
  907         int (*pcd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
  908 
  909         /* machine-specific interface */
  910         int (*pcd_get_msr)(int _ri, uint32_t *_msr);
  911 };
  912 
  913 /*
  914  * struct pmc_mdep
  915  *
  916  * Machine dependent bits needed per CPU type.
  917  */
  918 
  919 struct pmc_mdep  {
  920         uint32_t        pmd_cputype;    /* from enum pmc_cputype */
  921         uint32_t        pmd_npmc;       /* number of PMCs per CPU */
  922         uint32_t        pmd_nclass;     /* number of PMC classes present */
  923 
  924         /*
  925          * Machine dependent methods.
  926          */
  927 
  928         /* per-cpu initialization and finalization */
  929         int (*pmd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
  930         int (*pmd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
  931 
  932         /* thread context switch in/out */
  933         int (*pmd_switch_in)(struct pmc_cpu *_p, struct pmc_process *_pp);
  934         int (*pmd_switch_out)(struct pmc_cpu *_p, struct pmc_process *_pp);
  935 
  936         /* handle a PMC interrupt */
  937         int (*pmd_intr)(int _cpu, struct trapframe *_tf);
  938 
  939         /*
  940          * PMC class dependent information.
  941          */
  942         struct pmc_classdep pmd_classdep[];
  943 };
  944 
  945 /*
  946  * Per-CPU state.  This is an array of 'mp_ncpu' pointers
  947  * to struct pmc_cpu descriptors.
  948  */
  949 
  950 extern struct pmc_cpu **pmc_pcpu;
  951 
  952 /* driver statistics */
  953 extern struct pmc_op_getdriverstats pmc_stats;
  954 
  955 #if     defined(DEBUG) && DEBUG
  956 
  957 /* debug flags, major flag groups */
  958 struct pmc_debugflags {
  959         int     pdb_CPU;
  960         int     pdb_CSW;
  961         int     pdb_LOG;
  962         int     pdb_MDP;
  963         int     pdb_MOD;
  964         int     pdb_OWN;
  965         int     pdb_PMC;
  966         int     pdb_PRC;
  967         int     pdb_SAM;
  968 };
  969 
  970 extern struct pmc_debugflags pmc_debugflags;
  971 
  972 #define PMC_DEBUG_STRSIZE               128
  973 #define PMC_DEBUG_DEFAULT_FLAGS         { 0, 0, 0, 0, 0, 0, 0, 0 }
  974 
  975 #define PMCDBG(M,N,L,F,...) do {                                        \
  976         if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N))      \
  977                 printf(#M ":" #N ":" #L  ": " F "\n", __VA_ARGS__);     \
  978 } while (0)
  979 
  980 /* Major numbers */
  981 #define PMC_DEBUG_MAJ_CPU               0 /* cpu switches */
  982 #define PMC_DEBUG_MAJ_CSW               1 /* context switches */
  983 #define PMC_DEBUG_MAJ_LOG               2 /* logging */
  984 #define PMC_DEBUG_MAJ_MDP               3 /* machine dependent */
  985 #define PMC_DEBUG_MAJ_MOD               4 /* misc module infrastructure */
  986 #define PMC_DEBUG_MAJ_OWN               5 /* owner */
  987 #define PMC_DEBUG_MAJ_PMC               6 /* pmc management */
  988 #define PMC_DEBUG_MAJ_PRC               7 /* processes */
  989 #define PMC_DEBUG_MAJ_SAM               8 /* sampling */
  990 
  991 /* Minor numbers */
  992 
  993 /* Common (8 bits) */
  994 #define PMC_DEBUG_MIN_ALL               0 /* allocation */
  995 #define PMC_DEBUG_MIN_REL               1 /* release */
  996 #define PMC_DEBUG_MIN_OPS               2 /* ops: start, stop, ... */
  997 #define PMC_DEBUG_MIN_INI               3 /* init */
  998 #define PMC_DEBUG_MIN_FND               4 /* find */
  999 
 1000 /* MODULE */
 1001 #define PMC_DEBUG_MIN_PMH              14 /* pmc_hook */
 1002 #define PMC_DEBUG_MIN_PMS              15 /* pmc_syscall */
 1003 
 1004 /* OWN */
 1005 #define PMC_DEBUG_MIN_ORM               8 /* owner remove */
 1006 #define PMC_DEBUG_MIN_OMR               9 /* owner maybe remove */
 1007 
 1008 /* PROCESSES */
 1009 #define PMC_DEBUG_MIN_TLK               8 /* link target */
 1010 #define PMC_DEBUG_MIN_TUL               9 /* unlink target */
 1011 #define PMC_DEBUG_MIN_EXT              10 /* process exit */
 1012 #define PMC_DEBUG_MIN_EXC              11 /* process exec */
 1013 #define PMC_DEBUG_MIN_FRK              12 /* process fork */
 1014 #define PMC_DEBUG_MIN_ATT              13 /* attach/detach */
 1015 #define PMC_DEBUG_MIN_SIG              14 /* signalling */
 1016 
 1017 /* CONTEXT SWITCHES */
 1018 #define PMC_DEBUG_MIN_SWI               8 /* switch in */
 1019 #define PMC_DEBUG_MIN_SWO               9 /* switch out */
 1020 
 1021 /* PMC */
 1022 #define PMC_DEBUG_MIN_REG               8 /* pmc register */
 1023 #define PMC_DEBUG_MIN_ALR               9 /* allocate row */
 1024 
 1025 /* MACHINE DEPENDENT LAYER */
 1026 #define PMC_DEBUG_MIN_REA               8 /* read */
 1027 #define PMC_DEBUG_MIN_WRI               9 /* write */
 1028 #define PMC_DEBUG_MIN_CFG              10 /* config */
 1029 #define PMC_DEBUG_MIN_STA              11 /* start */
 1030 #define PMC_DEBUG_MIN_STO              12 /* stop */
 1031 #define PMC_DEBUG_MIN_INT              13 /* interrupts */
 1032 
 1033 /* CPU */
 1034 #define PMC_DEBUG_MIN_BND               8 /* bind */
 1035 #define PMC_DEBUG_MIN_SEL               9 /* select */
 1036 
 1037 /* LOG */
 1038 #define PMC_DEBUG_MIN_GTB               8 /* get buf */
 1039 #define PMC_DEBUG_MIN_SIO               9 /* schedule i/o */
 1040 #define PMC_DEBUG_MIN_FLS              10 /* flush */
 1041 #define PMC_DEBUG_MIN_SAM              11 /* sample */
 1042 
 1043 #else
 1044 #define PMCDBG(M,N,L,F,...)             /* nothing */
 1045 #endif
 1046 
 1047 /* declare a dedicated memory pool */
 1048 MALLOC_DECLARE(M_PMC);
 1049 
 1050 /*
 1051  * Functions
 1052  */
 1053 
 1054 struct pmc_mdep *pmc_md_initialize(void);       /* MD init function */
 1055 void    pmc_md_finalize(struct pmc_mdep *_md);  /* MD fini function */
 1056 int     pmc_getrowdisp(int _ri);
 1057 int     pmc_process_interrupt(int _cpu, struct pmc *_pm,
 1058     struct trapframe *_tf, int _inuserspace);
 1059 int     pmc_save_kernel_callchain(uintptr_t *_cc, int _maxsamples,
 1060     struct trapframe *_tf);
 1061 int     pmc_save_user_callchain(uintptr_t *_cc, int _maxsamples,
 1062     struct trapframe *_tf);
 1063 #endif /* _KERNEL */
 1064 #endif /* _SYS_PMC_H_ */

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