The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/x86/include/x86_var.h

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    1 /*-
    2  * Copyright (c) 1995 Bruce D. Evans.
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  * 3. Neither the name of the author nor the names of contributors
   14  *    may be used to endorse or promote products derived from this software
   15  *    without specific prior written permission.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  *
   29  * $FreeBSD$
   30  */
   31 
   32 #ifndef _X86_X86_VAR_H_
   33 #define _X86_X86_VAR_H_
   34 
   35 /*
   36  * Miscellaneous machine-dependent declarations.
   37  */
   38 
   39 extern  long    Maxmem;
   40 extern  u_int   basemem;
   41 extern  u_int   cpu_exthigh;
   42 extern  u_int   cpu_feature;
   43 extern  u_int   cpu_feature2;
   44 extern  u_int   amd_feature;
   45 extern  u_int   amd_feature2;
   46 extern  u_int   amd_rascap;
   47 extern  u_int   amd_pminfo;
   48 extern  u_int   amd_extended_feature_extensions;
   49 extern  u_int   via_feature_rng;
   50 extern  u_int   via_feature_xcrypt;
   51 extern  u_int   cpu_clflush_line_size;
   52 extern  u_int   cpu_stdext_feature;
   53 extern  u_int   cpu_stdext_feature2;
   54 extern  u_int   cpu_stdext_feature3;
   55 extern  uint64_t cpu_ia32_arch_caps;
   56 extern  u_int   cpu_fxsr;
   57 extern  u_int   cpu_high;
   58 extern  u_int   cpu_id;
   59 extern  u_int   cpu_max_ext_state_size;
   60 extern  u_int   cpu_mxcsr_mask;
   61 extern  u_int   cpu_procinfo;
   62 extern  u_int   cpu_procinfo2;
   63 extern  char    cpu_vendor[];
   64 extern  u_int   cpu_vendor_id;
   65 extern  u_int   cpu_mon_mwait_flags;
   66 extern  u_int   cpu_mon_min_size;
   67 extern  u_int   cpu_mon_max_size;
   68 extern  u_int   cpu_maxphyaddr;
   69 extern  u_int   cpu_power_eax;
   70 extern  u_int   cpu_power_ebx;
   71 extern  u_int   cpu_power_ecx;
   72 extern  u_int   cpu_power_edx;
   73 extern  u_int   hv_base;
   74 extern  u_int   hv_high;
   75 extern  char    hv_vendor[];
   76 extern  char    kstack[];
   77 extern  char    sigcode[];
   78 extern  int     szsigcode;
   79 extern  int     workaround_erratum383;
   80 extern  int     _udatasel;
   81 extern  int     _ucodesel;
   82 extern  int     _ucode32sel;
   83 extern  int     _ufssel;
   84 extern  int     _ugssel;
   85 extern  int     use_xsave;
   86 extern  uint64_t xsave_mask;
   87 extern  u_int   max_apic_id;
   88 extern  int     i386_read_exec;
   89 extern  int     pti;
   90 extern  int     hw_ibrs_ibpb_active;
   91 extern  int     hw_mds_disable;
   92 extern  int     hw_ssb_active;
   93 extern  int     x86_taa_enable;
   94 extern  int     cpu_flush_rsb_ctxsw;
   95 extern  int     x86_rngds_mitg_enable;
   96 extern  int     cpu_amdc1e_bug;
   97 extern  char    bootmethod[16];
   98 
   99 struct  pcb;
  100 struct  thread;
  101 struct  reg;
  102 struct  fpreg;
  103 struct  dbreg;
  104 struct  dumperinfo;
  105 struct  trapframe;
  106 struct  minidumpstate;
  107 
  108 /*
  109  * The interface type of the interrupt handler entry point cannot be
  110  * expressed in C.  Use simplest non-variadic function type as an
  111  * approximation.
  112  */
  113 typedef void alias_for_inthand_t(void);
  114 
  115 bool    acpi_get_fadt_bootflags(uint16_t *flagsp);
  116 void    *alloc_fpusave(int flags);
  117 u_int   cpu_auxmsr(void);
  118 vm_paddr_t cpu_getmaxphyaddr(void);
  119 bool    cpu_mwait_usable(void);
  120 void    cpu_probe_amdc1e(void);
  121 void    cpu_setregs(void);
  122 int     dbreg_set_watchpoint(vm_offset_t addr, vm_size_t size, int access);
  123 int     dbreg_clr_watchpoint(vm_offset_t addr, vm_size_t size);
  124 void    dbreg_list_watchpoints(void);
  125 void    x86_clear_dbregs(struct pcb *pcb);
  126 bool    disable_wp(void);
  127 void    restore_wp(bool old_wp);
  128 void    finishidentcpu(void);
  129 void    identify_cpu1(void);
  130 void    identify_cpu2(void);
  131 void    identify_cpu_ext_features(void);
  132 void    identify_cpu_fixup_bsp(void);
  133 void    identify_hypervisor(void);
  134 void    initializecpu(void);
  135 void    initializecpucache(void);
  136 bool    fix_cpuid(void);
  137 void    fillw(int /*u_short*/ pat, void *base, size_t cnt);
  138 int     isa_nmi(int cd);
  139 void    handle_ibrs_entry(void);
  140 void    handle_ibrs_exit(void);
  141 void    hw_ibrs_recalculate(bool all_cpus);
  142 void    hw_mds_recalculate(void);
  143 void    hw_ssb_recalculate(bool all_cpus);
  144 void    x86_taa_recalculate(void);
  145 void    x86_rngds_mitg_recalculate(bool all_cpus);
  146 void    nmi_call_kdb(u_int cpu, u_int type, struct trapframe *frame);
  147 void    nmi_call_kdb_smp(u_int type, struct trapframe *frame);
  148 void    nmi_handle_intr(u_int type, struct trapframe *frame);
  149 void    pagecopy(void *from, void *to);
  150 void    printcpuinfo(void);
  151 int     pti_get_default(void);
  152 int     user_dbreg_trap(register_t dr6);
  153 int     cpu_minidumpsys(struct dumperinfo *, const struct minidumpstate *);
  154 struct pcb *get_pcb_td(struct thread *td);
  155 void    x86_set_fork_retval(struct thread *td);
  156 uint64_t rdtsc_ordered(void);
  157 
  158 /*
  159  * MSR ops for x86_msr_op()
  160  */
  161 #define MSR_OP_ANDNOT           0x00000001
  162 #define MSR_OP_OR               0x00000002
  163 #define MSR_OP_WRITE            0x00000003
  164 #define MSR_OP_READ             0x00000004
  165 
  166 /*
  167  * Where and which execution mode
  168  */
  169 #define MSR_OP_LOCAL            0x10000000
  170 #define MSR_OP_SCHED_ALL        0x20000000
  171 #define MSR_OP_SCHED_ONE        0x30000000
  172 #define MSR_OP_RENDEZVOUS_ALL   0x40000000
  173 #define MSR_OP_RENDEZVOUS_ONE   0x50000000
  174 #define MSR_OP_CPUID(id)        ((id) << 8)
  175 
  176 void x86_msr_op(u_int msr, u_int op, uint64_t arg1, uint64_t *res);
  177 
  178 #if defined(__i386__) && defined(INVARIANTS)
  179 void    trap_check_kstack(void);
  180 #else
  181 #define trap_check_kstack()
  182 #endif
  183 
  184 #endif

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