The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/x86/iommu/intel_drv.c

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    1 /*-
    2  * Copyright (c) 2013-2015 The FreeBSD Foundation
    3  * All rights reserved.
    4  *
    5  * This software was developed by Konstantin Belousov <kib@FreeBSD.org>
    6  * under sponsorship from the FreeBSD Foundation.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  */
   29 
   30 #include <sys/cdefs.h>
   31 __FBSDID("$FreeBSD: releng/11.1/sys/x86/iommu/intel_drv.c 316449 2017-04-03 09:41:43Z kib $");
   32 
   33 #include "opt_acpi.h"
   34 #if defined(__amd64__)
   35 #define DEV_APIC
   36 #else
   37 #include "opt_apic.h"
   38 #endif
   39 #include "opt_ddb.h"
   40 
   41 #include <sys/param.h>
   42 #include <sys/bus.h>
   43 #include <sys/kernel.h>
   44 #include <sys/lock.h>
   45 #include <sys/malloc.h>
   46 #include <sys/memdesc.h>
   47 #include <sys/module.h>
   48 #include <sys/rman.h>
   49 #include <sys/rwlock.h>
   50 #include <sys/smp.h>
   51 #include <sys/taskqueue.h>
   52 #include <sys/tree.h>
   53 #include <sys/vmem.h>
   54 #include <machine/bus.h>
   55 #include <contrib/dev/acpica/include/acpi.h>
   56 #include <contrib/dev/acpica/include/accommon.h>
   57 #include <dev/acpica/acpivar.h>
   58 #include <vm/vm.h>
   59 #include <vm/vm_extern.h>
   60 #include <vm/vm_kern.h>
   61 #include <vm/vm_object.h>
   62 #include <vm/vm_page.h>
   63 #include <vm/vm_pager.h>
   64 #include <vm/vm_map.h>
   65 #include <x86/include/busdma_impl.h>
   66 #include <x86/iommu/intel_reg.h>
   67 #include <x86/iommu/busdma_dmar.h>
   68 #include <x86/iommu/intel_dmar.h>
   69 #include <dev/pci/pcireg.h>
   70 #include <dev/pci/pcivar.h>
   71 
   72 #ifdef DEV_APIC
   73 #include "pcib_if.h"
   74 #endif
   75 
   76 #define DMAR_FAULT_IRQ_RID      0
   77 #define DMAR_QI_IRQ_RID         1
   78 #define DMAR_REG_RID            2
   79 
   80 static devclass_t dmar_devclass;
   81 static device_t *dmar_devs;
   82 static int dmar_devcnt;
   83 
   84 typedef int (*dmar_iter_t)(ACPI_DMAR_HEADER *, void *);
   85 
   86 static void
   87 dmar_iterate_tbl(dmar_iter_t iter, void *arg)
   88 {
   89         ACPI_TABLE_DMAR *dmartbl;
   90         ACPI_DMAR_HEADER *dmarh;
   91         char *ptr, *ptrend;
   92         ACPI_STATUS status;
   93 
   94         status = AcpiGetTable(ACPI_SIG_DMAR, 1, (ACPI_TABLE_HEADER **)&dmartbl);
   95         if (ACPI_FAILURE(status))
   96                 return;
   97         ptr = (char *)dmartbl + sizeof(*dmartbl);
   98         ptrend = (char *)dmartbl + dmartbl->Header.Length;
   99         for (;;) {
  100                 if (ptr >= ptrend)
  101                         break;
  102                 dmarh = (ACPI_DMAR_HEADER *)ptr;
  103                 if (dmarh->Length <= 0) {
  104                         printf("dmar_identify: corrupted DMAR table, l %d\n",
  105                             dmarh->Length);
  106                         break;
  107                 }
  108                 ptr += dmarh->Length;
  109                 if (!iter(dmarh, arg))
  110                         break;
  111         }
  112         AcpiPutTable((ACPI_TABLE_HEADER *)dmartbl);
  113 }
  114 
  115 struct find_iter_args {
  116         int i;
  117         ACPI_DMAR_HARDWARE_UNIT *res;
  118 };
  119 
  120 static int
  121 dmar_find_iter(ACPI_DMAR_HEADER *dmarh, void *arg)
  122 {
  123         struct find_iter_args *fia;
  124 
  125         if (dmarh->Type != ACPI_DMAR_TYPE_HARDWARE_UNIT)
  126                 return (1);
  127 
  128         fia = arg;
  129         if (fia->i == 0) {
  130                 fia->res = (ACPI_DMAR_HARDWARE_UNIT *)dmarh;
  131                 return (0);
  132         }
  133         fia->i--;
  134         return (1);
  135 }
  136 
  137 static ACPI_DMAR_HARDWARE_UNIT *
  138 dmar_find_by_index(int idx)
  139 {
  140         struct find_iter_args fia;
  141 
  142         fia.i = idx;
  143         fia.res = NULL;
  144         dmar_iterate_tbl(dmar_find_iter, &fia);
  145         return (fia.res);
  146 }
  147 
  148 static int
  149 dmar_count_iter(ACPI_DMAR_HEADER *dmarh, void *arg)
  150 {
  151 
  152         if (dmarh->Type == ACPI_DMAR_TYPE_HARDWARE_UNIT)
  153                 dmar_devcnt++;
  154         return (1);
  155 }
  156 
  157 static int dmar_enable = 0;
  158 static void
  159 dmar_identify(driver_t *driver, device_t parent)
  160 {
  161         ACPI_TABLE_DMAR *dmartbl;
  162         ACPI_DMAR_HARDWARE_UNIT *dmarh;
  163         ACPI_STATUS status;
  164         int i, error;
  165 
  166         if (acpi_disabled("dmar"))
  167                 return;
  168         TUNABLE_INT_FETCH("hw.dmar.enable", &dmar_enable);
  169         if (!dmar_enable)
  170                 return;
  171 #ifdef INVARIANTS
  172         TUNABLE_INT_FETCH("hw.dmar.check_free", &dmar_check_free);
  173 #endif
  174         TUNABLE_INT_FETCH("hw.dmar.match_verbose", &dmar_match_verbose);
  175         status = AcpiGetTable(ACPI_SIG_DMAR, 1, (ACPI_TABLE_HEADER **)&dmartbl);
  176         if (ACPI_FAILURE(status))
  177                 return;
  178         haw = dmartbl->Width + 1;
  179         if ((1ULL << (haw + 1)) > BUS_SPACE_MAXADDR)
  180                 dmar_high = BUS_SPACE_MAXADDR;
  181         else
  182                 dmar_high = 1ULL << (haw + 1);
  183         if (bootverbose) {
  184                 printf("DMAR HAW=%d flags=<%b>\n", dmartbl->Width,
  185                     (unsigned)dmartbl->Flags,
  186                     "\020\001INTR_REMAP\002X2APIC_OPT_OUT");
  187         }
  188         AcpiPutTable((ACPI_TABLE_HEADER *)dmartbl);
  189 
  190         dmar_iterate_tbl(dmar_count_iter, NULL);
  191         if (dmar_devcnt == 0)
  192                 return;
  193         dmar_devs = malloc(sizeof(device_t) * dmar_devcnt, M_DEVBUF,
  194             M_WAITOK | M_ZERO);
  195         for (i = 0; i < dmar_devcnt; i++) {
  196                 dmarh = dmar_find_by_index(i);
  197                 if (dmarh == NULL) {
  198                         printf("dmar_identify: cannot find HWUNIT %d\n", i);
  199                         continue;
  200                 }
  201                 dmar_devs[i] = BUS_ADD_CHILD(parent, 1, "dmar", i);
  202                 if (dmar_devs[i] == NULL) {
  203                         printf("dmar_identify: cannot create instance %d\n", i);
  204                         continue;
  205                 }
  206                 error = bus_set_resource(dmar_devs[i], SYS_RES_MEMORY,
  207                     DMAR_REG_RID, dmarh->Address, PAGE_SIZE);
  208                 if (error != 0) {
  209                         printf(
  210         "dmar%d: unable to alloc register window at 0x%08jx: error %d\n",
  211                             i, (uintmax_t)dmarh->Address, error);
  212                         device_delete_child(parent, dmar_devs[i]);
  213                         dmar_devs[i] = NULL;
  214                 }
  215         }
  216 }
  217 
  218 static int
  219 dmar_probe(device_t dev)
  220 {
  221 
  222         if (acpi_get_handle(dev) != NULL)
  223                 return (ENXIO);
  224         device_set_desc(dev, "DMA remap");
  225         return (BUS_PROBE_NOWILDCARD);
  226 }
  227 
  228 static void
  229 dmar_release_intr(device_t dev, struct dmar_unit *unit, int idx)
  230 {
  231         struct dmar_msi_data *dmd;
  232 
  233         dmd = &unit->intrs[idx];
  234         if (dmd->irq == -1)
  235                 return;
  236         bus_teardown_intr(dev, dmd->irq_res, dmd->intr_handle);
  237         bus_release_resource(dev, SYS_RES_IRQ, dmd->irq_rid, dmd->irq_res);
  238         bus_delete_resource(dev, SYS_RES_IRQ, dmd->irq_rid);
  239         PCIB_RELEASE_MSIX(device_get_parent(device_get_parent(dev)),
  240             dev, dmd->irq);
  241         dmd->irq = -1;
  242 }
  243 
  244 static void
  245 dmar_release_resources(device_t dev, struct dmar_unit *unit)
  246 {
  247         int i;
  248 
  249         dmar_fini_busdma(unit);
  250         dmar_fini_irt(unit);
  251         dmar_fini_qi(unit);
  252         dmar_fini_fault_log(unit);
  253         for (i = 0; i < DMAR_INTR_TOTAL; i++)
  254                 dmar_release_intr(dev, unit, i);
  255         if (unit->regs != NULL) {
  256                 bus_deactivate_resource(dev, SYS_RES_MEMORY, unit->reg_rid,
  257                     unit->regs);
  258                 bus_release_resource(dev, SYS_RES_MEMORY, unit->reg_rid,
  259                     unit->regs);
  260                 unit->regs = NULL;
  261         }
  262         if (unit->domids != NULL) {
  263                 delete_unrhdr(unit->domids);
  264                 unit->domids = NULL;
  265         }
  266         if (unit->ctx_obj != NULL) {
  267                 vm_object_deallocate(unit->ctx_obj);
  268                 unit->ctx_obj = NULL;
  269         }
  270 }
  271 
  272 static int
  273 dmar_alloc_irq(device_t dev, struct dmar_unit *unit, int idx)
  274 {
  275         device_t pcib;
  276         struct dmar_msi_data *dmd;
  277         uint64_t msi_addr;
  278         uint32_t msi_data;
  279         int error;
  280 
  281         dmd = &unit->intrs[idx];
  282         pcib = device_get_parent(device_get_parent(dev)); /* Really not pcib */
  283         error = PCIB_ALLOC_MSIX(pcib, dev, &dmd->irq);
  284         if (error != 0) {
  285                 device_printf(dev, "cannot allocate %s interrupt, %d\n",
  286                     dmd->name, error);
  287                 goto err1;
  288         }
  289         error = bus_set_resource(dev, SYS_RES_IRQ, dmd->irq_rid,
  290             dmd->irq, 1);
  291         if (error != 0) {
  292                 device_printf(dev, "cannot set %s interrupt resource, %d\n",
  293                     dmd->name, error);
  294                 goto err2;
  295         }
  296         dmd->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
  297             &dmd->irq_rid, RF_ACTIVE);
  298         if (dmd->irq_res == NULL) {
  299                 device_printf(dev,
  300                     "cannot allocate resource for %s interrupt\n", dmd->name);
  301                 error = ENXIO;
  302                 goto err3;
  303         }
  304         error = bus_setup_intr(dev, dmd->irq_res, INTR_TYPE_MISC,
  305             dmd->handler, NULL, unit, &dmd->intr_handle);
  306         if (error != 0) {
  307                 device_printf(dev, "cannot setup %s interrupt, %d\n",
  308                     dmd->name, error);
  309                 goto err4;
  310         }
  311         bus_describe_intr(dev, dmd->irq_res, dmd->intr_handle, "%s", dmd->name);
  312         error = PCIB_MAP_MSI(pcib, dev, dmd->irq, &msi_addr, &msi_data);
  313         if (error != 0) {
  314                 device_printf(dev, "cannot map %s interrupt, %d\n",
  315                     dmd->name, error);
  316                 goto err5;
  317         }
  318         dmar_write4(unit, dmd->msi_data_reg, msi_data);
  319         dmar_write4(unit, dmd->msi_addr_reg, msi_addr);
  320         /* Only for xAPIC mode */
  321         dmar_write4(unit, dmd->msi_uaddr_reg, msi_addr >> 32);
  322         return (0);
  323 
  324 err5:
  325         bus_teardown_intr(dev, dmd->irq_res, dmd->intr_handle);
  326 err4:
  327         bus_release_resource(dev, SYS_RES_IRQ, dmd->irq_rid, dmd->irq_res);
  328 err3:
  329         bus_delete_resource(dev, SYS_RES_IRQ, dmd->irq_rid);
  330 err2:
  331         PCIB_RELEASE_MSIX(pcib, dev, dmd->irq);
  332         dmd->irq = -1;
  333 err1:
  334         return (error);
  335 }
  336 
  337 #ifdef DEV_APIC
  338 static int
  339 dmar_remap_intr(device_t dev, device_t child, u_int irq)
  340 {
  341         struct dmar_unit *unit;
  342         struct dmar_msi_data *dmd;
  343         uint64_t msi_addr;
  344         uint32_t msi_data;
  345         int i, error;
  346 
  347         unit = device_get_softc(dev);
  348         for (i = 0; i < DMAR_INTR_TOTAL; i++) {
  349                 dmd = &unit->intrs[i];
  350                 if (irq == dmd->irq) {
  351                         error = PCIB_MAP_MSI(device_get_parent(
  352                             device_get_parent(dev)),
  353                             dev, irq, &msi_addr, &msi_data);
  354                         if (error != 0)
  355                                 return (error);
  356                         DMAR_LOCK(unit);
  357                         (dmd->disable_intr)(unit);
  358                         dmar_write4(unit, dmd->msi_data_reg, msi_data);
  359                         dmar_write4(unit, dmd->msi_addr_reg, msi_addr);
  360                         dmar_write4(unit, dmd->msi_uaddr_reg, msi_addr >> 32);
  361                         (dmd->enable_intr)(unit);
  362                         DMAR_UNLOCK(unit);
  363                         return (0);
  364                 }
  365         }
  366         return (ENOENT);
  367 }
  368 #endif
  369 
  370 static void
  371 dmar_print_caps(device_t dev, struct dmar_unit *unit,
  372     ACPI_DMAR_HARDWARE_UNIT *dmaru)
  373 {
  374         uint32_t caphi, ecaphi;
  375 
  376         device_printf(dev, "regs@0x%08jx, ver=%d.%d, seg=%d, flags=<%b>\n",
  377             (uintmax_t)dmaru->Address, DMAR_MAJOR_VER(unit->hw_ver),
  378             DMAR_MINOR_VER(unit->hw_ver), dmaru->Segment,
  379             dmaru->Flags, "\020\001INCLUDE_ALL_PCI");
  380         caphi = unit->hw_cap >> 32;
  381         device_printf(dev, "cap=%b,", (u_int)unit->hw_cap,
  382             "\020\004AFL\005WBF\006PLMR\007PHMR\010CM\027ZLR\030ISOCH");
  383         printf("%b, ", caphi, "\020\010PSI\027DWD\030DRD\031FL1GP\034PSI");
  384         printf("ndoms=%d, sagaw=%d, mgaw=%d, fro=%d, nfr=%d, superp=%d",
  385             DMAR_CAP_ND(unit->hw_cap), DMAR_CAP_SAGAW(unit->hw_cap),
  386             DMAR_CAP_MGAW(unit->hw_cap), DMAR_CAP_FRO(unit->hw_cap),
  387             DMAR_CAP_NFR(unit->hw_cap), DMAR_CAP_SPS(unit->hw_cap));
  388         if ((unit->hw_cap & DMAR_CAP_PSI) != 0)
  389                 printf(", mamv=%d", DMAR_CAP_MAMV(unit->hw_cap));
  390         printf("\n");
  391         ecaphi = unit->hw_ecap >> 32;
  392         device_printf(dev, "ecap=%b,", (u_int)unit->hw_ecap,
  393             "\020\001C\002QI\003DI\004IR\005EIM\007PT\010SC\031ECS\032MTS"
  394             "\033NEST\034DIS\035PASID\036PRS\037ERS\040SRS");
  395         printf("%b, ", ecaphi, "\020\002NWFS\003EAFS");
  396         printf("mhmw=%d, iro=%d\n", DMAR_ECAP_MHMV(unit->hw_ecap),
  397             DMAR_ECAP_IRO(unit->hw_ecap));
  398 }
  399 
  400 static int
  401 dmar_attach(device_t dev)
  402 {
  403         struct dmar_unit *unit;
  404         ACPI_DMAR_HARDWARE_UNIT *dmaru;
  405         uint64_t timeout;
  406         int i, error;
  407 
  408         unit = device_get_softc(dev);
  409         unit->dev = dev;
  410         unit->unit = device_get_unit(dev);
  411         dmaru = dmar_find_by_index(unit->unit);
  412         if (dmaru == NULL)
  413                 return (EINVAL);
  414         unit->segment = dmaru->Segment;
  415         unit->base = dmaru->Address;
  416         unit->reg_rid = DMAR_REG_RID;
  417         unit->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
  418             &unit->reg_rid, RF_ACTIVE);
  419         if (unit->regs == NULL) {
  420                 device_printf(dev, "cannot allocate register window\n");
  421                 return (ENOMEM);
  422         }
  423         unit->hw_ver = dmar_read4(unit, DMAR_VER_REG);
  424         unit->hw_cap = dmar_read8(unit, DMAR_CAP_REG);
  425         unit->hw_ecap = dmar_read8(unit, DMAR_ECAP_REG);
  426         if (bootverbose)
  427                 dmar_print_caps(dev, unit, dmaru);
  428         dmar_quirks_post_ident(unit);
  429 
  430         timeout = dmar_get_timeout();
  431         TUNABLE_UINT64_FETCH("hw.dmar.timeout", &timeout);
  432         dmar_update_timeout(timeout);
  433 
  434         for (i = 0; i < DMAR_INTR_TOTAL; i++)
  435                 unit->intrs[i].irq = -1;
  436 
  437         unit->intrs[DMAR_INTR_FAULT].name = "fault";
  438         unit->intrs[DMAR_INTR_FAULT].irq_rid = DMAR_FAULT_IRQ_RID;
  439         unit->intrs[DMAR_INTR_FAULT].handler = dmar_fault_intr;
  440         unit->intrs[DMAR_INTR_FAULT].msi_data_reg = DMAR_FEDATA_REG;
  441         unit->intrs[DMAR_INTR_FAULT].msi_addr_reg = DMAR_FEADDR_REG;
  442         unit->intrs[DMAR_INTR_FAULT].msi_uaddr_reg = DMAR_FEUADDR_REG;
  443         unit->intrs[DMAR_INTR_FAULT].enable_intr = dmar_enable_fault_intr;
  444         unit->intrs[DMAR_INTR_FAULT].disable_intr = dmar_disable_fault_intr;
  445         error = dmar_alloc_irq(dev, unit, DMAR_INTR_FAULT);
  446         if (error != 0) {
  447                 dmar_release_resources(dev, unit);
  448                 return (error);
  449         }
  450         if (DMAR_HAS_QI(unit)) {
  451                 unit->intrs[DMAR_INTR_QI].name = "qi";
  452                 unit->intrs[DMAR_INTR_QI].irq_rid = DMAR_QI_IRQ_RID;
  453                 unit->intrs[DMAR_INTR_QI].handler = dmar_qi_intr;
  454                 unit->intrs[DMAR_INTR_QI].msi_data_reg = DMAR_IEDATA_REG;
  455                 unit->intrs[DMAR_INTR_QI].msi_addr_reg = DMAR_IEADDR_REG;
  456                 unit->intrs[DMAR_INTR_QI].msi_uaddr_reg = DMAR_IEUADDR_REG;
  457                 unit->intrs[DMAR_INTR_QI].enable_intr = dmar_enable_qi_intr;
  458                 unit->intrs[DMAR_INTR_QI].disable_intr = dmar_disable_qi_intr;
  459                 error = dmar_alloc_irq(dev, unit, DMAR_INTR_QI);
  460                 if (error != 0) {
  461                         dmar_release_resources(dev, unit);
  462                         return (error);
  463                 }
  464         }
  465 
  466         mtx_init(&unit->lock, "dmarhw", NULL, MTX_DEF);
  467         unit->domids = new_unrhdr(0, dmar_nd2mask(DMAR_CAP_ND(unit->hw_cap)),
  468             &unit->lock);
  469         LIST_INIT(&unit->domains);
  470 
  471         /*
  472          * 9.2 "Context Entry":
  473          * When Caching Mode (CM) field is reported as Set, the
  474          * domain-id value of zero is architecturally reserved.
  475          * Software must not use domain-id value of zero
  476          * when CM is Set.
  477          */
  478         if ((unit->hw_cap & DMAR_CAP_CM) != 0)
  479                 alloc_unr_specific(unit->domids, 0);
  480 
  481         unit->ctx_obj = vm_pager_allocate(OBJT_PHYS, NULL, IDX_TO_OFF(1 +
  482             DMAR_CTX_CNT), 0, 0, NULL);
  483 
  484         /*
  485          * Allocate and load the root entry table pointer.  Enable the
  486          * address translation after the required invalidations are
  487          * done.
  488          */
  489         dmar_pgalloc(unit->ctx_obj, 0, DMAR_PGF_WAITOK | DMAR_PGF_ZERO);
  490         DMAR_LOCK(unit);
  491         error = dmar_load_root_entry_ptr(unit);
  492         if (error != 0) {
  493                 DMAR_UNLOCK(unit);
  494                 dmar_release_resources(dev, unit);
  495                 return (error);
  496         }
  497         error = dmar_inv_ctx_glob(unit);
  498         if (error != 0) {
  499                 DMAR_UNLOCK(unit);
  500                 dmar_release_resources(dev, unit);
  501                 return (error);
  502         }
  503         if ((unit->hw_ecap & DMAR_ECAP_DI) != 0) {
  504                 error = dmar_inv_iotlb_glob(unit);
  505                 if (error != 0) {
  506                         DMAR_UNLOCK(unit);
  507                         dmar_release_resources(dev, unit);
  508                         return (error);
  509                 }
  510         }
  511 
  512         DMAR_UNLOCK(unit);
  513         error = dmar_init_fault_log(unit);
  514         if (error != 0) {
  515                 dmar_release_resources(dev, unit);
  516                 return (error);
  517         }
  518         error = dmar_init_qi(unit);
  519         if (error != 0) {
  520                 dmar_release_resources(dev, unit);
  521                 return (error);
  522         }
  523         error = dmar_init_irt(unit);
  524         if (error != 0) {
  525                 dmar_release_resources(dev, unit);
  526                 return (error);
  527         }
  528         error = dmar_init_busdma(unit);
  529         if (error != 0) {
  530                 dmar_release_resources(dev, unit);
  531                 return (error);
  532         }
  533 
  534 #ifdef NOTYET
  535         DMAR_LOCK(unit);
  536         error = dmar_enable_translation(unit);
  537         if (error != 0) {
  538                 DMAR_UNLOCK(unit);
  539                 dmar_release_resources(dev, unit);
  540                 return (error);
  541         }
  542         DMAR_UNLOCK(unit);
  543 #endif
  544 
  545         return (0);
  546 }
  547 
  548 static int
  549 dmar_detach(device_t dev)
  550 {
  551 
  552         return (EBUSY);
  553 }
  554 
  555 static int
  556 dmar_suspend(device_t dev)
  557 {
  558 
  559         return (0);
  560 }
  561 
  562 static int
  563 dmar_resume(device_t dev)
  564 {
  565 
  566         /* XXXKIB */
  567         return (0);
  568 }
  569 
  570 static device_method_t dmar_methods[] = {
  571         DEVMETHOD(device_identify, dmar_identify),
  572         DEVMETHOD(device_probe, dmar_probe),
  573         DEVMETHOD(device_attach, dmar_attach),
  574         DEVMETHOD(device_detach, dmar_detach),
  575         DEVMETHOD(device_suspend, dmar_suspend),
  576         DEVMETHOD(device_resume, dmar_resume),
  577 #ifdef DEV_APIC
  578         DEVMETHOD(bus_remap_intr, dmar_remap_intr),
  579 #endif
  580         DEVMETHOD_END
  581 };
  582 
  583 static driver_t dmar_driver = {
  584         "dmar",
  585         dmar_methods,
  586         sizeof(struct dmar_unit),
  587 };
  588 
  589 DRIVER_MODULE(dmar, acpi, dmar_driver, dmar_devclass, 0, 0);
  590 MODULE_DEPEND(dmar, acpi, 1, 1, 1);
  591 
  592 static void
  593 dmar_print_path(device_t dev, const char *banner, int busno, int depth,
  594     const ACPI_DMAR_PCI_PATH *path)
  595 {
  596         int i;
  597 
  598         device_printf(dev, "%s [%d, ", banner, busno);
  599         for (i = 0; i < depth; i++) {
  600                 if (i != 0)
  601                         printf(", ");
  602                 printf("(%d, %d)", path[i].Device, path[i].Function);
  603         }
  604         printf("]\n");
  605 }
  606 
  607 static int
  608 dmar_dev_depth(device_t child)
  609 {
  610         devclass_t pci_class;
  611         device_t bus, pcib;
  612         int depth;
  613 
  614         pci_class = devclass_find("pci");
  615         for (depth = 1; ; depth++) {
  616                 bus = device_get_parent(child);
  617                 pcib = device_get_parent(bus);
  618                 if (device_get_devclass(device_get_parent(pcib)) !=
  619                     pci_class)
  620                         return (depth);
  621                 child = pcib;
  622         }
  623 }
  624 
  625 static void
  626 dmar_dev_path(device_t child, int *busno, ACPI_DMAR_PCI_PATH *path, int depth)
  627 {
  628         devclass_t pci_class;
  629         device_t bus, pcib;
  630 
  631         pci_class = devclass_find("pci");
  632         for (depth--; depth != -1; depth--) {
  633                 path[depth].Device = pci_get_slot(child);
  634                 path[depth].Function = pci_get_function(child);
  635                 bus = device_get_parent(child);
  636                 pcib = device_get_parent(bus);
  637                 if (device_get_devclass(device_get_parent(pcib)) !=
  638                     pci_class) {
  639                         /* reached a host bridge */
  640                         *busno = pcib_get_bus(bus);
  641                         return;
  642                 }
  643                 child = pcib;
  644         }
  645         panic("wrong depth");
  646 }
  647 
  648 static int
  649 dmar_match_pathes(int busno1, const ACPI_DMAR_PCI_PATH *path1, int depth1,
  650     int busno2, const ACPI_DMAR_PCI_PATH *path2, int depth2,
  651     enum AcpiDmarScopeType scope_type)
  652 {
  653         int i, depth;
  654 
  655         if (busno1 != busno2)
  656                 return (0);
  657         if (scope_type == ACPI_DMAR_SCOPE_TYPE_ENDPOINT && depth1 != depth2)
  658                 return (0);
  659         depth = depth1;
  660         if (depth2 < depth)
  661                 depth = depth2;
  662         for (i = 0; i < depth; i++) {
  663                 if (path1[i].Device != path2[i].Device ||
  664                     path1[i].Function != path2[i].Function)
  665                         return (0);
  666         }
  667         return (1);
  668 }
  669 
  670 static int
  671 dmar_match_devscope(ACPI_DMAR_DEVICE_SCOPE *devscope, device_t dev,
  672     int dev_busno, const ACPI_DMAR_PCI_PATH *dev_path, int dev_path_len)
  673 {
  674         ACPI_DMAR_PCI_PATH *path;
  675         int path_len;
  676 
  677         if (devscope->Length < sizeof(*devscope)) {
  678                 printf("dmar_find: corrupted DMAR table, dl %d\n",
  679                     devscope->Length);
  680                 return (-1);
  681         }
  682         if (devscope->EntryType != ACPI_DMAR_SCOPE_TYPE_ENDPOINT &&
  683             devscope->EntryType != ACPI_DMAR_SCOPE_TYPE_BRIDGE)
  684                 return (0);
  685         path_len = devscope->Length - sizeof(*devscope);
  686         if (path_len % 2 != 0) {
  687                 printf("dmar_find_bsf: corrupted DMAR table, dl %d\n",
  688                     devscope->Length);
  689                 return (-1);
  690         }
  691         path_len /= 2;
  692         path = (ACPI_DMAR_PCI_PATH *)(devscope + 1);
  693         if (path_len == 0) {
  694                 printf("dmar_find: corrupted DMAR table, dl %d\n",
  695                     devscope->Length);
  696                 return (-1);
  697         }
  698         if (dmar_match_verbose)
  699                 dmar_print_path(dev, "DMAR", devscope->Bus, path_len, path);
  700 
  701         return (dmar_match_pathes(devscope->Bus, path, path_len, dev_busno,
  702             dev_path, dev_path_len, devscope->EntryType));
  703 }
  704 
  705 struct dmar_unit *
  706 dmar_find(device_t dev)
  707 {
  708         device_t dmar_dev;
  709         ACPI_DMAR_HARDWARE_UNIT *dmarh;
  710         ACPI_DMAR_DEVICE_SCOPE *devscope;
  711         char *ptr, *ptrend;
  712         int i, match, dev_domain, dev_busno, dev_path_len;
  713 
  714         dmar_dev = NULL;
  715         dev_domain = pci_get_domain(dev);
  716         dev_path_len = dmar_dev_depth(dev);
  717         ACPI_DMAR_PCI_PATH dev_path[dev_path_len];
  718         dmar_dev_path(dev, &dev_busno, dev_path, dev_path_len);
  719         if (dmar_match_verbose)
  720                 dmar_print_path(dev, "PCI", dev_busno, dev_path_len, dev_path);
  721 
  722         for (i = 0; i < dmar_devcnt; i++) {
  723                 if (dmar_devs[i] == NULL)
  724                         continue;
  725                 dmarh = dmar_find_by_index(i);
  726                 if (dmarh == NULL)
  727                         continue;
  728                 if (dmarh->Segment != dev_domain)
  729                         continue;
  730                 if ((dmarh->Flags & ACPI_DMAR_INCLUDE_ALL) != 0) {
  731                         dmar_dev = dmar_devs[i];
  732                         if (dmar_match_verbose) {
  733                                 device_printf(dev,
  734                                     "pci%d:%d:%d:%d matched dmar%d INCLUDE_ALL\n",
  735                                     dev_domain, pci_get_bus(dev),
  736                                     pci_get_slot(dev),
  737                                     pci_get_function(dev),
  738                                     ((struct dmar_unit *)device_get_softc(
  739                                     dmar_dev))->unit);
  740                         }
  741                         goto found;
  742                 }
  743                 ptr = (char *)dmarh + sizeof(*dmarh);
  744                 ptrend = (char *)dmarh + dmarh->Header.Length;
  745                 for (;;) {
  746                         if (ptr >= ptrend)
  747                                 break;
  748                         devscope = (ACPI_DMAR_DEVICE_SCOPE *)ptr;
  749                         ptr += devscope->Length;
  750                         if (dmar_match_verbose) {
  751                                 device_printf(dev,
  752                                     "pci%d:%d:%d:%d matching dmar%d\n",
  753                                     dev_domain, pci_get_bus(dev),
  754                                     pci_get_slot(dev),
  755                                     pci_get_function(dev),
  756                                     ((struct dmar_unit *)device_get_softc(
  757                                     dmar_devs[i]))->unit);
  758                         }
  759                         match = dmar_match_devscope(devscope, dev, dev_busno,
  760                             dev_path, dev_path_len);
  761                         if (dmar_match_verbose) {
  762                                 if (match == -1)
  763                                         printf("table error\n");
  764                                 else if (match == 0)
  765                                         printf("not matched\n");
  766                                 else
  767                                         printf("matched\n");
  768                         }
  769                         if (match == -1)
  770                                 return (NULL);
  771                         else if (match == 1) {
  772                                 dmar_dev = dmar_devs[i];
  773                                 goto found;
  774                         }
  775                 }
  776         }
  777         return (NULL);
  778 found:
  779         return (device_get_softc(dmar_dev));
  780 }
  781 
  782 static struct dmar_unit *
  783 dmar_find_nonpci(u_int id, u_int entry_type, uint16_t *rid)
  784 {
  785         device_t dmar_dev;
  786         struct dmar_unit *unit;
  787         ACPI_DMAR_HARDWARE_UNIT *dmarh;
  788         ACPI_DMAR_DEVICE_SCOPE *devscope;
  789         ACPI_DMAR_PCI_PATH *path;
  790         char *ptr, *ptrend;
  791         int i;
  792 
  793         for (i = 0; i < dmar_devcnt; i++) {
  794                 dmar_dev = dmar_devs[i];
  795                 if (dmar_dev == NULL)
  796                         continue;
  797                 unit = (struct dmar_unit *)device_get_softc(dmar_dev);
  798                 dmarh = dmar_find_by_index(i);
  799                 if (dmarh == NULL)
  800                         continue;
  801                 ptr = (char *)dmarh + sizeof(*dmarh);
  802                 ptrend = (char *)dmarh + dmarh->Header.Length;
  803                 for (;;) {
  804                         if (ptr >= ptrend)
  805                                 break;
  806                         devscope = (ACPI_DMAR_DEVICE_SCOPE *)ptr;
  807                         ptr += devscope->Length;
  808                         if (devscope->EntryType != entry_type)
  809                                 continue;
  810                         if (devscope->EnumerationId != id)
  811                                 continue;
  812                         if (devscope->Length - sizeof(ACPI_DMAR_DEVICE_SCOPE)
  813                             == 2) {
  814                                 if (rid != NULL) {
  815                                         path = (ACPI_DMAR_PCI_PATH *)
  816                                             (devscope + 1);
  817                                         *rid = PCI_RID(devscope->Bus,
  818                                             path->Device, path->Function);
  819                                 }
  820                                 return (unit);
  821                         } else {
  822                                 /* XXXKIB */
  823                                 printf(
  824                        "dmar_find_nonpci: id %d type %d path length != 2\n",
  825                                     id, entry_type);
  826                         }
  827                 }
  828         }
  829         return (NULL);
  830 }
  831 
  832 
  833 struct dmar_unit *
  834 dmar_find_hpet(device_t dev, uint16_t *rid)
  835 {
  836 
  837         return (dmar_find_nonpci(hpet_get_uid(dev), ACPI_DMAR_SCOPE_TYPE_HPET,
  838             rid));
  839 }
  840 
  841 struct dmar_unit *
  842 dmar_find_ioapic(u_int apic_id, uint16_t *rid)
  843 {
  844 
  845         return (dmar_find_nonpci(apic_id, ACPI_DMAR_SCOPE_TYPE_IOAPIC, rid));
  846 }
  847 
  848 struct rmrr_iter_args {
  849         struct dmar_domain *domain;
  850         device_t dev;
  851         int dev_domain;
  852         int dev_busno;
  853         ACPI_DMAR_PCI_PATH *dev_path;
  854         int dev_path_len;
  855         struct dmar_map_entries_tailq *rmrr_entries;
  856 };
  857 
  858 static int
  859 dmar_rmrr_iter(ACPI_DMAR_HEADER *dmarh, void *arg)
  860 {
  861         struct rmrr_iter_args *ria;
  862         ACPI_DMAR_RESERVED_MEMORY *resmem;
  863         ACPI_DMAR_DEVICE_SCOPE *devscope;
  864         struct dmar_map_entry *entry;
  865         char *ptr, *ptrend;
  866         int match;
  867 
  868         if (dmarh->Type != ACPI_DMAR_TYPE_RESERVED_MEMORY)
  869                 return (1);
  870 
  871         ria = arg;
  872         resmem = (ACPI_DMAR_RESERVED_MEMORY *)dmarh;
  873         if (dmar_match_verbose) {
  874                 printf("RMRR [%jx,%jx] segment %d\n",
  875                     (uintmax_t)resmem->BaseAddress,
  876                     (uintmax_t)resmem->EndAddress,
  877                     resmem->Segment);
  878         }
  879         if (resmem->Segment != ria->dev_domain)
  880                 return (1);
  881 
  882         ptr = (char *)resmem + sizeof(*resmem);
  883         ptrend = (char *)resmem + resmem->Header.Length;
  884         for (;;) {
  885                 if (ptr >= ptrend)
  886                         break;
  887                 devscope = (ACPI_DMAR_DEVICE_SCOPE *)ptr;
  888                 ptr += devscope->Length;
  889                 match = dmar_match_devscope(devscope, ria->dev, ria->dev_busno,
  890                     ria->dev_path, ria->dev_path_len);
  891                 if (match == 1) {
  892                         if (dmar_match_verbose)
  893                                 printf("matched\n");
  894                         entry = dmar_gas_alloc_entry(ria->domain,
  895                             DMAR_PGF_WAITOK);
  896                         entry->start = resmem->BaseAddress;
  897                         /* The RMRR entry end address is inclusive. */
  898                         entry->end = resmem->EndAddress;
  899                         TAILQ_INSERT_TAIL(ria->rmrr_entries, entry,
  900                             unroll_link);
  901                 } else if (dmar_match_verbose) {
  902                         printf("not matched, err %d\n", match);
  903                 }
  904         }
  905 
  906         return (1);
  907 }
  908 
  909 void
  910 dmar_dev_parse_rmrr(struct dmar_domain *domain, device_t dev,
  911     struct dmar_map_entries_tailq *rmrr_entries)
  912 {
  913         struct rmrr_iter_args ria;
  914 
  915         ria.dev_domain = pci_get_domain(dev);
  916         ria.dev_path_len = dmar_dev_depth(dev);
  917         ACPI_DMAR_PCI_PATH dev_path[ria.dev_path_len];
  918         dmar_dev_path(dev, &ria.dev_busno, dev_path, ria.dev_path_len);
  919 
  920         if (dmar_match_verbose) {
  921                 device_printf(dev, "parsing RMRR entries for ");
  922                 dmar_print_path(dev, "PCI", ria.dev_busno, ria.dev_path_len,
  923                     dev_path);
  924         }
  925 
  926         ria.domain = domain;
  927         ria.dev = dev;
  928         ria.dev_path = dev_path;
  929         ria.rmrr_entries = rmrr_entries;
  930         dmar_iterate_tbl(dmar_rmrr_iter, &ria);
  931 }
  932 
  933 struct inst_rmrr_iter_args {
  934         struct dmar_unit *dmar;
  935 };
  936 
  937 static device_t
  938 dmar_path_dev(int segment, int path_len, int busno,
  939     const ACPI_DMAR_PCI_PATH *path)
  940 {
  941         devclass_t pci_class;
  942         device_t bus, pcib, dev;
  943         int i;
  944 
  945         pci_class = devclass_find("pci");
  946         dev = NULL;
  947         for (i = 0; i < path_len; i++, path++) {
  948                 dev = pci_find_dbsf(segment, busno, path->Device,
  949                     path->Function);
  950                 if (dev == NULL)
  951                         break;
  952                 if (i != path_len - 1) {
  953                         bus = device_get_parent(dev);
  954                         pcib = device_get_parent(bus);
  955                         if (device_get_devclass(device_get_parent(pcib)) !=
  956                             pci_class)
  957                                 return (NULL);
  958                 }
  959                 busno = pcib_get_bus(dev);
  960         }
  961         return (dev);
  962 }
  963 
  964 static int
  965 dmar_inst_rmrr_iter(ACPI_DMAR_HEADER *dmarh, void *arg)
  966 {
  967         const ACPI_DMAR_RESERVED_MEMORY *resmem;
  968         const ACPI_DMAR_DEVICE_SCOPE *devscope;
  969         struct inst_rmrr_iter_args *iria;
  970         const char *ptr, *ptrend;
  971         struct dmar_unit *dev_dmar;
  972         device_t dev;
  973 
  974         if (dmarh->Type != ACPI_DMAR_TYPE_RESERVED_MEMORY)
  975                 return (1);
  976 
  977         iria = arg;
  978         resmem = (ACPI_DMAR_RESERVED_MEMORY *)dmarh;
  979         if (resmem->Segment != iria->dmar->segment)
  980                 return (1);
  981         if (dmar_match_verbose) {
  982                 printf("dmar%d: RMRR [%jx,%jx]\n", iria->dmar->unit,
  983                     (uintmax_t)resmem->BaseAddress,
  984                     (uintmax_t)resmem->EndAddress);
  985         }
  986 
  987         ptr = (const char *)resmem + sizeof(*resmem);
  988         ptrend = (const char *)resmem + resmem->Header.Length;
  989         for (;;) {
  990                 if (ptr >= ptrend)
  991                         break;
  992                 devscope = (const ACPI_DMAR_DEVICE_SCOPE *)ptr;
  993                 ptr += devscope->Length;
  994                 /* XXXKIB bridge */
  995                 if (devscope->EntryType != ACPI_DMAR_SCOPE_TYPE_ENDPOINT)
  996                         continue;
  997                 if (dmar_match_verbose) {
  998                         dmar_print_path(iria->dmar->dev, "RMRR scope",
  999                             devscope->Bus, (devscope->Length -
 1000                             sizeof(ACPI_DMAR_DEVICE_SCOPE)) / 2,
 1001                             (const ACPI_DMAR_PCI_PATH *)(devscope + 1));
 1002                 }
 1003                 dev = dmar_path_dev(resmem->Segment, (devscope->Length -
 1004                     sizeof(ACPI_DMAR_DEVICE_SCOPE)) / 2, devscope->Bus,
 1005                     (const ACPI_DMAR_PCI_PATH *)(devscope + 1));
 1006                 if (dev == NULL) {
 1007                         if (dmar_match_verbose)
 1008                                 printf("null dev\n");
 1009                         continue;
 1010                 }
 1011                 dev_dmar = dmar_find(dev);
 1012                 if (dev_dmar != iria->dmar) {
 1013                         if (dmar_match_verbose) {
 1014                                 printf("dmar%d matched, skipping\n",
 1015                                     dev_dmar->unit);
 1016                         }
 1017                         continue;
 1018                 }
 1019                 if (dmar_match_verbose)
 1020                         printf("matched, instantiating RMRR context\n");
 1021                 dmar_instantiate_ctx(iria->dmar, dev, true);
 1022         }
 1023 
 1024         return (1);
 1025 
 1026 }
 1027 
 1028 /*
 1029  * Pre-create all contexts for the DMAR which have RMRR entries.
 1030  */
 1031 int
 1032 dmar_instantiate_rmrr_ctxs(struct dmar_unit *dmar)
 1033 {
 1034         struct inst_rmrr_iter_args iria;
 1035         int error;
 1036 
 1037         if (!dmar_barrier_enter(dmar, DMAR_BARRIER_RMRR))
 1038                 return (0);
 1039 
 1040         error = 0;
 1041         iria.dmar = dmar;
 1042         if (dmar_match_verbose)
 1043                 printf("dmar%d: instantiating RMRR contexts\n", dmar->unit);
 1044         dmar_iterate_tbl(dmar_inst_rmrr_iter, &iria);
 1045         DMAR_LOCK(dmar);
 1046         if (!LIST_EMPTY(&dmar->domains)) {
 1047                 KASSERT((dmar->hw_gcmd & DMAR_GCMD_TE) == 0,
 1048             ("dmar%d: RMRR not handled but translation is already enabled",
 1049                     dmar->unit));
 1050                 error = dmar_enable_translation(dmar);
 1051         }
 1052         dmar_barrier_exit(dmar, DMAR_BARRIER_RMRR);
 1053         return (error);
 1054 }
 1055 
 1056 #ifdef DDB
 1057 #include <ddb/ddb.h>
 1058 #include <ddb/db_lex.h>
 1059 
 1060 static void
 1061 dmar_print_domain_entry(const struct dmar_map_entry *entry)
 1062 {
 1063         struct dmar_map_entry *l, *r;
 1064 
 1065         db_printf(
 1066             "    start %jx end %jx free_after %jx free_down %jx flags %x ",
 1067             entry->start, entry->end, entry->free_after, entry->free_down,
 1068             entry->flags);
 1069         db_printf("left ");
 1070         l = RB_LEFT(entry, rb_entry);
 1071         if (l == NULL)
 1072                 db_printf("NULL ");
 1073         else
 1074                 db_printf("%jx ", l->start);
 1075         db_printf("right ");
 1076         r = RB_RIGHT(entry, rb_entry);
 1077         if (r == NULL)
 1078                 db_printf("NULL");
 1079         else
 1080                 db_printf("%jx", r->start);
 1081         db_printf("\n");
 1082 }
 1083 
 1084 static void
 1085 dmar_print_ctx(struct dmar_ctx *ctx)
 1086 {
 1087 
 1088         db_printf(
 1089             "    @%p pci%d:%d:%d refs %d flags %x loads %lu unloads %lu\n",
 1090             ctx, pci_get_bus(ctx->ctx_tag.owner),
 1091             pci_get_slot(ctx->ctx_tag.owner),
 1092             pci_get_function(ctx->ctx_tag.owner), ctx->refs, ctx->flags,
 1093             ctx->loads, ctx->unloads);
 1094 }
 1095 
 1096 static void
 1097 dmar_print_domain(struct dmar_domain *domain, bool show_mappings)
 1098 {
 1099         struct dmar_map_entry *entry;
 1100         struct dmar_ctx *ctx;
 1101 
 1102         db_printf(
 1103             "  @%p dom %d mgaw %d agaw %d pglvl %d end %jx refs %d\n"
 1104             "   ctx_cnt %d flags %x pgobj %p map_ents %u\n",
 1105             domain, domain->domain, domain->mgaw, domain->agaw, domain->pglvl,
 1106             (uintmax_t)domain->end, domain->refs, domain->ctx_cnt,
 1107             domain->flags, domain->pgtbl_obj, domain->entries_cnt);
 1108         if (!LIST_EMPTY(&domain->contexts)) {
 1109                 db_printf("  Contexts:\n");
 1110                 LIST_FOREACH(ctx, &domain->contexts, link)
 1111                         dmar_print_ctx(ctx);
 1112         }
 1113         if (!show_mappings)
 1114                 return;
 1115         db_printf("    mapped:\n");
 1116         RB_FOREACH(entry, dmar_gas_entries_tree, &domain->rb_root) {
 1117                 dmar_print_domain_entry(entry);
 1118                 if (db_pager_quit)
 1119                         break;
 1120         }
 1121         if (db_pager_quit)
 1122                 return;
 1123         db_printf("    unloading:\n");
 1124         TAILQ_FOREACH(entry, &domain->unload_entries, dmamap_link) {
 1125                 dmar_print_domain_entry(entry);
 1126                 if (db_pager_quit)
 1127                         break;
 1128         }
 1129 }
 1130 
 1131 DB_FUNC(dmar_domain, db_dmar_print_domain, db_show_table, CS_OWN, NULL)
 1132 {
 1133         struct dmar_unit *unit;
 1134         struct dmar_domain *domain;
 1135         struct dmar_ctx *ctx;
 1136         bool show_mappings, valid;
 1137         int pci_domain, bus, device, function, i, t;
 1138         db_expr_t radix;
 1139 
 1140         valid = false;
 1141         radix = db_radix;
 1142         db_radix = 10;
 1143         t = db_read_token();
 1144         if (t == tSLASH) {
 1145                 t = db_read_token();
 1146                 if (t != tIDENT) {
 1147                         db_printf("Bad modifier\n");
 1148                         db_radix = radix;
 1149                         db_skip_to_eol();
 1150                         return;
 1151                 }
 1152                 show_mappings = strchr(db_tok_string, 'm') != NULL;
 1153                 t = db_read_token();
 1154         } else {
 1155                 show_mappings = false;
 1156         }
 1157         if (t == tNUMBER) {
 1158                 pci_domain = db_tok_number;
 1159                 t = db_read_token();
 1160                 if (t == tNUMBER) {
 1161                         bus = db_tok_number;
 1162                         t = db_read_token();
 1163                         if (t == tNUMBER) {
 1164                                 device = db_tok_number;
 1165                                 t = db_read_token();
 1166                                 if (t == tNUMBER) {
 1167                                         function = db_tok_number;
 1168                                         valid = true;
 1169                                 }
 1170                         }
 1171                 }
 1172         }
 1173                         db_radix = radix;
 1174         db_skip_to_eol();
 1175         if (!valid) {
 1176                 db_printf("usage: show dmar_domain [/m] "
 1177                     "<domain> <bus> <device> <func>\n");
 1178                 return;
 1179         }
 1180         for (i = 0; i < dmar_devcnt; i++) {
 1181                 unit = device_get_softc(dmar_devs[i]);
 1182                 LIST_FOREACH(domain, &unit->domains, link) {
 1183                         LIST_FOREACH(ctx, &domain->contexts, link) {
 1184                                 if (pci_domain == unit->segment && 
 1185                                     bus == pci_get_bus(ctx->ctx_tag.owner) &&
 1186                                     device ==
 1187                                     pci_get_slot(ctx->ctx_tag.owner) &&
 1188                                     function ==
 1189                                     pci_get_function(ctx->ctx_tag.owner)) {
 1190                                         dmar_print_domain(domain,
 1191                                             show_mappings);
 1192                                         goto out;
 1193                                 }
 1194                         }
 1195                 }
 1196         }
 1197 out:;
 1198 }
 1199 
 1200 static void
 1201 dmar_print_one(int idx, bool show_domains, bool show_mappings)
 1202 {
 1203         struct dmar_unit *unit;
 1204         struct dmar_domain *domain;
 1205         int i, frir;
 1206 
 1207         unit = device_get_softc(dmar_devs[idx]);
 1208         db_printf("dmar%d at %p, root at 0x%jx, ver 0x%x\n", unit->unit, unit,
 1209             dmar_read8(unit, DMAR_RTADDR_REG), dmar_read4(unit, DMAR_VER_REG));
 1210         db_printf("cap 0x%jx ecap 0x%jx gsts 0x%x fsts 0x%x fectl 0x%x\n",
 1211             (uintmax_t)dmar_read8(unit, DMAR_CAP_REG),
 1212             (uintmax_t)dmar_read8(unit, DMAR_ECAP_REG),
 1213             dmar_read4(unit, DMAR_GSTS_REG),
 1214             dmar_read4(unit, DMAR_FSTS_REG),
 1215             dmar_read4(unit, DMAR_FECTL_REG));
 1216         if (unit->ir_enabled) {
 1217                 db_printf("ir is enabled; IRT @%p phys 0x%jx maxcnt %d\n",
 1218                     unit->irt, (uintmax_t)unit->irt_phys, unit->irte_cnt);
 1219         }
 1220         db_printf("fed 0x%x fea 0x%x feua 0x%x\n",
 1221             dmar_read4(unit, DMAR_FEDATA_REG),
 1222             dmar_read4(unit, DMAR_FEADDR_REG),
 1223             dmar_read4(unit, DMAR_FEUADDR_REG));
 1224         db_printf("primary fault log:\n");
 1225         for (i = 0; i < DMAR_CAP_NFR(unit->hw_cap); i++) {
 1226                 frir = (DMAR_CAP_FRO(unit->hw_cap) + i) * 16;
 1227                 db_printf("  %d at 0x%x: %jx %jx\n", i, frir,
 1228                     (uintmax_t)dmar_read8(unit, frir),
 1229                     (uintmax_t)dmar_read8(unit, frir + 8));
 1230         }
 1231         if (DMAR_HAS_QI(unit)) {
 1232                 db_printf("ied 0x%x iea 0x%x ieua 0x%x\n",
 1233                     dmar_read4(unit, DMAR_IEDATA_REG),
 1234                     dmar_read4(unit, DMAR_IEADDR_REG),
 1235                     dmar_read4(unit, DMAR_IEUADDR_REG));
 1236                 if (unit->qi_enabled) {
 1237                         db_printf("qi is enabled: queue @0x%jx (IQA 0x%jx) "
 1238                             "size 0x%jx\n"
 1239                     "  head 0x%x tail 0x%x avail 0x%x status 0x%x ctrl 0x%x\n"
 1240                     "  hw compl 0x%x@%p/phys@%jx next seq 0x%x gen 0x%x\n",
 1241                             (uintmax_t)unit->inv_queue,
 1242                             (uintmax_t)dmar_read8(unit, DMAR_IQA_REG),
 1243                             (uintmax_t)unit->inv_queue_size,
 1244                             dmar_read4(unit, DMAR_IQH_REG),
 1245                             dmar_read4(unit, DMAR_IQT_REG),
 1246                             unit->inv_queue_avail,
 1247                             dmar_read4(unit, DMAR_ICS_REG),
 1248                             dmar_read4(unit, DMAR_IECTL_REG),
 1249                             unit->inv_waitd_seq_hw,
 1250                             &unit->inv_waitd_seq_hw,
 1251                             (uintmax_t)unit->inv_waitd_seq_hw_phys,
 1252                             unit->inv_waitd_seq,
 1253                             unit->inv_waitd_gen);
 1254                 } else {
 1255                         db_printf("qi is disabled\n");
 1256                 }
 1257         }
 1258         if (show_domains) {
 1259                 db_printf("domains:\n");
 1260                 LIST_FOREACH(domain, &unit->domains, link) {
 1261                         dmar_print_domain(domain, show_mappings);
 1262                         if (db_pager_quit)
 1263                                 break;
 1264                 }
 1265         }
 1266 }
 1267 
 1268 DB_SHOW_COMMAND(dmar, db_dmar_print)
 1269 {
 1270         bool show_domains, show_mappings;
 1271 
 1272         show_domains = strchr(modif, 'd') != NULL;
 1273         show_mappings = strchr(modif, 'm') != NULL;
 1274         if (!have_addr) {
 1275                 db_printf("usage: show dmar [/d] [/m] index\n");
 1276                 return;
 1277         }
 1278         dmar_print_one((int)addr, show_domains, show_mappings);
 1279 }
 1280 
 1281 DB_SHOW_ALL_COMMAND(dmars, db_show_all_dmars)
 1282 {
 1283         int i;
 1284         bool show_domains, show_mappings;
 1285 
 1286         show_domains = strchr(modif, 'd') != NULL;
 1287         show_mappings = strchr(modif, 'm') != NULL;
 1288 
 1289         for (i = 0; i < dmar_devcnt; i++) {
 1290                 dmar_print_one(i, show_domains, show_mappings);
 1291                 if (db_pager_quit)
 1292                         break;
 1293         }
 1294 }
 1295 #endif

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