1 /*-
2 * Copyright (c) 2013, 2015 The FreeBSD Foundation
3 * All rights reserved.
4 *
5 * This software was developed by Konstantin Belousov <kib@FreeBSD.org>
6 * under sponsorship from the FreeBSD Foundation.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32
33 #include <sys/param.h>
34 #include <sys/bus.h>
35 #include <sys/kernel.h>
36 #include <sys/lock.h>
37 #include <sys/malloc.h>
38 #include <sys/memdesc.h>
39 #include <sys/module.h>
40 #include <sys/rman.h>
41 #include <sys/rwlock.h>
42 #include <sys/smp.h>
43 #include <sys/taskqueue.h>
44 #include <sys/tree.h>
45 #include <sys/vmem.h>
46 #include <machine/bus.h>
47 #include <contrib/dev/acpica/include/acpi.h>
48 #include <contrib/dev/acpica/include/accommon.h>
49 #include <dev/acpica/acpivar.h>
50 #include <vm/vm.h>
51 #include <vm/vm_extern.h>
52 #include <vm/vm_kern.h>
53 #include <vm/vm_object.h>
54 #include <vm/vm_page.h>
55 #include <vm/vm_pager.h>
56 #include <vm/vm_map.h>
57 #include <x86/include/busdma_impl.h>
58 #include <x86/iommu/intel_reg.h>
59 #include <x86/iommu/busdma_dmar.h>
60 #include <x86/iommu/intel_dmar.h>
61 #include <dev/pci/pcivar.h>
62
63 typedef void (*dmar_quirk_cpu_fun)(struct dmar_unit *);
64
65 struct intel_dmar_quirk_cpu {
66 u_int ext_family;
67 u_int ext_model;
68 u_int family_code;
69 u_int model;
70 u_int stepping;
71 dmar_quirk_cpu_fun quirk;
72 const char *descr;
73 };
74
75 typedef void (*dmar_quirk_nb_fun)(struct dmar_unit *, device_t nb);
76
77 struct intel_dmar_quirk_nb {
78 u_int dev_id;
79 u_int rev_no;
80 dmar_quirk_nb_fun quirk;
81 const char *descr;
82 };
83
84 #define QUIRK_NB_ALL_REV 0xffffffff
85
86 static void
87 dmar_match_quirks(struct dmar_unit *dmar,
88 const struct intel_dmar_quirk_nb *nb_quirks, int nb_quirks_len,
89 const struct intel_dmar_quirk_cpu *cpu_quirks, int cpu_quirks_len)
90 {
91 device_t nb;
92 const struct intel_dmar_quirk_nb *nb_quirk;
93 const struct intel_dmar_quirk_cpu *cpu_quirk;
94 u_int p[4];
95 u_int dev_id, rev_no;
96 u_int ext_family, ext_model, family_code, model, stepping;
97 int i;
98
99 if (nb_quirks != NULL) {
100 nb = pci_find_bsf(0, 0, 0);
101 if (nb != NULL) {
102 dev_id = pci_get_device(nb);
103 rev_no = pci_get_revid(nb);
104 for (i = 0; i < nb_quirks_len; i++) {
105 nb_quirk = &nb_quirks[i];
106 if (nb_quirk->dev_id == dev_id &&
107 (nb_quirk->rev_no == rev_no ||
108 nb_quirk->rev_no == QUIRK_NB_ALL_REV)) {
109 if (bootverbose) {
110 device_printf(dmar->dev,
111 "NB IOMMU quirk %s\n",
112 nb_quirk->descr);
113 }
114 nb_quirk->quirk(dmar, nb);
115 }
116 }
117 } else {
118 device_printf(dmar->dev, "cannot find northbridge\n");
119 }
120 }
121 if (cpu_quirks != NULL) {
122 do_cpuid(1, p);
123 ext_family = (p[0] & CPUID_EXT_FAMILY) >> 20;
124 ext_model = (p[0] & CPUID_EXT_MODEL) >> 16;
125 family_code = (p[0] & CPUID_FAMILY) >> 8;
126 model = (p[0] & CPUID_MODEL) >> 4;
127 stepping = p[0] & CPUID_STEPPING;
128 for (i = 0; i < cpu_quirks_len; i++) {
129 cpu_quirk = &cpu_quirks[i];
130 if (cpu_quirk->ext_family == ext_family &&
131 cpu_quirk->ext_model == ext_model &&
132 cpu_quirk->family_code == family_code &&
133 cpu_quirk->model == model &&
134 (cpu_quirk->stepping == -1 ||
135 cpu_quirk->stepping == stepping)) {
136 if (bootverbose) {
137 device_printf(dmar->dev,
138 "CPU IOMMU quirk %s\n",
139 cpu_quirk->descr);
140 }
141 cpu_quirk->quirk(dmar);
142 }
143 }
144 }
145 }
146
147 static void
148 nb_5400_no_low_high_prot_mem(struct dmar_unit *unit, device_t nb __unused)
149 {
150
151 unit->hw_cap &= ~(DMAR_CAP_PHMR | DMAR_CAP_PLMR);
152 }
153
154 static void
155 nb_no_ir(struct dmar_unit *unit, device_t nb __unused)
156 {
157
158 unit->hw_ecap &= ~(DMAR_ECAP_IR | DMAR_ECAP_EIM);
159 }
160
161 static void
162 nb_5500_no_ir_rev13(struct dmar_unit *unit, device_t nb)
163 {
164 u_int rev_no;
165
166 rev_no = pci_get_revid(nb);
167 if (rev_no <= 0x13)
168 nb_no_ir(unit, nb);
169 }
170
171 static const struct intel_dmar_quirk_nb pre_use_nb[] = {
172 {
173 .dev_id = 0x4001, .rev_no = 0x20,
174 .quirk = nb_5400_no_low_high_prot_mem,
175 .descr = "5400 E23" /* no low/high protected memory */
176 },
177 {
178 .dev_id = 0x4003, .rev_no = 0x20,
179 .quirk = nb_5400_no_low_high_prot_mem,
180 .descr = "5400 E23" /* no low/high protected memory */
181 },
182 {
183 .dev_id = 0x3403, .rev_no = QUIRK_NB_ALL_REV,
184 .quirk = nb_5500_no_ir_rev13,
185 .descr = "5500 E47, E53" /* interrupt remapping does not work */
186 },
187 {
188 .dev_id = 0x3405, .rev_no = QUIRK_NB_ALL_REV,
189 .quirk = nb_5500_no_ir_rev13,
190 .descr = "5500 E47, E53" /* interrupt remapping does not work */
191 },
192 {
193 .dev_id = 0x3405, .rev_no = 0x22,
194 .quirk = nb_no_ir,
195 .descr = "5500 E47, E53" /* interrupt remapping does not work */
196 },
197 {
198 .dev_id = 0x3406, .rev_no = QUIRK_NB_ALL_REV,
199 .quirk = nb_5500_no_ir_rev13,
200 .descr = "5500 E47, E53" /* interrupt remapping does not work */
201 },
202 };
203
204 static void
205 cpu_e5_am9(struct dmar_unit *unit)
206 {
207
208 unit->hw_cap &= ~(0x3fULL << 48);
209 unit->hw_cap |= (9ULL << 48);
210 }
211
212 static const struct intel_dmar_quirk_cpu post_ident_cpu[] = {
213 {
214 .ext_family = 0, .ext_model = 2, .family_code = 6, .model = 13,
215 .stepping = 6, .quirk = cpu_e5_am9,
216 .descr = "E5 BT176" /* AM should be at most 9 */
217 },
218 };
219
220 void
221 dmar_quirks_pre_use(struct dmar_unit *dmar)
222 {
223
224 if (!dmar_barrier_enter(dmar, DMAR_BARRIER_USEQ))
225 return;
226 DMAR_LOCK(dmar);
227 dmar_match_quirks(dmar, pre_use_nb, nitems(pre_use_nb),
228 NULL, 0);
229 dmar_barrier_exit(dmar, DMAR_BARRIER_USEQ);
230 }
231
232 void
233 dmar_quirks_post_ident(struct dmar_unit *dmar)
234 {
235
236 dmar_match_quirks(dmar, NULL, 0, post_ident_cpu,
237 nitems(post_ident_cpu));
238 }
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