1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2013, 2015 The FreeBSD Foundation
5 *
6 * This software was developed by Konstantin Belousov <kib@FreeBSD.org>
7 * under sponsorship from the FreeBSD Foundation.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33
34 #include <sys/param.h>
35 #include <sys/bus.h>
36 #include <sys/kernel.h>
37 #include <sys/lock.h>
38 #include <sys/malloc.h>
39 #include <sys/memdesc.h>
40 #include <sys/module.h>
41 #include <sys/mutex.h>
42 #include <sys/rman.h>
43 #include <sys/rwlock.h>
44 #include <sys/smp.h>
45 #include <sys/taskqueue.h>
46 #include <sys/tree.h>
47 #include <sys/vmem.h>
48 #include <vm/vm.h>
49 #include <vm/vm_extern.h>
50 #include <vm/vm_kern.h>
51 #include <vm/vm_object.h>
52 #include <vm/vm_page.h>
53 #include <vm/vm_pager.h>
54 #include <vm/vm_map.h>
55 #include <contrib/dev/acpica/include/acpi.h>
56 #include <contrib/dev/acpica/include/accommon.h>
57 #include <dev/acpica/acpivar.h>
58 #include <dev/pci/pcireg.h>
59 #include <dev/pci/pcivar.h>
60 #include <machine/bus.h>
61 #include <x86/include/busdma_impl.h>
62 #include <dev/iommu/busdma_iommu.h>
63 #include <x86/iommu/intel_reg.h>
64 #include <x86/iommu/intel_dmar.h>
65
66 typedef void (*dmar_quirk_cpu_fun)(struct dmar_unit *);
67
68 struct intel_dmar_quirk_cpu {
69 u_int ext_family;
70 u_int ext_model;
71 u_int family_code;
72 u_int model;
73 u_int stepping;
74 dmar_quirk_cpu_fun quirk;
75 const char *descr;
76 };
77
78 typedef void (*dmar_quirk_nb_fun)(struct dmar_unit *, device_t nb);
79
80 struct intel_dmar_quirk_nb {
81 u_int dev_id;
82 u_int rev_no;
83 dmar_quirk_nb_fun quirk;
84 const char *descr;
85 };
86
87 #define QUIRK_NB_ALL_REV 0xffffffff
88
89 static void
90 dmar_match_quirks(struct dmar_unit *dmar,
91 const struct intel_dmar_quirk_nb *nb_quirks, int nb_quirks_len,
92 const struct intel_dmar_quirk_cpu *cpu_quirks, int cpu_quirks_len)
93 {
94 device_t nb;
95 const struct intel_dmar_quirk_nb *nb_quirk;
96 const struct intel_dmar_quirk_cpu *cpu_quirk;
97 u_int p[4];
98 u_int dev_id, rev_no;
99 u_int ext_family, ext_model, family_code, model, stepping;
100 int i;
101
102 if (nb_quirks != NULL) {
103 nb = pci_find_bsf(0, 0, 0);
104 if (nb != NULL) {
105 dev_id = pci_get_device(nb);
106 rev_no = pci_get_revid(nb);
107 for (i = 0; i < nb_quirks_len; i++) {
108 nb_quirk = &nb_quirks[i];
109 if (nb_quirk->dev_id == dev_id &&
110 (nb_quirk->rev_no == rev_no ||
111 nb_quirk->rev_no == QUIRK_NB_ALL_REV)) {
112 if (bootverbose) {
113 device_printf(dmar->dev,
114 "NB IOMMU quirk %s\n",
115 nb_quirk->descr);
116 }
117 nb_quirk->quirk(dmar, nb);
118 }
119 }
120 } else {
121 device_printf(dmar->dev, "cannot find northbridge\n");
122 }
123 }
124 if (cpu_quirks != NULL) {
125 do_cpuid(1, p);
126 ext_family = (p[0] & CPUID_EXT_FAMILY) >> 20;
127 ext_model = (p[0] & CPUID_EXT_MODEL) >> 16;
128 family_code = (p[0] & CPUID_FAMILY) >> 8;
129 model = (p[0] & CPUID_MODEL) >> 4;
130 stepping = p[0] & CPUID_STEPPING;
131 for (i = 0; i < cpu_quirks_len; i++) {
132 cpu_quirk = &cpu_quirks[i];
133 if (cpu_quirk->ext_family == ext_family &&
134 cpu_quirk->ext_model == ext_model &&
135 cpu_quirk->family_code == family_code &&
136 cpu_quirk->model == model &&
137 (cpu_quirk->stepping == -1 ||
138 cpu_quirk->stepping == stepping)) {
139 if (bootverbose) {
140 device_printf(dmar->dev,
141 "CPU IOMMU quirk %s\n",
142 cpu_quirk->descr);
143 }
144 cpu_quirk->quirk(dmar);
145 }
146 }
147 }
148 }
149
150 static void
151 nb_5400_no_low_high_prot_mem(struct dmar_unit *unit, device_t nb __unused)
152 {
153
154 unit->hw_cap &= ~(DMAR_CAP_PHMR | DMAR_CAP_PLMR);
155 }
156
157 static void
158 nb_no_ir(struct dmar_unit *unit, device_t nb __unused)
159 {
160
161 unit->hw_ecap &= ~(DMAR_ECAP_IR | DMAR_ECAP_EIM);
162 }
163
164 static void
165 nb_5500_no_ir_rev13(struct dmar_unit *unit, device_t nb)
166 {
167 u_int rev_no;
168
169 rev_no = pci_get_revid(nb);
170 if (rev_no <= 0x13)
171 nb_no_ir(unit, nb);
172 }
173
174 static const struct intel_dmar_quirk_nb pre_use_nb[] = {
175 {
176 .dev_id = 0x4001, .rev_no = 0x20,
177 .quirk = nb_5400_no_low_high_prot_mem,
178 .descr = "5400 E23" /* no low/high protected memory */
179 },
180 {
181 .dev_id = 0x4003, .rev_no = 0x20,
182 .quirk = nb_5400_no_low_high_prot_mem,
183 .descr = "5400 E23" /* no low/high protected memory */
184 },
185 {
186 .dev_id = 0x3403, .rev_no = QUIRK_NB_ALL_REV,
187 .quirk = nb_5500_no_ir_rev13,
188 .descr = "5500 E47, E53" /* interrupt remapping does not work */
189 },
190 {
191 .dev_id = 0x3405, .rev_no = QUIRK_NB_ALL_REV,
192 .quirk = nb_5500_no_ir_rev13,
193 .descr = "5500 E47, E53" /* interrupt remapping does not work */
194 },
195 {
196 .dev_id = 0x3405, .rev_no = 0x22,
197 .quirk = nb_no_ir,
198 .descr = "5500 E47, E53" /* interrupt remapping does not work */
199 },
200 {
201 .dev_id = 0x3406, .rev_no = QUIRK_NB_ALL_REV,
202 .quirk = nb_5500_no_ir_rev13,
203 .descr = "5500 E47, E53" /* interrupt remapping does not work */
204 },
205 };
206
207 static void
208 cpu_e5_am9(struct dmar_unit *unit)
209 {
210
211 unit->hw_cap &= ~(0x3fULL << 48);
212 unit->hw_cap |= (9ULL << 48);
213 }
214
215 static const struct intel_dmar_quirk_cpu post_ident_cpu[] = {
216 {
217 .ext_family = 0, .ext_model = 2, .family_code = 6, .model = 13,
218 .stepping = 6, .quirk = cpu_e5_am9,
219 .descr = "E5 BT176" /* AM should be at most 9 */
220 },
221 };
222
223 void
224 dmar_quirks_pre_use(struct iommu_unit *unit)
225 {
226 struct dmar_unit *dmar;
227
228 dmar = IOMMU2DMAR(unit);
229
230 if (!dmar_barrier_enter(dmar, DMAR_BARRIER_USEQ))
231 return;
232 DMAR_LOCK(dmar);
233 dmar_match_quirks(dmar, pre_use_nb, nitems(pre_use_nb),
234 NULL, 0);
235 dmar_barrier_exit(dmar, DMAR_BARRIER_USEQ);
236 }
237
238 void
239 dmar_quirks_post_ident(struct dmar_unit *dmar)
240 {
241
242 dmar_match_quirks(dmar, NULL, 0, post_ident_cpu,
243 nitems(post_ident_cpu));
244 }
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