FreeBSD/Linux Kernel Cross Reference
sys/x86/isa/clock.c
1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (c) 1990 The Regents of the University of California.
5 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org>
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * William Jolitz and Don Ahn.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. Neither the name of the University nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91
36 */
37
38 #include <sys/cdefs.h>
39 __FBSDID("$FreeBSD$");
40
41 /*
42 * Routines to handle clock hardware.
43 */
44
45 #ifdef __amd64__
46 #define DEV_APIC
47 #else
48 #include "opt_apic.h"
49 #endif
50 #include "opt_clock.h"
51 #include "opt_isa.h"
52
53 #include <sys/param.h>
54 #include <sys/systm.h>
55 #include <sys/bus.h>
56 #include <sys/lock.h>
57 #include <sys/kdb.h>
58 #include <sys/mutex.h>
59 #include <sys/proc.h>
60 #include <sys/kernel.h>
61 #include <sys/module.h>
62 #include <sys/rman.h>
63 #include <sys/sched.h>
64 #include <sys/smp.h>
65 #include <sys/sysctl.h>
66 #include <sys/timeet.h>
67 #include <sys/timetc.h>
68
69 #include <machine/clock.h>
70 #include <machine/cpu.h>
71 #include <machine/intr_machdep.h>
72 #include <machine/ppireg.h>
73 #include <machine/timerreg.h>
74 #include <x86/apicvar.h>
75 #include <x86/init.h>
76
77 #include <isa/rtc.h>
78 #ifdef DEV_ISA
79 #include <isa/isareg.h>
80 #include <isa/isavar.h>
81 #endif
82
83 int clkintr_pending;
84 #ifndef TIMER_FREQ
85 #define TIMER_FREQ 1193182
86 #endif
87 u_int i8254_freq = TIMER_FREQ;
88 TUNABLE_INT("hw.i8254.freq", &i8254_freq);
89 int i8254_max_count;
90 static int i8254_timecounter = 1;
91
92 static struct mtx clock_lock;
93 static struct intsrc *i8254_intsrc;
94 static uint16_t i8254_lastcount;
95 static uint16_t i8254_offset;
96 static int (*i8254_pending)(struct intsrc *);
97 static int i8254_ticked;
98
99 struct attimer_softc {
100 int intr_en;
101 int port_rid, intr_rid;
102 struct resource *port_res;
103 struct resource *intr_res;
104 void *intr_handler;
105 struct timecounter tc;
106 struct eventtimer et;
107 int mode;
108 #define MODE_STOP 0
109 #define MODE_PERIODIC 1
110 #define MODE_ONESHOT 2
111 uint32_t period;
112 };
113 static struct attimer_softc *attimer_sc = NULL;
114
115 static int timer0_period = -2;
116 static int timer0_mode = 0xffff;
117 static int timer0_last = 0xffff;
118
119 /* Values for timerX_state: */
120 #define RELEASED 0
121 #define RELEASE_PENDING 1
122 #define ACQUIRED 2
123 #define ACQUIRE_PENDING 3
124
125 static u_char timer2_state;
126
127 static unsigned i8254_get_timecount(struct timecounter *tc);
128 static void set_i8254_freq(int mode, uint32_t period);
129
130 void
131 clock_init(void)
132 {
133 /* Init the clock lock */
134 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE);
135 /* Init the clock in order to use DELAY */
136 init_ops.early_clock_source_init();
137 tsc_init();
138 }
139
140 static int
141 clkintr(void *arg)
142 {
143 struct attimer_softc *sc = (struct attimer_softc *)arg;
144
145 if (i8254_timecounter && sc->period != 0) {
146 mtx_lock_spin(&clock_lock);
147 if (i8254_ticked)
148 i8254_ticked = 0;
149 else {
150 i8254_offset += i8254_max_count;
151 i8254_lastcount = 0;
152 }
153 clkintr_pending = 0;
154 mtx_unlock_spin(&clock_lock);
155 }
156
157 if (sc->et.et_active && sc->mode != MODE_STOP)
158 sc->et.et_event_cb(&sc->et, sc->et.et_arg);
159
160 return (FILTER_HANDLED);
161 }
162
163 int
164 timer_spkr_acquire(void)
165 {
166 int mode;
167
168 mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT;
169
170 if (timer2_state != RELEASED)
171 return (-1);
172 timer2_state = ACQUIRED;
173
174 /*
175 * This access to the timer registers is as atomic as possible
176 * because it is a single instruction. We could do better if we
177 * knew the rate. Use of splclock() limits glitches to 10-100us,
178 * and this is probably good enough for timer2, so we aren't as
179 * careful with it as with timer0.
180 */
181 outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
182
183 ppi_spkr_on(); /* enable counter2 output to speaker */
184 return (0);
185 }
186
187 int
188 timer_spkr_release(void)
189 {
190
191 if (timer2_state != ACQUIRED)
192 return (-1);
193 timer2_state = RELEASED;
194 outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
195
196 ppi_spkr_off(); /* disable counter2 output to speaker */
197 return (0);
198 }
199
200 void
201 timer_spkr_setfreq(int freq)
202 {
203
204 freq = i8254_freq / freq;
205 mtx_lock_spin(&clock_lock);
206 outb(TIMER_CNTR2, freq & 0xff);
207 outb(TIMER_CNTR2, freq >> 8);
208 mtx_unlock_spin(&clock_lock);
209 }
210
211 static int
212 getit(void)
213 {
214 int high, low;
215
216 mtx_lock_spin(&clock_lock);
217
218 /* Select timer0 and latch counter value. */
219 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
220
221 low = inb(TIMER_CNTR0);
222 high = inb(TIMER_CNTR0);
223
224 mtx_unlock_spin(&clock_lock);
225 return ((high << 8) | low);
226 }
227
228 /*
229 * Wait "n" microseconds.
230 * Relies on timer 1 counting down from (i8254_freq / hz)
231 * Note: timer had better have been programmed before this is first used!
232 */
233 void
234 i8254_delay(int n)
235 {
236 int delta, prev_tick, tick, ticks_left;
237 #ifdef DELAYDEBUG
238 int getit_calls = 1;
239 int n1;
240 static int state = 0;
241
242 if (state == 0) {
243 state = 1;
244 for (n1 = 1; n1 <= 10000000; n1 *= 10)
245 DELAY(n1);
246 state = 2;
247 }
248 if (state == 1)
249 printf("DELAY(%d)...", n);
250 #endif
251 /*
252 * Read the counter first, so that the rest of the setup overhead is
253 * counted. Guess the initial overhead is 20 usec (on most systems it
254 * takes about 1.5 usec for each of the i/o's in getit(). The loop
255 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The
256 * multiplications and divisions to scale the count take a while).
257 *
258 * However, if ddb is active then use a fake counter since reading
259 * the i8254 counter involves acquiring a lock. ddb must not do
260 * locking for many reasons, but it calls here for at least atkbd
261 * input.
262 */
263 #ifdef KDB
264 if (kdb_active)
265 prev_tick = 1;
266 else
267 #endif
268 prev_tick = getit();
269 n -= 0; /* XXX actually guess no initial overhead */
270 /*
271 * Calculate (n * (i8254_freq / 1e6)) without using floating point
272 * and without any avoidable overflows.
273 */
274 if (n <= 0)
275 ticks_left = 0;
276 else if (n < 256)
277 /*
278 * Use fixed point to avoid a slow division by 1000000.
279 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest.
280 * 2^15 is the first power of 2 that gives exact results
281 * for n between 0 and 256.
282 */
283 ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15;
284 else
285 /*
286 * Don't bother using fixed point, although gcc-2.7.2
287 * generates particularly poor code for the long long
288 * division, since even the slow way will complete long
289 * before the delay is up (unless we're interrupted).
290 */
291 ticks_left = ((u_int)n * (long long)i8254_freq + 999999)
292 / 1000000;
293
294 while (ticks_left > 0) {
295 #ifdef KDB
296 if (kdb_active) {
297 inb(0x84);
298 tick = prev_tick - 1;
299 if (tick <= 0)
300 tick = i8254_max_count;
301 } else
302 #endif
303 tick = getit();
304 #ifdef DELAYDEBUG
305 ++getit_calls;
306 #endif
307 delta = prev_tick - tick;
308 prev_tick = tick;
309 if (delta < 0) {
310 delta += i8254_max_count;
311 /*
312 * Guard against i8254_max_count being wrong.
313 * This shouldn't happen in normal operation,
314 * but it may happen if set_i8254_freq() is
315 * traced.
316 */
317 if (delta < 0)
318 delta = 0;
319 }
320 ticks_left -= delta;
321 }
322 #ifdef DELAYDEBUG
323 if (state == 1)
324 printf(" %d calls to getit() at %d usec each\n",
325 getit_calls, (n + 5) / getit_calls);
326 #endif
327 }
328
329 static void
330 set_i8254_freq(int mode, uint32_t period)
331 {
332 int new_count, new_mode;
333
334 mtx_lock_spin(&clock_lock);
335 if (mode == MODE_STOP) {
336 if (i8254_timecounter) {
337 mode = MODE_PERIODIC;
338 new_count = 0x10000;
339 } else
340 new_count = -1;
341 } else {
342 new_count = min(((uint64_t)i8254_freq * period +
343 0x80000000LLU) >> 32, 0x10000);
344 }
345 if (new_count == timer0_period)
346 goto out;
347 i8254_max_count = ((new_count & ~0xffff) != 0) ? 0xffff : new_count;
348 timer0_period = (mode == MODE_PERIODIC) ? new_count : -1;
349 switch (mode) {
350 case MODE_STOP:
351 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT;
352 outb(TIMER_MODE, new_mode);
353 outb(TIMER_CNTR0, 0);
354 outb(TIMER_CNTR0, 0);
355 break;
356 case MODE_PERIODIC:
357 new_mode = TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT;
358 outb(TIMER_MODE, new_mode);
359 outb(TIMER_CNTR0, new_count & 0xff);
360 outb(TIMER_CNTR0, new_count >> 8);
361 break;
362 case MODE_ONESHOT:
363 if (new_count < 256 && timer0_last < 256) {
364 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_LSB;
365 if (new_mode != timer0_mode)
366 outb(TIMER_MODE, new_mode);
367 outb(TIMER_CNTR0, new_count & 0xff);
368 break;
369 }
370 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT;
371 if (new_mode != timer0_mode)
372 outb(TIMER_MODE, new_mode);
373 outb(TIMER_CNTR0, new_count & 0xff);
374 outb(TIMER_CNTR0, new_count >> 8);
375 break;
376 default:
377 panic("set_i8254_freq: unknown operational mode");
378 }
379 timer0_mode = new_mode;
380 timer0_last = new_count;
381 out:
382 mtx_unlock_spin(&clock_lock);
383 }
384
385 static void
386 i8254_restore(void)
387 {
388
389 timer0_period = -2;
390 timer0_mode = 0xffff;
391 timer0_last = 0xffff;
392 if (attimer_sc != NULL)
393 set_i8254_freq(attimer_sc->mode, attimer_sc->period);
394 else
395 set_i8254_freq(MODE_STOP, 0);
396 }
397
398 /* This is separate from startrtclock() so that it can be called early. */
399 void
400 i8254_init(void)
401 {
402
403 set_i8254_freq(MODE_STOP, 0);
404 }
405
406 void
407 startrtclock(void)
408 {
409
410 start_TSC();
411 }
412
413 void
414 cpu_initclocks(void)
415 {
416 #ifdef EARLY_AP_STARTUP
417 struct thread *td;
418 int i;
419
420 td = curthread;
421
422 tsc_calibrate();
423 #ifdef DEV_APIC
424 lapic_calibrate_timer();
425 #endif
426 cpu_initclocks_bsp();
427 CPU_FOREACH(i) {
428 if (i == 0)
429 continue;
430 thread_lock(td);
431 sched_bind(td, i);
432 thread_unlock(td);
433 cpu_initclocks_ap();
434 }
435 thread_lock(td);
436 if (sched_is_bound(td))
437 sched_unbind(td);
438 thread_unlock(td);
439 #else
440 tsc_calibrate();
441 #ifdef DEV_APIC
442 lapic_calibrate_timer();
443 #endif
444 cpu_initclocks_bsp();
445 #endif
446 }
447
448 static int
449 sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
450 {
451 int error;
452 u_int freq;
453
454 /*
455 * Use `i8254' instead of `timer' in external names because `timer'
456 * is too generic. Should use it everywhere.
457 */
458 freq = i8254_freq;
459 error = sysctl_handle_int(oidp, &freq, 0, req);
460 if (error == 0 && req->newptr != NULL) {
461 i8254_freq = freq;
462 if (attimer_sc != NULL) {
463 set_i8254_freq(attimer_sc->mode, attimer_sc->period);
464 attimer_sc->tc.tc_frequency = freq;
465 } else {
466 set_i8254_freq(MODE_STOP, 0);
467 }
468 }
469 return (error);
470 }
471
472 SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq,
473 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE,
474 0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU",
475 "i8254 timer frequency");
476
477 static unsigned
478 i8254_get_timecount(struct timecounter *tc)
479 {
480 device_t dev = (device_t)tc->tc_priv;
481 struct attimer_softc *sc = device_get_softc(dev);
482 register_t flags;
483 uint16_t count;
484 u_int high, low;
485
486 if (sc->period == 0)
487 return (i8254_max_count - getit());
488
489 #ifdef __amd64__
490 flags = read_rflags();
491 #else
492 flags = read_eflags();
493 #endif
494 mtx_lock_spin(&clock_lock);
495
496 /* Select timer0 and latch counter value. */
497 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
498
499 low = inb(TIMER_CNTR0);
500 high = inb(TIMER_CNTR0);
501 count = i8254_max_count - ((high << 8) | low);
502 if (count < i8254_lastcount ||
503 (!i8254_ticked && (clkintr_pending ||
504 ((count < 20 || (!(flags & PSL_I) &&
505 count < i8254_max_count / 2u)) &&
506 i8254_pending != NULL && i8254_pending(i8254_intsrc))))) {
507 i8254_ticked = 1;
508 i8254_offset += i8254_max_count;
509 }
510 i8254_lastcount = count;
511 count += i8254_offset;
512 mtx_unlock_spin(&clock_lock);
513 return (count);
514 }
515
516 static int
517 attimer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
518 {
519 device_t dev = (device_t)et->et_priv;
520 struct attimer_softc *sc = device_get_softc(dev);
521
522 if (period != 0) {
523 sc->mode = MODE_PERIODIC;
524 sc->period = period;
525 } else {
526 sc->mode = MODE_ONESHOT;
527 sc->period = first;
528 }
529 if (!sc->intr_en) {
530 i8254_intsrc->is_pic->pic_enable_source(i8254_intsrc);
531 sc->intr_en = 1;
532 }
533 set_i8254_freq(sc->mode, sc->period);
534 return (0);
535 }
536
537 static int
538 attimer_stop(struct eventtimer *et)
539 {
540 device_t dev = (device_t)et->et_priv;
541 struct attimer_softc *sc = device_get_softc(dev);
542
543 sc->mode = MODE_STOP;
544 sc->period = 0;
545 set_i8254_freq(sc->mode, sc->period);
546 return (0);
547 }
548
549 #ifdef DEV_ISA
550 /*
551 * Attach to the ISA PnP descriptors for the timer
552 */
553 static struct isa_pnp_id attimer_ids[] = {
554 { 0x0001d041 /* PNP0100 */, "AT timer" },
555 { 0 }
556 };
557
558 static int
559 attimer_probe(device_t dev)
560 {
561 int result;
562
563 result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids);
564 /* ENOENT means no PnP-ID, device is hinted. */
565 if (result == ENOENT) {
566 device_set_desc(dev, "AT timer");
567 return (BUS_PROBE_LOW_PRIORITY);
568 }
569 return (result);
570 }
571
572 static int
573 attimer_attach(device_t dev)
574 {
575 struct attimer_softc *sc;
576 rman_res_t s;
577 int i;
578
579 attimer_sc = sc = device_get_softc(dev);
580 bzero(sc, sizeof(struct attimer_softc));
581 if (!(sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT,
582 &sc->port_rid, IO_TIMER1, IO_TIMER1 + 3, 4, RF_ACTIVE)))
583 device_printf(dev,"Warning: Couldn't map I/O.\n");
584 i8254_intsrc = intr_lookup_source(0);
585 if (i8254_intsrc != NULL)
586 i8254_pending = i8254_intsrc->is_pic->pic_source_pending;
587 resource_int_value(device_get_name(dev), device_get_unit(dev),
588 "timecounter", &i8254_timecounter);
589 set_i8254_freq(MODE_STOP, 0);
590 if (i8254_timecounter) {
591 sc->tc.tc_get_timecount = i8254_get_timecount;
592 sc->tc.tc_counter_mask = 0xffff;
593 sc->tc.tc_frequency = i8254_freq;
594 sc->tc.tc_name = "i8254";
595 sc->tc.tc_quality = 0;
596 sc->tc.tc_priv = dev;
597 tc_init(&sc->tc);
598 }
599 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
600 "clock", &i) != 0 || i != 0) {
601 sc->intr_rid = 0;
602 while (bus_get_resource(dev, SYS_RES_IRQ, sc->intr_rid,
603 &s, NULL) == 0 && s != 0)
604 sc->intr_rid++;
605 if (!(sc->intr_res = bus_alloc_resource(dev, SYS_RES_IRQ,
606 &sc->intr_rid, 0, 0, 1, RF_ACTIVE))) {
607 device_printf(dev,"Can't map interrupt.\n");
608 return (0);
609 }
610 /* Dirty hack, to make bus_setup_intr to not enable source. */
611 i8254_intsrc->is_handlers++;
612 if ((bus_setup_intr(dev, sc->intr_res,
613 INTR_MPSAFE | INTR_TYPE_CLK,
614 (driver_filter_t *)clkintr, NULL,
615 sc, &sc->intr_handler))) {
616 device_printf(dev, "Can't setup interrupt.\n");
617 i8254_intsrc->is_handlers--;
618 return (0);
619 }
620 i8254_intsrc->is_handlers--;
621 i8254_intsrc->is_pic->pic_enable_intr(i8254_intsrc);
622 sc->et.et_name = "i8254";
623 sc->et.et_flags = ET_FLAGS_PERIODIC;
624 if (!i8254_timecounter)
625 sc->et.et_flags |= ET_FLAGS_ONESHOT;
626 sc->et.et_quality = 100;
627 sc->et.et_frequency = i8254_freq;
628 sc->et.et_min_period = (0x0002LLU << 32) / i8254_freq;
629 sc->et.et_max_period = (0xfffeLLU << 32) / i8254_freq;
630 sc->et.et_start = attimer_start;
631 sc->et.et_stop = attimer_stop;
632 sc->et.et_priv = dev;
633 et_register(&sc->et);
634 }
635 return(0);
636 }
637
638 static int
639 attimer_resume(device_t dev)
640 {
641
642 i8254_restore();
643 return (0);
644 }
645
646 static device_method_t attimer_methods[] = {
647 /* Device interface */
648 DEVMETHOD(device_probe, attimer_probe),
649 DEVMETHOD(device_attach, attimer_attach),
650 DEVMETHOD(device_detach, bus_generic_detach),
651 DEVMETHOD(device_shutdown, bus_generic_shutdown),
652 DEVMETHOD(device_suspend, bus_generic_suspend),
653 DEVMETHOD(device_resume, attimer_resume),
654 { 0, 0 }
655 };
656
657 static driver_t attimer_driver = {
658 "attimer",
659 attimer_methods,
660 sizeof(struct attimer_softc),
661 };
662
663 DRIVER_MODULE(attimer, isa, attimer_driver, 0, 0);
664 DRIVER_MODULE(attimer, acpi, attimer_driver, 0, 0);
665 ISA_PNP_INFO(attimer_ids);
666
667 #endif /* DEV_ISA */
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