FreeBSD/Linux Kernel Cross Reference
sys/x86/isa/clock.c
1 /*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org>
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz and Don Ahn.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91
34 */
35
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD: releng/11.2/sys/x86/isa/clock.c 331722 2018-03-29 02:50:57Z eadler $");
38
39 /*
40 * Routines to handle clock hardware.
41 */
42
43 #include "opt_clock.h"
44 #include "opt_isa.h"
45 #include "opt_mca.h"
46
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/bus.h>
50 #include <sys/lock.h>
51 #include <sys/kdb.h>
52 #include <sys/mutex.h>
53 #include <sys/proc.h>
54 #include <sys/kernel.h>
55 #include <sys/module.h>
56 #include <sys/rman.h>
57 #include <sys/sched.h>
58 #include <sys/smp.h>
59 #include <sys/sysctl.h>
60 #include <sys/timeet.h>
61 #include <sys/timetc.h>
62
63 #include <machine/clock.h>
64 #include <machine/cpu.h>
65 #include <machine/intr_machdep.h>
66 #include <machine/ppireg.h>
67 #include <machine/timerreg.h>
68 #include <x86/init.h>
69
70 #ifdef PC98
71 #include <pc98/pc98/pc98_machdep.h>
72 #else
73 #include <isa/rtc.h>
74 #endif
75 #ifdef DEV_ISA
76 #ifdef PC98
77 #include <pc98/cbus/cbus.h>
78 #else
79 #include <isa/isareg.h>
80 #endif
81 #include <isa/isavar.h>
82 #endif
83
84 #ifdef DEV_MCA
85 #include <i386/bios/mca_machdep.h>
86 #endif
87
88 int clkintr_pending;
89 #ifndef TIMER_FREQ
90 #ifdef PC98
91 #define TIMER_FREQ 2457600
92 #else
93 #define TIMER_FREQ 1193182
94 #endif
95 #endif
96 u_int i8254_freq = TIMER_FREQ;
97 TUNABLE_INT("hw.i8254.freq", &i8254_freq);
98 int i8254_max_count;
99 static int i8254_timecounter = 1;
100
101 static struct mtx clock_lock;
102 static struct intsrc *i8254_intsrc;
103 static uint16_t i8254_lastcount;
104 static uint16_t i8254_offset;
105 static int (*i8254_pending)(struct intsrc *);
106 static int i8254_ticked;
107
108 struct attimer_softc {
109 int intr_en;
110 int port_rid, intr_rid;
111 struct resource *port_res;
112 struct resource *intr_res;
113 #ifdef PC98
114 int port_rid2;
115 struct resource *port_res2;
116 #endif
117 void *intr_handler;
118 struct timecounter tc;
119 struct eventtimer et;
120 int mode;
121 #define MODE_STOP 0
122 #define MODE_PERIODIC 1
123 #define MODE_ONESHOT 2
124 uint32_t period;
125 };
126 static struct attimer_softc *attimer_sc = NULL;
127
128 static int timer0_period = -2;
129 static int timer0_mode = 0xffff;
130 static int timer0_last = 0xffff;
131
132 /* Values for timerX_state: */
133 #define RELEASED 0
134 #define RELEASE_PENDING 1
135 #define ACQUIRED 2
136 #define ACQUIRE_PENDING 3
137
138 static u_char timer2_state;
139
140 static unsigned i8254_get_timecount(struct timecounter *tc);
141 static void set_i8254_freq(int mode, uint32_t period);
142
143 void
144 clock_init(void)
145 {
146 /* Init the clock lock */
147 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE);
148 /* Init the clock in order to use DELAY */
149 init_ops.early_clock_source_init();
150 }
151
152 static int
153 clkintr(void *arg)
154 {
155 struct attimer_softc *sc = (struct attimer_softc *)arg;
156
157 if (i8254_timecounter && sc->period != 0) {
158 mtx_lock_spin(&clock_lock);
159 if (i8254_ticked)
160 i8254_ticked = 0;
161 else {
162 i8254_offset += i8254_max_count;
163 i8254_lastcount = 0;
164 }
165 clkintr_pending = 0;
166 mtx_unlock_spin(&clock_lock);
167 }
168
169 if (sc->et.et_active && sc->mode != MODE_STOP)
170 sc->et.et_event_cb(&sc->et, sc->et.et_arg);
171
172 #ifdef DEV_MCA
173 /* Reset clock interrupt by asserting bit 7 of port 0x61 */
174 if (MCA_system)
175 outb(0x61, inb(0x61) | 0x80);
176 #endif
177 return (FILTER_HANDLED);
178 }
179
180 int
181 timer_spkr_acquire(void)
182 {
183 int mode;
184
185 #ifdef PC98
186 mode = TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT;
187 #else
188 mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT;
189 #endif
190
191 if (timer2_state != RELEASED)
192 return (-1);
193 timer2_state = ACQUIRED;
194
195 /*
196 * This access to the timer registers is as atomic as possible
197 * because it is a single instruction. We could do better if we
198 * knew the rate. Use of splclock() limits glitches to 10-100us,
199 * and this is probably good enough for timer2, so we aren't as
200 * careful with it as with timer0.
201 */
202 #ifdef PC98
203 outb(TIMER_MODE, TIMER_SEL1 | (mode & 0x3f));
204 #else
205 outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
206 #endif
207 ppi_spkr_on(); /* enable counter2 output to speaker */
208 return (0);
209 }
210
211 int
212 timer_spkr_release(void)
213 {
214
215 if (timer2_state != ACQUIRED)
216 return (-1);
217 timer2_state = RELEASED;
218 #ifdef PC98
219 outb(TIMER_MODE, TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT);
220 #else
221 outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
222 #endif
223 ppi_spkr_off(); /* disable counter2 output to speaker */
224 return (0);
225 }
226
227 void
228 timer_spkr_setfreq(int freq)
229 {
230
231 freq = i8254_freq / freq;
232 mtx_lock_spin(&clock_lock);
233 #ifdef PC98
234 outb(TIMER_CNTR1, freq & 0xff);
235 outb(TIMER_CNTR1, freq >> 8);
236 #else
237 outb(TIMER_CNTR2, freq & 0xff);
238 outb(TIMER_CNTR2, freq >> 8);
239 #endif
240 mtx_unlock_spin(&clock_lock);
241 }
242
243 static int
244 getit(void)
245 {
246 int high, low;
247
248 mtx_lock_spin(&clock_lock);
249
250 /* Select timer0 and latch counter value. */
251 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
252
253 low = inb(TIMER_CNTR0);
254 high = inb(TIMER_CNTR0);
255
256 mtx_unlock_spin(&clock_lock);
257 return ((high << 8) | low);
258 }
259
260 /*
261 * Wait "n" microseconds.
262 * Relies on timer 1 counting down from (i8254_freq / hz)
263 * Note: timer had better have been programmed before this is first used!
264 */
265 void
266 i8254_delay(int n)
267 {
268 int delta, prev_tick, tick, ticks_left;
269 #ifdef DELAYDEBUG
270 int getit_calls = 1;
271 int n1;
272 static int state = 0;
273
274 if (state == 0) {
275 state = 1;
276 for (n1 = 1; n1 <= 10000000; n1 *= 10)
277 DELAY(n1);
278 state = 2;
279 }
280 if (state == 1)
281 printf("DELAY(%d)...", n);
282 #endif
283 /*
284 * Read the counter first, so that the rest of the setup overhead is
285 * counted. Guess the initial overhead is 20 usec (on most systems it
286 * takes about 1.5 usec for each of the i/o's in getit(). The loop
287 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The
288 * multiplications and divisions to scale the count take a while).
289 *
290 * However, if ddb is active then use a fake counter since reading
291 * the i8254 counter involves acquiring a lock. ddb must not do
292 * locking for many reasons, but it calls here for at least atkbd
293 * input.
294 */
295 #ifdef KDB
296 if (kdb_active)
297 prev_tick = 1;
298 else
299 #endif
300 prev_tick = getit();
301 n -= 0; /* XXX actually guess no initial overhead */
302 /*
303 * Calculate (n * (i8254_freq / 1e6)) without using floating point
304 * and without any avoidable overflows.
305 */
306 if (n <= 0)
307 ticks_left = 0;
308 else if (n < 256)
309 /*
310 * Use fixed point to avoid a slow division by 1000000.
311 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest.
312 * 2^15 is the first power of 2 that gives exact results
313 * for n between 0 and 256.
314 */
315 ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15;
316 else
317 /*
318 * Don't bother using fixed point, although gcc-2.7.2
319 * generates particularly poor code for the long long
320 * division, since even the slow way will complete long
321 * before the delay is up (unless we're interrupted).
322 */
323 ticks_left = ((u_int)n * (long long)i8254_freq + 999999)
324 / 1000000;
325
326 while (ticks_left > 0) {
327 #ifdef KDB
328 if (kdb_active) {
329 #ifdef PC98
330 outb(0x5f, 0);
331 #else
332 inb(0x84);
333 #endif
334 tick = prev_tick - 1;
335 if (tick <= 0)
336 tick = i8254_max_count;
337 } else
338 #endif
339 tick = getit();
340 #ifdef DELAYDEBUG
341 ++getit_calls;
342 #endif
343 delta = prev_tick - tick;
344 prev_tick = tick;
345 if (delta < 0) {
346 delta += i8254_max_count;
347 /*
348 * Guard against i8254_max_count being wrong.
349 * This shouldn't happen in normal operation,
350 * but it may happen if set_i8254_freq() is
351 * traced.
352 */
353 if (delta < 0)
354 delta = 0;
355 }
356 ticks_left -= delta;
357 }
358 #ifdef DELAYDEBUG
359 if (state == 1)
360 printf(" %d calls to getit() at %d usec each\n",
361 getit_calls, (n + 5) / getit_calls);
362 #endif
363 }
364
365 static void
366 set_i8254_freq(int mode, uint32_t period)
367 {
368 int new_count, new_mode;
369
370 mtx_lock_spin(&clock_lock);
371 if (mode == MODE_STOP) {
372 if (i8254_timecounter) {
373 mode = MODE_PERIODIC;
374 new_count = 0x10000;
375 } else
376 new_count = -1;
377 } else {
378 new_count = min(((uint64_t)i8254_freq * period +
379 0x80000000LLU) >> 32, 0x10000);
380 }
381 if (new_count == timer0_period)
382 goto out;
383 i8254_max_count = ((new_count & ~0xffff) != 0) ? 0xffff : new_count;
384 timer0_period = (mode == MODE_PERIODIC) ? new_count : -1;
385 switch (mode) {
386 case MODE_STOP:
387 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT;
388 outb(TIMER_MODE, new_mode);
389 outb(TIMER_CNTR0, 0);
390 outb(TIMER_CNTR0, 0);
391 break;
392 case MODE_PERIODIC:
393 new_mode = TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT;
394 outb(TIMER_MODE, new_mode);
395 outb(TIMER_CNTR0, new_count & 0xff);
396 outb(TIMER_CNTR0, new_count >> 8);
397 break;
398 case MODE_ONESHOT:
399 if (new_count < 256 && timer0_last < 256) {
400 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_LSB;
401 if (new_mode != timer0_mode)
402 outb(TIMER_MODE, new_mode);
403 outb(TIMER_CNTR0, new_count & 0xff);
404 break;
405 }
406 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT;
407 if (new_mode != timer0_mode)
408 outb(TIMER_MODE, new_mode);
409 outb(TIMER_CNTR0, new_count & 0xff);
410 outb(TIMER_CNTR0, new_count >> 8);
411 break;
412 default:
413 panic("set_i8254_freq: unknown operational mode");
414 }
415 timer0_mode = new_mode;
416 timer0_last = new_count;
417 out:
418 mtx_unlock_spin(&clock_lock);
419 }
420
421 static void
422 i8254_restore(void)
423 {
424
425 timer0_period = -2;
426 timer0_mode = 0xffff;
427 timer0_last = 0xffff;
428 if (attimer_sc != NULL)
429 set_i8254_freq(attimer_sc->mode, attimer_sc->period);
430 else
431 set_i8254_freq(MODE_STOP, 0);
432 }
433
434 #ifndef __amd64__
435 /*
436 * Restore all the timers non-atomically (XXX: should be atomically).
437 *
438 * This function is called from pmtimer_resume() to restore all the timers.
439 * This should not be necessary, but there are broken laptops that do not
440 * restore all the timers on resume. The APM spec was at best vague on the
441 * subject.
442 * pmtimer is used only with the old APM power management, and not with
443 * acpi, which is required for amd64, so skip it in that case.
444 */
445 void
446 timer_restore(void)
447 {
448
449 i8254_restore(); /* restore i8254_freq and hz */
450 #ifndef PC98
451 atrtc_restore(); /* reenable RTC interrupts */
452 #endif
453 }
454 #endif
455
456 /* This is separate from startrtclock() so that it can be called early. */
457 void
458 i8254_init(void)
459 {
460
461 #ifdef PC98
462 if (pc98_machine_type & M_8M)
463 i8254_freq = 1996800L; /* 1.9968 MHz */
464 #endif
465 set_i8254_freq(MODE_STOP, 0);
466 }
467
468 void
469 startrtclock()
470 {
471
472 init_TSC();
473 }
474
475 void
476 cpu_initclocks(void)
477 {
478 #ifdef EARLY_AP_STARTUP
479 struct thread *td;
480 int i;
481
482 td = curthread;
483 cpu_initclocks_bsp();
484 CPU_FOREACH(i) {
485 if (i == 0)
486 continue;
487 thread_lock(td);
488 sched_bind(td, i);
489 thread_unlock(td);
490 cpu_initclocks_ap();
491 }
492 thread_lock(td);
493 if (sched_is_bound(td))
494 sched_unbind(td);
495 thread_unlock(td);
496 #else
497 cpu_initclocks_bsp();
498 #endif
499 }
500
501 static int
502 sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
503 {
504 int error;
505 u_int freq;
506
507 /*
508 * Use `i8254' instead of `timer' in external names because `timer'
509 * is too generic. Should use it everywhere.
510 */
511 freq = i8254_freq;
512 error = sysctl_handle_int(oidp, &freq, 0, req);
513 if (error == 0 && req->newptr != NULL) {
514 i8254_freq = freq;
515 if (attimer_sc != NULL) {
516 set_i8254_freq(attimer_sc->mode, attimer_sc->period);
517 attimer_sc->tc.tc_frequency = freq;
518 } else {
519 set_i8254_freq(MODE_STOP, 0);
520 }
521 }
522 return (error);
523 }
524
525 SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW,
526 0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU",
527 "i8254 timer frequency");
528
529 static unsigned
530 i8254_get_timecount(struct timecounter *tc)
531 {
532 device_t dev = (device_t)tc->tc_priv;
533 struct attimer_softc *sc = device_get_softc(dev);
534 register_t flags;
535 uint16_t count;
536 u_int high, low;
537
538 if (sc->period == 0)
539 return (i8254_max_count - getit());
540
541 #ifdef __amd64__
542 flags = read_rflags();
543 #else
544 flags = read_eflags();
545 #endif
546 mtx_lock_spin(&clock_lock);
547
548 /* Select timer0 and latch counter value. */
549 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
550
551 low = inb(TIMER_CNTR0);
552 high = inb(TIMER_CNTR0);
553 count = i8254_max_count - ((high << 8) | low);
554 if (count < i8254_lastcount ||
555 (!i8254_ticked && (clkintr_pending ||
556 ((count < 20 || (!(flags & PSL_I) &&
557 count < i8254_max_count / 2u)) &&
558 i8254_pending != NULL && i8254_pending(i8254_intsrc))))) {
559 i8254_ticked = 1;
560 i8254_offset += i8254_max_count;
561 }
562 i8254_lastcount = count;
563 count += i8254_offset;
564 mtx_unlock_spin(&clock_lock);
565 return (count);
566 }
567
568 static int
569 attimer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
570 {
571 device_t dev = (device_t)et->et_priv;
572 struct attimer_softc *sc = device_get_softc(dev);
573
574 if (period != 0) {
575 sc->mode = MODE_PERIODIC;
576 sc->period = period;
577 } else {
578 sc->mode = MODE_ONESHOT;
579 sc->period = first;
580 }
581 if (!sc->intr_en) {
582 i8254_intsrc->is_pic->pic_enable_source(i8254_intsrc);
583 sc->intr_en = 1;
584 }
585 set_i8254_freq(sc->mode, sc->period);
586 return (0);
587 }
588
589 static int
590 attimer_stop(struct eventtimer *et)
591 {
592 device_t dev = (device_t)et->et_priv;
593 struct attimer_softc *sc = device_get_softc(dev);
594
595 sc->mode = MODE_STOP;
596 sc->period = 0;
597 set_i8254_freq(sc->mode, sc->period);
598 return (0);
599 }
600
601 #ifdef DEV_ISA
602 /*
603 * Attach to the ISA PnP descriptors for the timer
604 */
605 static struct isa_pnp_id attimer_ids[] = {
606 { 0x0001d041 /* PNP0100 */, "AT timer" },
607 { 0 }
608 };
609
610 #ifdef PC98
611 static void
612 pc98_alloc_resource(device_t dev)
613 {
614 static bus_addr_t iat1[] = {0, 2, 4, 6};
615 static bus_addr_t iat2[] = {0, 4};
616 struct attimer_softc *sc;
617
618 sc = device_get_softc(dev);
619
620 sc->port_rid = 0;
621 bus_set_resource(dev, SYS_RES_IOPORT, sc->port_rid, IO_TIMER1, 1);
622 sc->port_res = isa_alloc_resourcev(dev, SYS_RES_IOPORT,
623 &sc->port_rid, iat1, 4, RF_ACTIVE);
624 if (sc->port_res == NULL)
625 device_printf(dev, "Warning: Couldn't map I/O.\n");
626 else
627 isa_load_resourcev(sc->port_res, iat1, 4);
628
629 sc->port_rid2 = 4;
630 bus_set_resource(dev, SYS_RES_IOPORT, sc->port_rid2, TIMER_CNTR1, 1);
631 sc->port_res2 = isa_alloc_resourcev(dev, SYS_RES_IOPORT,
632 &sc->port_rid2, iat2, 2, RF_ACTIVE);
633 if (sc->port_res2 == NULL)
634 device_printf(dev, "Warning: Couldn't map I/O.\n");
635 else
636 isa_load_resourcev(sc->port_res2, iat2, 2);
637 }
638
639 static void
640 pc98_release_resource(device_t dev)
641 {
642 struct attimer_softc *sc;
643
644 sc = device_get_softc(dev);
645
646 if (sc->port_res)
647 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid,
648 sc->port_res);
649 if (sc->port_res2)
650 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid2,
651 sc->port_res2);
652 }
653 #endif
654
655 static int
656 attimer_probe(device_t dev)
657 {
658 int result;
659
660 result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids);
661 /* ENOENT means no PnP-ID, device is hinted. */
662 if (result == ENOENT) {
663 device_set_desc(dev, "AT timer");
664 #ifdef PC98
665 /* To print resources correctly. */
666 pc98_alloc_resource(dev);
667 pc98_release_resource(dev);
668 #endif
669 return (BUS_PROBE_LOW_PRIORITY);
670 }
671 return (result);
672 }
673
674 static int
675 attimer_attach(device_t dev)
676 {
677 struct attimer_softc *sc;
678 rman_res_t s;
679 int i;
680
681 attimer_sc = sc = device_get_softc(dev);
682 bzero(sc, sizeof(struct attimer_softc));
683 #ifdef PC98
684 pc98_alloc_resource(dev);
685 #else
686 if (!(sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT,
687 &sc->port_rid, IO_TIMER1, IO_TIMER1 + 3, 4, RF_ACTIVE)))
688 device_printf(dev,"Warning: Couldn't map I/O.\n");
689 #endif
690 i8254_intsrc = intr_lookup_source(0);
691 if (i8254_intsrc != NULL)
692 i8254_pending = i8254_intsrc->is_pic->pic_source_pending;
693 resource_int_value(device_get_name(dev), device_get_unit(dev),
694 "timecounter", &i8254_timecounter);
695 set_i8254_freq(MODE_STOP, 0);
696 if (i8254_timecounter) {
697 sc->tc.tc_get_timecount = i8254_get_timecount;
698 sc->tc.tc_counter_mask = 0xffff;
699 sc->tc.tc_frequency = i8254_freq;
700 sc->tc.tc_name = "i8254";
701 sc->tc.tc_quality = 0;
702 sc->tc.tc_priv = dev;
703 tc_init(&sc->tc);
704 }
705 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
706 "clock", &i) != 0 || i != 0) {
707 sc->intr_rid = 0;
708 while (bus_get_resource(dev, SYS_RES_IRQ, sc->intr_rid,
709 &s, NULL) == 0 && s != 0)
710 sc->intr_rid++;
711 if (!(sc->intr_res = bus_alloc_resource(dev, SYS_RES_IRQ,
712 &sc->intr_rid, 0, 0, 1, RF_ACTIVE))) {
713 device_printf(dev,"Can't map interrupt.\n");
714 return (0);
715 }
716 /* Dirty hack, to make bus_setup_intr to not enable source. */
717 i8254_intsrc->is_handlers++;
718 if ((bus_setup_intr(dev, sc->intr_res,
719 INTR_MPSAFE | INTR_TYPE_CLK,
720 (driver_filter_t *)clkintr, NULL,
721 sc, &sc->intr_handler))) {
722 device_printf(dev, "Can't setup interrupt.\n");
723 i8254_intsrc->is_handlers--;
724 return (0);
725 }
726 i8254_intsrc->is_handlers--;
727 i8254_intsrc->is_pic->pic_enable_intr(i8254_intsrc);
728 sc->et.et_name = "i8254";
729 sc->et.et_flags = ET_FLAGS_PERIODIC;
730 if (!i8254_timecounter)
731 sc->et.et_flags |= ET_FLAGS_ONESHOT;
732 sc->et.et_quality = 100;
733 sc->et.et_frequency = i8254_freq;
734 sc->et.et_min_period = (0x0002LLU << 32) / i8254_freq;
735 sc->et.et_max_period = (0xfffeLLU << 32) / i8254_freq;
736 sc->et.et_start = attimer_start;
737 sc->et.et_stop = attimer_stop;
738 sc->et.et_priv = dev;
739 et_register(&sc->et);
740 }
741 return(0);
742 }
743
744 static int
745 attimer_resume(device_t dev)
746 {
747
748 i8254_restore();
749 return (0);
750 }
751
752 static device_method_t attimer_methods[] = {
753 /* Device interface */
754 DEVMETHOD(device_probe, attimer_probe),
755 DEVMETHOD(device_attach, attimer_attach),
756 DEVMETHOD(device_detach, bus_generic_detach),
757 DEVMETHOD(device_shutdown, bus_generic_shutdown),
758 DEVMETHOD(device_suspend, bus_generic_suspend),
759 DEVMETHOD(device_resume, attimer_resume),
760 { 0, 0 }
761 };
762
763 static driver_t attimer_driver = {
764 "attimer",
765 attimer_methods,
766 sizeof(struct attimer_softc),
767 };
768
769 static devclass_t attimer_devclass;
770
771 DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0);
772 DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0);
773
774 #endif /* DEV_ISA */
Cache object: 91c6b6a096c4563a9ba0d17282564d93
|