FreeBSD/Linux Kernel Cross Reference
sys/x86/isa/isa_dma.c
1 /*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
33 */
34
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD: releng/9.1/sys/x86/isa/isa_dma.c 233924 2012-04-05 16:05:35Z jhb $");
37
38 /*
39 * code to manage AT bus
40 *
41 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com):
42 * Fixed uninitialized variable problem and added code to deal
43 * with DMA page boundaries in isa_dmarangecheck(). Fixed word
44 * mode DMA count compution and reorganized DMA setup code in
45 * isa_dmastart()
46 */
47
48 #include <sys/param.h>
49 #include <sys/systm.h>
50 #include <sys/bus.h>
51 #include <sys/kernel.h>
52 #include <sys/malloc.h>
53 #include <sys/lock.h>
54 #include <sys/proc.h>
55 #include <sys/mutex.h>
56 #include <sys/module.h>
57 #include <vm/vm.h>
58 #include <vm/vm_param.h>
59 #include <vm/pmap.h>
60 #include <isa/isareg.h>
61 #include <isa/isavar.h>
62 #include <isa/isa_dmareg.h>
63
64 #define ISARAM_END RAM_END
65
66 static int isa_dmarangecheck(caddr_t va, u_int length, int chan);
67
68 static caddr_t dma_bouncebuf[8];
69 static u_int dma_bouncebufsize[8];
70 static u_int8_t dma_bounced = 0;
71 static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */
72 static u_int8_t dma_inuse = 0; /* User for acquire/release */
73 static u_int8_t dma_auto_mode = 0;
74 static struct mtx isa_dma_lock;
75 MTX_SYSINIT(isa_dma_lock, &isa_dma_lock, "isa DMA lock", MTX_DEF);
76
77 #define VALID_DMA_MASK (7)
78
79 /* high byte of address is stored in this port for i-th dma channel */
80 static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
81
82 /*
83 * Setup a DMA channel's bounce buffer.
84 */
85 int
86 isa_dma_init(int chan, u_int bouncebufsize, int flag)
87 {
88 void *buf;
89 int contig;
90
91 #ifdef DIAGNOSTIC
92 if (chan & ~VALID_DMA_MASK)
93 panic("isa_dma_init: channel out of range");
94 #endif
95
96
97 /* Try malloc() first. It works better if it works. */
98 buf = malloc(bouncebufsize, M_DEVBUF, flag);
99 if (buf != NULL) {
100 if (isa_dmarangecheck(buf, bouncebufsize, chan) != 0) {
101 free(buf, M_DEVBUF);
102 buf = NULL;
103 }
104 contig = 0;
105 }
106
107 if (buf == NULL) {
108 buf = contigmalloc(bouncebufsize, M_DEVBUF, flag, 0ul, 0xfffffful,
109 1ul, chan & 4 ? 0x20000ul : 0x10000ul);
110 contig = 1;
111 }
112
113 if (buf == NULL)
114 return (ENOMEM);
115
116 mtx_lock(&isa_dma_lock);
117 /*
118 * If a DMA channel is shared, both drivers have to call isa_dma_init
119 * since they don't know that the other driver will do it.
120 * Just return if we're already set up good.
121 * XXX: this only works if they agree on the bouncebuf size. This
122 * XXX: is typically the case since they are multiple instances of
123 * XXX: the same driver.
124 */
125 if (dma_bouncebuf[chan] != NULL) {
126 if (contig)
127 contigfree(buf, bouncebufsize, M_DEVBUF);
128 else
129 free(buf, M_DEVBUF);
130 mtx_unlock(&isa_dma_lock);
131 return (0);
132 }
133
134 dma_bouncebufsize[chan] = bouncebufsize;
135 dma_bouncebuf[chan] = buf;
136
137 mtx_unlock(&isa_dma_lock);
138
139 return (0);
140 }
141
142 /*
143 * Register a DMA channel's usage. Usually called from a device driver
144 * in open() or during its initialization.
145 */
146 int
147 isa_dma_acquire(chan)
148 int chan;
149 {
150 #ifdef DIAGNOSTIC
151 if (chan & ~VALID_DMA_MASK)
152 panic("isa_dma_acquire: channel out of range");
153 #endif
154
155 mtx_lock(&isa_dma_lock);
156 if (dma_inuse & (1 << chan)) {
157 printf("isa_dma_acquire: channel %d already in use\n", chan);
158 mtx_unlock(&isa_dma_lock);
159 return (EBUSY);
160 }
161 dma_inuse |= (1 << chan);
162 dma_auto_mode &= ~(1 << chan);
163 mtx_unlock(&isa_dma_lock);
164
165 return (0);
166 }
167
168 /*
169 * Unregister a DMA channel's usage. Usually called from a device driver
170 * during close() or during its shutdown.
171 */
172 void
173 isa_dma_release(chan)
174 int chan;
175 {
176 #ifdef DIAGNOSTIC
177 if (chan & ~VALID_DMA_MASK)
178 panic("isa_dma_release: channel out of range");
179
180 mtx_lock(&isa_dma_lock);
181 if ((dma_inuse & (1 << chan)) == 0)
182 printf("isa_dma_release: channel %d not in use\n", chan);
183 #else
184 mtx_lock(&isa_dma_lock);
185 #endif
186
187 if (dma_busy & (1 << chan)) {
188 dma_busy &= ~(1 << chan);
189 /*
190 * XXX We should also do "dma_bounced &= (1 << chan);"
191 * because we are acting on behalf of isa_dmadone() which
192 * was not called to end the last DMA operation. This does
193 * not matter now, but it may in the future.
194 */
195 }
196
197 dma_inuse &= ~(1 << chan);
198 dma_auto_mode &= ~(1 << chan);
199
200 mtx_unlock(&isa_dma_lock);
201 }
202
203 /*
204 * isa_dmacascade(): program 8237 DMA controller channel to accept
205 * external dma control by a board.
206 */
207 void
208 isa_dmacascade(chan)
209 int chan;
210 {
211 #ifdef DIAGNOSTIC
212 if (chan & ~VALID_DMA_MASK)
213 panic("isa_dmacascade: channel out of range");
214 #endif
215
216 mtx_lock(&isa_dma_lock);
217 /* set dma channel mode, and set dma channel mode */
218 if ((chan & 4) == 0) {
219 outb(DMA1_MODE, DMA37MD_CASCADE | chan);
220 outb(DMA1_SMSK, chan);
221 } else {
222 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
223 outb(DMA2_SMSK, chan & 3);
224 }
225 mtx_unlock(&isa_dma_lock);
226 }
227
228 /*
229 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
230 * problems by using a bounce buffer.
231 */
232 void
233 isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
234 {
235 vm_paddr_t phys;
236 int waport;
237 caddr_t newaddr;
238 int dma_range_checked;
239
240 dma_range_checked = isa_dmarangecheck(addr, nbytes, chan);
241
242 #ifdef DIAGNOSTIC
243 if (chan & ~VALID_DMA_MASK)
244 panic("isa_dmastart: channel out of range");
245
246 if ((chan < 4 && nbytes > (1<<16))
247 || (chan >= 4 && (nbytes > (1<<17) || (uintptr_t)addr & 1)))
248 panic("isa_dmastart: impossible request");
249
250 mtx_lock(&isa_dma_lock);
251 if ((dma_inuse & (1 << chan)) == 0)
252 printf("isa_dmastart: channel %d not acquired\n", chan);
253 #else
254 mtx_lock(&isa_dma_lock);
255 #endif
256
257 #if 0
258 /*
259 * XXX This should be checked, but drivers like ad1848 only call
260 * isa_dmastart() once because they use Auto DMA mode. If we
261 * leave this in, drivers that do this will print this continuously.
262 */
263 if (dma_busy & (1 << chan))
264 printf("isa_dmastart: channel %d busy\n", chan);
265 #endif
266
267 dma_busy |= (1 << chan);
268
269 if (dma_range_checked) {
270 if (dma_bouncebuf[chan] == NULL
271 || dma_bouncebufsize[chan] < nbytes)
272 panic("isa_dmastart: bad bounce buffer");
273 dma_bounced |= (1 << chan);
274 newaddr = dma_bouncebuf[chan];
275
276 /* copy bounce buffer on write */
277 if (!(flags & ISADMA_READ))
278 bcopy(addr, newaddr, nbytes);
279 addr = newaddr;
280 }
281
282 /* translate to physical */
283 phys = pmap_extract(kernel_pmap, (vm_offset_t)addr);
284
285 if (flags & ISADMA_RAW) {
286 dma_auto_mode |= (1 << chan);
287 } else {
288 dma_auto_mode &= ~(1 << chan);
289 }
290
291 if ((chan & 4) == 0) {
292 /*
293 * Program one of DMA channels 0..3. These are
294 * byte mode channels.
295 */
296 /* set dma channel mode, and reset address ff */
297
298 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
299 if (flags & ISADMA_RAW) {
300 if (flags & ISADMA_READ)
301 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
302 else
303 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
304 }
305 else
306 if (flags & ISADMA_READ)
307 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
308 else
309 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
310 outb(DMA1_FFC, 0);
311
312 /* send start address */
313 waport = DMA1_CHN(chan);
314 outb(waport, phys);
315 outb(waport, phys>>8);
316 outb(dmapageport[chan], phys>>16);
317
318 /* send count */
319 outb(waport + 1, --nbytes);
320 outb(waport + 1, nbytes>>8);
321
322 /* unmask channel */
323 outb(DMA1_SMSK, chan);
324 } else {
325 /*
326 * Program one of DMA channels 4..7. These are
327 * word mode channels.
328 */
329 /* set dma channel mode, and reset address ff */
330
331 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
332 if (flags & ISADMA_RAW) {
333 if (flags & ISADMA_READ)
334 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
335 else
336 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
337 }
338 else
339 if (flags & ISADMA_READ)
340 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
341 else
342 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
343 outb(DMA2_FFC, 0);
344
345 /* send start address */
346 waport = DMA2_CHN(chan - 4);
347 outb(waport, phys>>1);
348 outb(waport, phys>>9);
349 outb(dmapageport[chan], phys>>16);
350
351 /* send count */
352 nbytes >>= 1;
353 outb(waport + 2, --nbytes);
354 outb(waport + 2, nbytes>>8);
355
356 /* unmask channel */
357 outb(DMA2_SMSK, chan & 3);
358 }
359 mtx_unlock(&isa_dma_lock);
360 }
361
362 void
363 isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
364 {
365 #ifdef DIAGNOSTIC
366 if (chan & ~VALID_DMA_MASK)
367 panic("isa_dmadone: channel out of range");
368
369 if ((dma_inuse & (1 << chan)) == 0)
370 printf("isa_dmadone: channel %d not acquired\n", chan);
371 #endif
372
373 mtx_lock(&isa_dma_lock);
374 if (((dma_busy & (1 << chan)) == 0) &&
375 (dma_auto_mode & (1 << chan)) == 0 )
376 printf("isa_dmadone: channel %d not busy\n", chan);
377
378 if ((dma_auto_mode & (1 << chan)) == 0)
379 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
380
381 if (dma_bounced & (1 << chan)) {
382 /* copy bounce buffer on read */
383 if (flags & ISADMA_READ)
384 bcopy(dma_bouncebuf[chan], addr, nbytes);
385
386 dma_bounced &= ~(1 << chan);
387 }
388 dma_busy &= ~(1 << chan);
389 mtx_unlock(&isa_dma_lock);
390 }
391
392 /*
393 * Check for problems with the address range of a DMA transfer
394 * (non-contiguous physical pages, outside of bus address space,
395 * crossing DMA page boundaries).
396 * Return true if special handling needed.
397 */
398
399 static int
400 isa_dmarangecheck(caddr_t va, u_int length, int chan)
401 {
402 vm_paddr_t phys, priorpage = 0;
403 vm_offset_t endva;
404 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
405
406 endva = (vm_offset_t)round_page((vm_offset_t)va + length);
407 for (; va < (caddr_t) endva ; va += PAGE_SIZE) {
408 phys = trunc_page(pmap_extract(kernel_pmap, (vm_offset_t)va));
409 if (phys == 0)
410 panic("isa_dmacheck: no physical page present");
411 if (phys >= ISARAM_END)
412 return (1);
413 if (priorpage) {
414 if (priorpage + PAGE_SIZE != phys)
415 return (1);
416 /* check if crossing a DMA page boundary */
417 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
418 return (1);
419 }
420 priorpage = phys;
421 }
422 return (0);
423 }
424
425 /*
426 * Query the progress of a transfer on a DMA channel.
427 *
428 * To avoid having to interrupt a transfer in progress, we sample
429 * each of the high and low databytes twice, and apply the following
430 * logic to determine the correct count.
431 *
432 * Reads are performed with interrupts disabled, thus it is to be
433 * expected that the time between reads is very small. At most
434 * one rollover in the low count byte can be expected within the
435 * four reads that are performed.
436 *
437 * There are three gaps in which a rollover can occur :
438 *
439 * - read low1
440 * gap1
441 * - read high1
442 * gap2
443 * - read low2
444 * gap3
445 * - read high2
446 *
447 * If a rollover occurs in gap1 or gap2, the low2 value will be
448 * greater than the low1 value. In this case, low2 and high2 are a
449 * corresponding pair.
450 *
451 * In any other case, low1 and high1 can be considered to be correct.
452 *
453 * The function returns the number of bytes remaining in the transfer,
454 * or -1 if the channel requested is not active.
455 *
456 */
457 static int
458 isa_dmastatus_locked(int chan)
459 {
460 u_long cnt = 0;
461 int ffport, waport;
462 u_long low1, high1, low2, high2;
463
464 mtx_assert(&isa_dma_lock, MA_OWNED);
465
466 /* channel active? */
467 if ((dma_inuse & (1 << chan)) == 0) {
468 printf("isa_dmastatus: channel %d not active\n", chan);
469 return(-1);
470 }
471 /* channel busy? */
472
473 if (((dma_busy & (1 << chan)) == 0) &&
474 (dma_auto_mode & (1 << chan)) == 0 ) {
475 printf("chan %d not busy\n", chan);
476 return -2 ;
477 }
478 if (chan < 4) { /* low DMA controller */
479 ffport = DMA1_FFC;
480 waport = DMA1_CHN(chan) + 1;
481 } else { /* high DMA controller */
482 ffport = DMA2_FFC;
483 waport = DMA2_CHN(chan - 4) + 2;
484 }
485
486 disable_intr(); /* no interrupts Mr Jones! */
487 outb(ffport, 0); /* clear register LSB flipflop */
488 low1 = inb(waport);
489 high1 = inb(waport);
490 outb(ffport, 0); /* clear again */
491 low2 = inb(waport);
492 high2 = inb(waport);
493 enable_intr(); /* enable interrupts again */
494
495 /*
496 * Now decide if a wrap has tried to skew our results.
497 * Note that after TC, the count will read 0xffff, while we want
498 * to return zero, so we add and then mask to compensate.
499 */
500 if (low1 >= low2) {
501 cnt = (low1 + (high1 << 8) + 1) & 0xffff;
502 } else {
503 cnt = (low2 + (high2 << 8) + 1) & 0xffff;
504 }
505
506 if (chan >= 4) /* high channels move words */
507 cnt *= 2;
508 return(cnt);
509 }
510
511 int
512 isa_dmastatus(int chan)
513 {
514 int status;
515
516 mtx_lock(&isa_dma_lock);
517 status = isa_dmastatus_locked(chan);
518 mtx_unlock(&isa_dma_lock);
519
520 return (status);
521 }
522
523 /*
524 * Reached terminal count yet ?
525 */
526 int
527 isa_dmatc(int chan)
528 {
529
530 if (chan < 4)
531 return(inb(DMA1_STATUS) & (1 << chan));
532 else
533 return(inb(DMA2_STATUS) & (1 << (chan & 3)));
534 }
535
536 /*
537 * Stop a DMA transfer currently in progress.
538 */
539 int
540 isa_dmastop(int chan)
541 {
542 int status;
543
544 mtx_lock(&isa_dma_lock);
545 if ((dma_inuse & (1 << chan)) == 0)
546 printf("isa_dmastop: channel %d not acquired\n", chan);
547
548 if (((dma_busy & (1 << chan)) == 0) &&
549 ((dma_auto_mode & (1 << chan)) == 0)) {
550 printf("chan %d not busy\n", chan);
551 mtx_unlock(&isa_dma_lock);
552 return -2 ;
553 }
554
555 if ((chan & 4) == 0) {
556 outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
557 } else {
558 outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
559 }
560
561 status = isa_dmastatus_locked(chan);
562
563 mtx_unlock(&isa_dma_lock);
564
565 return (status);
566 }
567
568 /*
569 * Attach to the ISA PnP descriptor for the AT DMA controller
570 */
571 static struct isa_pnp_id atdma_ids[] = {
572 { 0x0002d041 /* PNP0200 */, "AT DMA controller" },
573 { 0 }
574 };
575
576 static int
577 atdma_probe(device_t dev)
578 {
579 int result;
580
581 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0)
582 device_quiet(dev);
583 return(result);
584 }
585
586 static int
587 atdma_attach(device_t dev)
588 {
589 return(0);
590 }
591
592 static device_method_t atdma_methods[] = {
593 /* Device interface */
594 DEVMETHOD(device_probe, atdma_probe),
595 DEVMETHOD(device_attach, atdma_attach),
596 DEVMETHOD(device_detach, bus_generic_detach),
597 DEVMETHOD(device_shutdown, bus_generic_shutdown),
598 DEVMETHOD(device_suspend, bus_generic_suspend),
599 DEVMETHOD(device_resume, bus_generic_resume),
600 { 0, 0 }
601 };
602
603 static driver_t atdma_driver = {
604 "atdma",
605 atdma_methods,
606 1, /* no softc */
607 };
608
609 static devclass_t atdma_devclass;
610
611 DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0);
612 DRIVER_MODULE(atdma, acpi, atdma_driver, atdma_devclass, 0, 0);
Cache object: e3c9e46466ebeee78078875f7a968325
|