The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/x86/pci/qpi.c

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 /*-
    2  * Copyright (c) 2010 Hudson River Trading LLC
    3  * Written by: John H. Baldwin <jhb@FreeBSD.org>
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  */
   27 
   28 /*
   29  * This driver provides a psuedo-bus to enumerate the PCI buses
   30  * present on a sytem using a QPI chipset.  It creates a qpi0 bus that
   31  * is a child of nexus0 and then creates two Host-PCI bridges as a
   32  * child of that.
   33  */
   34 
   35 #include <sys/cdefs.h>
   36 __FBSDID("$FreeBSD: releng/10.4/sys/x86/pci/qpi.c 283927 2015-06-02 19:20:39Z jhb $");
   37 
   38 #include <sys/param.h>
   39 #include <sys/bus.h>
   40 #include <sys/kernel.h>
   41 #include <sys/malloc.h>
   42 #include <sys/module.h>
   43 #include <sys/rman.h>
   44 #include <sys/systm.h>
   45 
   46 #include <machine/cputypes.h>
   47 #include <machine/md_var.h>
   48 #include <x86/legacyvar.h>
   49 #include <x86/pci_cfgreg.h>
   50 #include <x86/specialreg.h>
   51 
   52 #include <dev/pci/pcireg.h>
   53 #include <dev/pci/pcivar.h>
   54 #include <dev/pci/pcib_private.h>
   55 #include "pcib_if.h"
   56 
   57 struct qpi_device {
   58         int     qd_pcibus;
   59 };
   60 
   61 static MALLOC_DEFINE(M_QPI, "qpidrv", "qpi system device");
   62 
   63 static void
   64 qpi_identify(driver_t *driver, device_t parent)
   65 {
   66 
   67         /* Check CPUID to ensure this is an i7 CPU of some sort. */
   68         if (!(cpu_vendor_id == CPU_VENDOR_INTEL &&
   69             CPUID_TO_FAMILY(cpu_id) == 0x6 &&
   70             (CPUID_TO_MODEL(cpu_id) == 0x1a || CPUID_TO_MODEL(cpu_id) == 0x2c)))
   71                 return;
   72 
   73         /* PCI config register access is required. */
   74         if (pci_cfgregopen() == 0)
   75                 return;
   76 
   77         /* Add a qpi bus device. */
   78         if (BUS_ADD_CHILD(parent, 20, "qpi", -1) == NULL)
   79                 panic("Failed to add qpi bus");
   80 }
   81 
   82 static int
   83 qpi_probe(device_t dev)
   84 {
   85 
   86         device_set_desc(dev, "QPI system bus");
   87         return (BUS_PROBE_SPECIFIC);
   88 }
   89 
   90 /*
   91  * Look for a PCI bus with the specified bus address.  If one is found,
   92  * add a pcib device and return 0.  Otherwise, return an error code.
   93  */
   94 static int
   95 qpi_probe_pcib(device_t dev, int bus)
   96 {
   97         struct qpi_device *qdev;
   98         device_t child;
   99         uint32_t devid;
  100 
  101         /*
  102          * If a PCI bus already exists for this bus number, then
  103          * fail.
  104          */
  105         if (pci_find_bsf(bus, 0, 0) != NULL)
  106                 return (EEXIST);
  107 
  108         /*
  109          * Attempt to read the device id for device 0, function 0 on
  110          * the bus.  A value of 0xffffffff means that the bus is not
  111          * present.
  112          */
  113         devid = pci_cfgregread(bus, 0, 0, PCIR_DEVVENDOR, 4);
  114         if (devid == 0xffffffff)
  115                 return (ENOENT);
  116 
  117         if ((devid & 0xffff) != 0x8086) {
  118                 device_printf(dev,
  119                     "Device at pci%d.0.0 has non-Intel vendor 0x%x\n", bus,
  120                     devid & 0xffff);
  121                 return (ENXIO);
  122         }
  123 
  124         child = BUS_ADD_CHILD(dev, 0, "pcib", -1);
  125         if (child == NULL)
  126                 panic("%s: failed to add pci bus %d", device_get_nameunit(dev),
  127                     bus);
  128         qdev = malloc(sizeof(struct qpi_device), M_QPI, M_WAITOK);
  129         qdev->qd_pcibus = bus;
  130         device_set_ivars(child, qdev);
  131         return (0);
  132 }
  133 
  134 static int
  135 qpi_attach(device_t dev)
  136 {
  137         int bus;
  138 
  139         /*
  140          * Each processor socket has a dedicated PCI bus counting down from
  141          * 255.  We keep probing buses until one fails.
  142          */
  143         for (bus = 255;; bus--)
  144                 if (qpi_probe_pcib(dev, bus) != 0)
  145                         break;
  146 
  147         return (bus_generic_attach(dev));
  148 }
  149 
  150 static int
  151 qpi_print_child(device_t bus, device_t child)
  152 {
  153         struct qpi_device *qdev;
  154         int retval = 0;
  155 
  156         qdev = device_get_ivars(child);
  157         retval += bus_print_child_header(bus, child);
  158         if (qdev->qd_pcibus != -1)
  159                 retval += printf(" pcibus %d", qdev->qd_pcibus);
  160         retval += bus_print_child_footer(bus, child);
  161 
  162         return (retval);
  163 }
  164 
  165 static int
  166 qpi_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
  167 {
  168         struct qpi_device *qdev;
  169 
  170         qdev = device_get_ivars(child);
  171         switch (which) {
  172         case PCIB_IVAR_BUS:
  173                 *result = qdev->qd_pcibus;
  174                 break;
  175         default:
  176                 return (ENOENT);
  177         }
  178         return (0);
  179 }
  180 
  181 static device_method_t qpi_methods[] = {
  182         /* Device interface */
  183         DEVMETHOD(device_identify,      qpi_identify),
  184         DEVMETHOD(device_probe,         qpi_probe),
  185         DEVMETHOD(device_attach,        qpi_attach),
  186         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
  187         DEVMETHOD(device_suspend,       bus_generic_suspend),
  188         DEVMETHOD(device_resume,        bus_generic_resume),
  189 
  190         /* Bus interface */
  191         DEVMETHOD(bus_print_child,      qpi_print_child),
  192         DEVMETHOD(bus_add_child,        bus_generic_add_child),
  193         DEVMETHOD(bus_read_ivar,        qpi_read_ivar),
  194         DEVMETHOD(bus_alloc_resource,   bus_generic_alloc_resource),
  195         DEVMETHOD(bus_release_resource, bus_generic_release_resource),
  196         DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
  197         DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
  198         DEVMETHOD(bus_setup_intr,       bus_generic_setup_intr),
  199         DEVMETHOD(bus_teardown_intr,    bus_generic_teardown_intr),
  200 
  201         { 0, 0 }
  202 };
  203 
  204 static devclass_t qpi_devclass;
  205 
  206 DEFINE_CLASS_0(qpi, qpi_driver, qpi_methods, 0);
  207 DRIVER_MODULE(qpi, nexus, qpi_driver, qpi_devclass, 0, 0);
  208 
  209 static int
  210 qpi_pcib_probe(device_t dev)
  211 {
  212 
  213         device_set_desc(dev, "QPI Host-PCI bridge");
  214         return (BUS_PROBE_SPECIFIC);
  215 }
  216 
  217 static int
  218 qpi_pcib_attach(device_t dev)
  219 {
  220 
  221         device_add_child(dev, "pci", pcib_get_bus(dev));      
  222         return (bus_generic_attach(dev));
  223 }
  224 
  225 static int
  226 qpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
  227 {
  228 
  229         switch (which) {
  230         case PCIB_IVAR_DOMAIN:
  231                 *result = 0;
  232                 return (0);
  233         case PCIB_IVAR_BUS:
  234                 *result = pcib_get_bus(dev);
  235                 return (0);
  236         default:
  237                 return (ENOENT);
  238         }
  239 }
  240 
  241 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
  242 static struct resource *
  243 qpi_pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
  244     u_long start, u_long end, u_long count, u_int flags)
  245 {
  246 
  247         if (type == PCI_RES_BUS)
  248                 return (pci_domain_alloc_bus(0, child, rid, start, end, count,
  249                     flags));
  250         return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
  251             count, flags));
  252 }
  253 #endif
  254 
  255 static int
  256 qpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
  257     uint32_t *data)
  258 {
  259         device_t bus;
  260 
  261         bus = device_get_parent(pcib);
  262         return (PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data));
  263 }
  264 
  265 static device_method_t qpi_pcib_methods[] = {
  266         /* Device interface */
  267         DEVMETHOD(device_probe,         qpi_pcib_probe),
  268         DEVMETHOD(device_attach,        qpi_pcib_attach),
  269         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
  270         DEVMETHOD(device_suspend,       bus_generic_suspend),
  271         DEVMETHOD(device_resume,        bus_generic_resume),
  272 
  273         /* Bus interface */
  274         DEVMETHOD(bus_read_ivar,        qpi_pcib_read_ivar),
  275 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
  276         DEVMETHOD(bus_alloc_resource,   qpi_pcib_alloc_resource),
  277         DEVMETHOD(bus_adjust_resource,  legacy_pcib_adjust_resource),
  278         DEVMETHOD(bus_release_resource, legacy_pcib_release_resource),
  279 #else
  280         DEVMETHOD(bus_alloc_resource,   bus_generic_alloc_resource),
  281         DEVMETHOD(bus_release_resource, bus_generic_release_resource),
  282 #endif
  283         DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
  284         DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
  285         DEVMETHOD(bus_setup_intr,       bus_generic_setup_intr),
  286         DEVMETHOD(bus_teardown_intr,    bus_generic_teardown_intr),
  287 
  288         /* pcib interface */
  289         DEVMETHOD(pcib_maxslots,        pcib_maxslots),
  290         DEVMETHOD(pcib_read_config,     legacy_pcib_read_config),
  291         DEVMETHOD(pcib_write_config,    legacy_pcib_write_config),
  292         DEVMETHOD(pcib_alloc_msi,       legacy_pcib_alloc_msi),
  293         DEVMETHOD(pcib_release_msi,     pcib_release_msi),
  294         DEVMETHOD(pcib_alloc_msix,      legacy_pcib_alloc_msix),
  295         DEVMETHOD(pcib_release_msix,    pcib_release_msix),
  296         DEVMETHOD(pcib_map_msi,         qpi_pcib_map_msi),
  297 
  298         DEVMETHOD_END
  299 };
  300 
  301 static devclass_t qpi_pcib_devclass;
  302 
  303 DEFINE_CLASS_0(pcib, qpi_pcib_driver, qpi_pcib_methods, 0);
  304 DRIVER_MODULE(pcib, qpi, qpi_pcib_driver, qpi_pcib_devclass, 0, 0);

Cache object: 44c41565285b176bef9809f9752b5c12


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.