The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/x86/pci/qpi.c

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    1 /*-
    2  * Copyright (c) 2010 Hudson River Trading LLC
    3  * Written by: John H. Baldwin <jhb@FreeBSD.org>
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  */
   27 
   28 /*
   29  * This driver provides a pseudo-bus to enumerate the PCI buses
   30  * present on a system using a QPI chipset.  It creates a qpi0 bus that
   31  * is a child of nexus0 and then creates Host-PCI bridges as a
   32  * child of that.
   33  */
   34 
   35 #include <sys/cdefs.h>
   36 __FBSDID("$FreeBSD$");
   37 
   38 #include <sys/param.h>
   39 #include <sys/bus.h>
   40 #include <sys/kernel.h>
   41 #include <sys/malloc.h>
   42 #include <sys/module.h>
   43 #include <sys/rman.h>
   44 #include <sys/systm.h>
   45 
   46 #include <machine/cputypes.h>
   47 #include <machine/md_var.h>
   48 #include <x86/legacyvar.h>
   49 #include <x86/pci_cfgreg.h>
   50 #include <x86/specialreg.h>
   51 
   52 #include <dev/pci/pcireg.h>
   53 #include <dev/pci/pcivar.h>
   54 #include <dev/pci/pcib_private.h>
   55 #include "pcib_if.h"
   56 
   57 struct qpi_device {
   58         int     qd_pcibus;
   59 };
   60 
   61 static MALLOC_DEFINE(M_QPI, "qpidrv", "qpi system device");
   62 
   63 static void
   64 qpi_identify(driver_t *driver, device_t parent)
   65 {
   66         int do_qpi;
   67 
   68         /* Check CPUID to ensure this is an i7 CPU of some sort. */
   69         if (cpu_vendor_id != CPU_VENDOR_INTEL ||
   70             CPUID_TO_FAMILY(cpu_id) != 0x6)
   71                 return;
   72 
   73         /* Only discover buses with configuration devices if allowed by user */
   74         do_qpi = 0;
   75         TUNABLE_INT_FETCH("hw.attach_intel_csr_pci", &do_qpi);
   76         if (!do_qpi)
   77                 return;
   78 
   79         /* PCI config register access is required. */
   80         if (pci_cfgregopen() == 0)
   81                 return;
   82 
   83         /* Add a qpi bus device. */
   84         if (BUS_ADD_CHILD(parent, 20, "qpi", -1) == NULL)
   85                 panic("Failed to add qpi bus");
   86 }
   87 
   88 static int
   89 qpi_probe(device_t dev)
   90 {
   91 
   92         device_set_desc(dev, "QPI system bus");
   93         return (BUS_PROBE_SPECIFIC);
   94 }
   95 
   96 /*
   97  * Look for a PCI bus with the specified bus address.  If one is found,
   98  * add a pcib device and return 0.  Otherwise, return an error code.
   99  */
  100 static int
  101 qpi_probe_pcib(device_t dev, int bus)
  102 {
  103         struct qpi_device *qdev;
  104         device_t child;
  105         uint32_t devid;
  106         int s;
  107 
  108         /*
  109          * If a PCI bus already exists for this bus number, then
  110          * fail.
  111          */
  112         if (pci_find_bsf(bus, 0, 0) != NULL)
  113                 return (EEXIST);
  114 
  115         /*
  116          * Attempt to read the device id for every slot, function 0 on
  117          * the bus.  If all read values are 0xffffffff this means that
  118          * the bus is not present.
  119          */
  120         for (s = 0; s <= PCI_SLOTMAX; s++) {
  121                 devid = pci_cfgregread(bus, s, 0, PCIR_DEVVENDOR, 4);
  122                 if (devid != 0xffffffff)
  123                         break;
  124         }
  125         if (devid == 0xffffffff)
  126                 return (ENOENT);
  127 
  128         if ((devid & 0xffff) != 0x8086) {
  129                 if (bootverbose)
  130                         device_printf(dev,
  131                             "Device at pci%d.%d.0 has non-Intel vendor 0x%x\n",
  132                             bus, s, devid & 0xffff);
  133                 return (ENXIO);
  134         }
  135 
  136         child = BUS_ADD_CHILD(dev, 0, "pcib", -1);
  137         if (child == NULL)
  138                 panic("%s: failed to add pci bus %d", device_get_nameunit(dev),
  139                     bus);
  140         qdev = malloc(sizeof(struct qpi_device), M_QPI, M_WAITOK);
  141         qdev->qd_pcibus = bus;
  142         device_set_ivars(child, qdev);
  143         return (0);
  144 }
  145 
  146 static int
  147 qpi_attach(device_t dev)
  148 {
  149         int bus;
  150 
  151         /*
  152          * Each processor socket has a dedicated PCI bus, sometimes
  153          * not enumerated by ACPI.  Probe all unattached buses from 0
  154          * to 255.
  155          */
  156         for (bus = PCI_BUSMAX; bus >= 0; bus--)
  157                 qpi_probe_pcib(dev, bus);
  158 
  159         return (bus_generic_attach(dev));
  160 }
  161 
  162 static int
  163 qpi_print_child(device_t bus, device_t child)
  164 {
  165         struct qpi_device *qdev;
  166         int retval = 0;
  167 
  168         qdev = device_get_ivars(child);
  169         retval += bus_print_child_header(bus, child);
  170         if (qdev->qd_pcibus != -1)
  171                 retval += printf(" pcibus %d", qdev->qd_pcibus);
  172         retval += bus_print_child_footer(bus, child);
  173 
  174         return (retval);
  175 }
  176 
  177 static int
  178 qpi_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
  179 {
  180         struct qpi_device *qdev;
  181 
  182         qdev = device_get_ivars(child);
  183         switch (which) {
  184         case PCIB_IVAR_BUS:
  185                 *result = qdev->qd_pcibus;
  186                 break;
  187         default:
  188                 return (ENOENT);
  189         }
  190         return (0);
  191 }
  192 
  193 static device_method_t qpi_methods[] = {
  194         /* Device interface */
  195         DEVMETHOD(device_identify,      qpi_identify),
  196         DEVMETHOD(device_probe,         qpi_probe),
  197         DEVMETHOD(device_attach,        qpi_attach),
  198         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
  199         DEVMETHOD(device_suspend,       bus_generic_suspend),
  200         DEVMETHOD(device_resume,        bus_generic_resume),
  201 
  202         /* Bus interface */
  203         DEVMETHOD(bus_print_child,      qpi_print_child),
  204         DEVMETHOD(bus_add_child,        bus_generic_add_child),
  205         DEVMETHOD(bus_read_ivar,        qpi_read_ivar),
  206         DEVMETHOD(bus_alloc_resource,   bus_generic_alloc_resource),
  207         DEVMETHOD(bus_release_resource, bus_generic_release_resource),
  208         DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
  209         DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
  210         DEVMETHOD(bus_setup_intr,       bus_generic_setup_intr),
  211         DEVMETHOD(bus_teardown_intr,    bus_generic_teardown_intr),
  212 
  213         { 0, 0 }
  214 };
  215 
  216 static devclass_t qpi_devclass;
  217 
  218 DEFINE_CLASS_0(qpi, qpi_driver, qpi_methods, 0);
  219 DRIVER_MODULE(qpi, nexus, qpi_driver, qpi_devclass, 0, 0);
  220 
  221 static int
  222 qpi_pcib_probe(device_t dev)
  223 {
  224 
  225         device_set_desc(dev, "QPI Host-PCI bridge");
  226         return (BUS_PROBE_SPECIFIC);
  227 }
  228 
  229 static int
  230 qpi_pcib_attach(device_t dev)
  231 {
  232 
  233         device_add_child(dev, "pci", -1);
  234         return (bus_generic_attach(dev));
  235 }
  236 
  237 static int
  238 qpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
  239 {
  240 
  241         switch (which) {
  242         case PCIB_IVAR_DOMAIN:
  243                 *result = 0;
  244                 return (0);
  245         case PCIB_IVAR_BUS:
  246                 *result = pcib_get_bus(dev);
  247                 return (0);
  248         default:
  249                 return (ENOENT);
  250         }
  251 }
  252 
  253 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
  254 static struct resource *
  255 qpi_pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
  256     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
  257 {
  258 
  259         if (type == PCI_RES_BUS)
  260                 return (pci_domain_alloc_bus(0, child, rid, start, end, count,
  261                     flags));
  262         return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
  263             count, flags));
  264 }
  265 #endif
  266 
  267 static int
  268 qpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
  269     uint32_t *data)
  270 {
  271         device_t bus;
  272 
  273         bus = device_get_parent(pcib);
  274         return (PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data));
  275 }
  276 
  277 static device_method_t qpi_pcib_methods[] = {
  278         /* Device interface */
  279         DEVMETHOD(device_probe,         qpi_pcib_probe),
  280         DEVMETHOD(device_attach,        qpi_pcib_attach),
  281         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
  282         DEVMETHOD(device_suspend,       bus_generic_suspend),
  283         DEVMETHOD(device_resume,        bus_generic_resume),
  284 
  285         /* Bus interface */
  286         DEVMETHOD(bus_read_ivar,        qpi_pcib_read_ivar),
  287 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
  288         DEVMETHOD(bus_alloc_resource,   qpi_pcib_alloc_resource),
  289         DEVMETHOD(bus_adjust_resource,  legacy_pcib_adjust_resource),
  290         DEVMETHOD(bus_release_resource, legacy_pcib_release_resource),
  291 #else
  292         DEVMETHOD(bus_alloc_resource,   bus_generic_alloc_resource),
  293         DEVMETHOD(bus_release_resource, bus_generic_release_resource),
  294 #endif
  295         DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
  296         DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
  297         DEVMETHOD(bus_setup_intr,       bus_generic_setup_intr),
  298         DEVMETHOD(bus_teardown_intr,    bus_generic_teardown_intr),
  299 
  300         /* pcib interface */
  301         DEVMETHOD(pcib_maxslots,        pcib_maxslots),
  302         DEVMETHOD(pcib_read_config,     legacy_pcib_read_config),
  303         DEVMETHOD(pcib_write_config,    legacy_pcib_write_config),
  304         DEVMETHOD(pcib_alloc_msi,       legacy_pcib_alloc_msi),
  305         DEVMETHOD(pcib_release_msi,     pcib_release_msi),
  306         DEVMETHOD(pcib_alloc_msix,      legacy_pcib_alloc_msix),
  307         DEVMETHOD(pcib_release_msix,    pcib_release_msix),
  308         DEVMETHOD(pcib_map_msi,         qpi_pcib_map_msi),
  309 
  310         DEVMETHOD_END
  311 };
  312 
  313 static devclass_t qpi_pcib_devclass;
  314 
  315 DEFINE_CLASS_0(pcib, qpi_pcib_driver, qpi_pcib_methods, 0);
  316 DRIVER_MODULE(pcib, qpi, qpi_pcib_driver, qpi_pcib_devclass, 0, 0);

Cache object: e56b8c9c252222e85fabd257f202ed1c


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