FreeBSD/Linux Kernel Cross Reference
sys/x86/x86/mptable.c
1 /*-
2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
3 * Copyright (c) 1996, by Steve Passe
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. The name of the developer may NOT be used to endorse or promote products
12 * derived from this software without specific prior written permission.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD: releng/10.2/sys/x86/x86/mptable.c 262141 2014-02-18 01:15:32Z jhb $");
29
30 #include "opt_mptable_force_htt.h"
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/bus.h>
34 #include <sys/kernel.h>
35 #include <sys/limits.h>
36 #include <sys/malloc.h>
37 #ifdef NEW_PCIB
38 #include <sys/rman.h>
39 #endif
40
41 #include <vm/vm.h>
42 #include <vm/vm_param.h>
43 #include <vm/pmap.h>
44
45 #include <dev/pci/pcivar.h>
46 #ifdef NEW_PCIB
47 #include <dev/pci/pcib_private.h>
48 #endif
49 #include <x86/apicreg.h>
50 #include <x86/mptable.h>
51 #include <machine/frame.h>
52 #include <machine/intr_machdep.h>
53 #include <machine/apicvar.h>
54 #include <machine/md_var.h>
55 #ifdef NEW_PCIB
56 #include <machine/resource.h>
57 #endif
58 #include <machine/specialreg.h>
59
60 /* string defined by the Intel MP Spec as identifying the MP table */
61 #define MP_SIG 0x5f504d5f /* _MP_ */
62
63 #ifdef __amd64__
64 #define MAX_LAPIC_ID 63 /* Max local APIC ID for HTT fixup */
65 #else
66 #define MAX_LAPIC_ID 31 /* Max local APIC ID for HTT fixup */
67 #endif
68
69 #ifdef PC98
70 #define BIOS_BASE (0xe8000)
71 #define BIOS_SIZE (0x18000)
72 #else
73 #define BIOS_BASE (0xf0000)
74 #define BIOS_SIZE (0x10000)
75 #endif
76 #define BIOS_COUNT (BIOS_SIZE/4)
77
78 typedef void mptable_entry_handler(u_char *entry, void *arg);
79 typedef void mptable_extended_entry_handler(ext_entry_ptr entry, void *arg);
80
81 static basetable_entry basetable_entry_types[] =
82 {
83 {0, 20, "Processor"},
84 {1, 8, "Bus"},
85 {2, 8, "I/O APIC"},
86 {3, 8, "I/O INT"},
87 {4, 8, "Local INT"}
88 };
89
90 typedef struct BUSDATA {
91 u_char bus_id;
92 enum busTypes bus_type;
93 } bus_datum;
94
95 typedef struct INTDATA {
96 u_char int_type;
97 u_short int_flags;
98 u_char src_bus_id;
99 u_char src_bus_irq;
100 u_char dst_apic_id;
101 u_char dst_apic_int;
102 u_char int_vector;
103 } io_int, local_int;
104
105 typedef struct BUSTYPENAME {
106 u_char type;
107 char name[7];
108 } bus_type_name;
109
110 /* From MP spec v1.4, table 4-8. */
111 static bus_type_name bus_type_table[] =
112 {
113 {UNKNOWN_BUSTYPE, "CBUS "},
114 {UNKNOWN_BUSTYPE, "CBUSII"},
115 {EISA, "EISA "},
116 {UNKNOWN_BUSTYPE, "FUTURE"},
117 {UNKNOWN_BUSTYPE, "INTERN"},
118 {ISA, "ISA "},
119 {UNKNOWN_BUSTYPE, "MBI "},
120 {UNKNOWN_BUSTYPE, "MBII "},
121 {MCA, "MCA "},
122 {UNKNOWN_BUSTYPE, "MPI "},
123 {UNKNOWN_BUSTYPE, "MPSA "},
124 {UNKNOWN_BUSTYPE, "NUBUS "},
125 {PCI, "PCI "},
126 {UNKNOWN_BUSTYPE, "PCMCIA"},
127 {UNKNOWN_BUSTYPE, "TC "},
128 {UNKNOWN_BUSTYPE, "VL "},
129 {UNKNOWN_BUSTYPE, "VME "},
130 {UNKNOWN_BUSTYPE, "XPRESS"}
131 };
132
133 /* From MP spec v1.4, table 5-1. */
134 static int default_data[7][5] =
135 {
136 /* nbus, id0, type0, id1, type1 */
137 {1, 0, ISA, 255, NOBUS},
138 {1, 0, EISA, 255, NOBUS},
139 {1, 0, EISA, 255, NOBUS},
140 {1, 0, MCA, 255, NOBUS},
141 {2, 0, ISA, 1, PCI},
142 {2, 0, EISA, 1, PCI},
143 {2, 0, MCA, 1, PCI}
144 };
145
146 struct pci_probe_table_args {
147 u_char bus;
148 u_char found;
149 };
150
151 struct pci_route_interrupt_args {
152 u_char bus; /* Source bus. */
153 u_char irq; /* Source slot:pin. */
154 int vector; /* Return value. */
155 };
156
157 static mpfps_t mpfps;
158 static mpcth_t mpct;
159 static ext_entry_ptr mpet;
160 static void *ioapics[MAX_APIC_ID + 1];
161 static bus_datum *busses;
162 static int mptable_nioapics, mptable_nbusses, mptable_maxbusid;
163 static int pci0 = -1;
164
165 static MALLOC_DEFINE(M_MPTABLE, "mptable", "MP Table Items");
166
167 static enum intr_polarity conforming_polarity(u_char src_bus,
168 u_char src_bus_irq);
169 static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq);
170 static enum intr_polarity intentry_polarity(int_entry_ptr intr);
171 static enum intr_trigger intentry_trigger(int_entry_ptr intr);
172 static int lookup_bus_type(char *name);
173 static void mptable_count_items(void);
174 static void mptable_count_items_handler(u_char *entry, void *arg);
175 #ifdef MPTABLE_FORCE_HTT
176 static void mptable_hyperthread_fixup(u_int id_mask);
177 #endif
178 static void mptable_parse_apics_and_busses(void);
179 static void mptable_parse_apics_and_busses_handler(u_char *entry,
180 void *arg);
181 static void mptable_parse_default_config_ints(void);
182 static void mptable_parse_ints(void);
183 static void mptable_parse_ints_handler(u_char *entry, void *arg);
184 static void mptable_parse_io_int(int_entry_ptr intr);
185 static void mptable_parse_local_int(int_entry_ptr intr);
186 static void mptable_pci_probe_table_handler(u_char *entry, void *arg);
187 static void mptable_pci_route_interrupt_handler(u_char *entry, void *arg);
188 static void mptable_pci_setup(void);
189 static int mptable_probe(void);
190 static int mptable_probe_cpus(void);
191 static void mptable_probe_cpus_handler(u_char *entry, void *arg __unused);
192 static void mptable_register(void *dummy);
193 static int mptable_setup_local(void);
194 static int mptable_setup_io(void);
195 #ifdef NEW_PCIB
196 static void mptable_walk_extended_table(
197 mptable_extended_entry_handler *handler, void *arg);
198 #endif
199 static void mptable_walk_table(mptable_entry_handler *handler, void *arg);
200 static int search_for_sig(u_int32_t target, int count);
201
202 static struct apic_enumerator mptable_enumerator = {
203 "MPTable",
204 mptable_probe,
205 mptable_probe_cpus,
206 mptable_setup_local,
207 mptable_setup_io
208 };
209
210 /*
211 * look for the MP spec signature
212 */
213
214 static int
215 search_for_sig(u_int32_t target, int count)
216 {
217 int x;
218 u_int32_t *addr = (u_int32_t *) (KERNBASE + target);
219
220 for (x = 0; x < count; x += 4)
221 if (addr[x] == MP_SIG)
222 /* make array index a byte index */
223 return (target + (x * sizeof(u_int32_t)));
224 return (-1);
225 }
226
227 static int
228 lookup_bus_type(char *name)
229 {
230 int x;
231
232 for (x = 0; x < MAX_BUSTYPE; ++x)
233 if (strncmp(bus_type_table[x].name, name, 6) == 0)
234 return (bus_type_table[x].type);
235
236 return (UNKNOWN_BUSTYPE);
237 }
238
239 /*
240 * Look for an Intel MP spec table (ie, SMP capable hardware).
241 */
242 static int
243 mptable_probe(void)
244 {
245 int x;
246 u_long segment;
247 u_int32_t target;
248
249 /* see if EBDA exists */
250 if ((segment = (u_long) * (u_short *) (KERNBASE + 0x40e)) != 0) {
251 /* search first 1K of EBDA */
252 target = (u_int32_t) (segment << 4);
253 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
254 goto found;
255 } else {
256 /* last 1K of base memory, effective 'top of base' passed in */
257 target = (u_int32_t) ((basemem * 1024) - 0x400);
258 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
259 goto found;
260 }
261
262 /* search the BIOS */
263 target = (u_int32_t) BIOS_BASE;
264 if ((x = search_for_sig(target, BIOS_COUNT)) >= 0)
265 goto found;
266
267 /* nothing found */
268 return (ENXIO);
269
270 found:
271 mpfps = (mpfps_t)(KERNBASE + x);
272
273 /* Map in the configuration table if it exists. */
274 if (mpfps->config_type != 0) {
275 if (bootverbose)
276 printf(
277 "MP Table version 1.%d found using Default Configuration %d\n",
278 mpfps->spec_rev, mpfps->config_type);
279 if (mpfps->config_type != 5 && mpfps->config_type != 6) {
280 printf(
281 "MP Table Default Configuration %d is unsupported\n",
282 mpfps->config_type);
283 return (ENXIO);
284 }
285 mpct = NULL;
286 } else {
287 if ((uintptr_t)mpfps->pap >= 1024 * 1024) {
288 printf("%s: Unable to map MP Configuration Table\n",
289 __func__);
290 return (ENXIO);
291 }
292 mpct = (mpcth_t)(KERNBASE + (uintptr_t)mpfps->pap);
293 if (mpct->base_table_length + (uintptr_t)mpfps->pap >=
294 1024 * 1024) {
295 printf("%s: Unable to map end of MP Config Table\n",
296 __func__);
297 return (ENXIO);
298 }
299 if (mpct->extended_table_length != 0 &&
300 mpct->extended_table_length + mpct->base_table_length +
301 (uintptr_t)mpfps->pap < 1024 * 1024)
302 mpet = (ext_entry_ptr)((char *)mpct +
303 mpct->base_table_length);
304 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' ||
305 mpct->signature[2] != 'M' || mpct->signature[3] != 'P') {
306 printf("%s: MP Config Table has bad signature: %c%c%c%c\n",
307 __func__, mpct->signature[0], mpct->signature[1],
308 mpct->signature[2], mpct->signature[3]);
309 return (ENXIO);
310 }
311 if (bootverbose)
312 printf(
313 "MP Configuration Table version 1.%d found at %p\n",
314 mpct->spec_rev, mpct);
315 }
316
317 return (-100);
318 }
319
320 /*
321 * Run through the MP table enumerating CPUs.
322 */
323 static int
324 mptable_probe_cpus(void)
325 {
326 u_int cpu_mask;
327
328 /* Is this a pre-defined config? */
329 if (mpfps->config_type != 0) {
330 lapic_create(0, 1);
331 lapic_create(1, 0);
332 } else {
333 cpu_mask = 0;
334 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask);
335 #ifdef MPTABLE_FORCE_HTT
336 mptable_hyperthread_fixup(cpu_mask);
337 #endif
338 }
339 return (0);
340 }
341
342 /*
343 * Initialize the local APIC on the BSP.
344 */
345 static int
346 mptable_setup_local(void)
347 {
348 vm_paddr_t addr;
349
350 /* Is this a pre-defined config? */
351 printf("MPTable: <");
352 if (mpfps->config_type != 0) {
353 addr = DEFAULT_APIC_BASE;
354 printf("Default Configuration %d", mpfps->config_type);
355 } else {
356 addr = mpct->apic_address;
357 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id,
358 (int)sizeof(mpct->product_id), mpct->product_id);
359 }
360 printf(">\n");
361 lapic_init(addr);
362 return (0);
363 }
364
365 /*
366 * Run through the MP table enumerating I/O APICs.
367 */
368 static int
369 mptable_setup_io(void)
370 {
371 int i;
372 u_char byte;
373
374 /* First, we count individual items and allocate arrays. */
375 mptable_count_items();
376 busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE,
377 M_WAITOK);
378 for (i = 0; i <= mptable_maxbusid; i++)
379 busses[i].bus_type = NOBUS;
380
381 /* Second, we run through adding I/O APIC's and busses. */
382 mptable_parse_apics_and_busses();
383
384 /* Third, we run through the table tweaking interrupt sources. */
385 mptable_parse_ints();
386
387 /* Fourth, we register all the I/O APIC's. */
388 for (i = 0; i <= MAX_APIC_ID; i++)
389 if (ioapics[i] != NULL)
390 ioapic_register(ioapics[i]);
391
392 /* Fifth, we setup data structures to handle PCI interrupt routing. */
393 mptable_pci_setup();
394
395 /* Finally, we throw the switch to enable the I/O APIC's. */
396 if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) {
397 outb(0x22, 0x70); /* select IMCR */
398 byte = inb(0x23); /* current contents */
399 byte |= 0x01; /* mask external INTR */
400 outb(0x23, byte); /* disconnect 8259s/NMI */
401 }
402
403 return (0);
404 }
405
406 static void
407 mptable_register(void *dummy __unused)
408 {
409
410 apic_register_enumerator(&mptable_enumerator);
411 }
412 SYSINIT(mptable_register, SI_SUB_TUNABLES - 1, SI_ORDER_FIRST, mptable_register,
413 NULL);
414
415 /*
416 * Call the handler routine for each entry in the MP config base table.
417 */
418 static void
419 mptable_walk_table(mptable_entry_handler *handler, void *arg)
420 {
421 u_int i;
422 u_char *entry;
423
424 entry = (u_char *)(mpct + 1);
425 for (i = 0; i < mpct->entry_count; i++) {
426 switch (*entry) {
427 case MPCT_ENTRY_PROCESSOR:
428 case MPCT_ENTRY_IOAPIC:
429 case MPCT_ENTRY_BUS:
430 case MPCT_ENTRY_INT:
431 case MPCT_ENTRY_LOCAL_INT:
432 break;
433 default:
434 panic("%s: Unknown MP Config Entry %d\n", __func__,
435 (int)*entry);
436 }
437 handler(entry, arg);
438 entry += basetable_entry_types[*entry].length;
439 }
440 }
441
442 #ifdef NEW_PCIB
443 /*
444 * Call the handler routine for each entry in the MP config extended
445 * table.
446 */
447 static void
448 mptable_walk_extended_table(mptable_extended_entry_handler *handler, void *arg)
449 {
450 ext_entry_ptr end, entry;
451
452 if (mpet == NULL)
453 return;
454 entry = mpet;
455 end = (ext_entry_ptr)((char *)mpet + mpct->extended_table_length);
456 while (entry < end) {
457 handler(entry, arg);
458 entry = (ext_entry_ptr)((char *)entry + entry->length);
459 }
460 }
461 #endif
462
463 static void
464 mptable_probe_cpus_handler(u_char *entry, void *arg)
465 {
466 proc_entry_ptr proc;
467 u_int *cpu_mask;
468
469 switch (*entry) {
470 case MPCT_ENTRY_PROCESSOR:
471 proc = (proc_entry_ptr)entry;
472 if (proc->cpu_flags & PROCENTRY_FLAG_EN) {
473 lapic_create(proc->apic_id, proc->cpu_flags &
474 PROCENTRY_FLAG_BP);
475 if (proc->apic_id < MAX_LAPIC_ID) {
476 cpu_mask = (u_int *)arg;
477 *cpu_mask |= (1ul << proc->apic_id);
478 }
479 }
480 break;
481 }
482 }
483
484 static void
485 mptable_count_items_handler(u_char *entry, void *arg __unused)
486 {
487 io_apic_entry_ptr apic;
488 bus_entry_ptr bus;
489
490 switch (*entry) {
491 case MPCT_ENTRY_BUS:
492 bus = (bus_entry_ptr)entry;
493 mptable_nbusses++;
494 if (bus->bus_id > mptable_maxbusid)
495 mptable_maxbusid = bus->bus_id;
496 break;
497 case MPCT_ENTRY_IOAPIC:
498 apic = (io_apic_entry_ptr)entry;
499 if (apic->apic_flags & IOAPICENTRY_FLAG_EN)
500 mptable_nioapics++;
501 break;
502 }
503 }
504
505 /*
506 * Count items in the table.
507 */
508 static void
509 mptable_count_items(void)
510 {
511
512 /* Is this a pre-defined config? */
513 if (mpfps->config_type != 0) {
514 mptable_nioapics = 1;
515 switch (mpfps->config_type) {
516 case 1:
517 case 2:
518 case 3:
519 case 4:
520 mptable_nbusses = 1;
521 break;
522 case 5:
523 case 6:
524 case 7:
525 mptable_nbusses = 2;
526 break;
527 default:
528 panic("Unknown pre-defined MP Table config type %d",
529 mpfps->config_type);
530 }
531 mptable_maxbusid = mptable_nbusses - 1;
532 } else
533 mptable_walk_table(mptable_count_items_handler, NULL);
534 }
535
536 /*
537 * Add a bus or I/O APIC from an entry in the table.
538 */
539 static void
540 mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused)
541 {
542 io_apic_entry_ptr apic;
543 bus_entry_ptr bus;
544 enum busTypes bus_type;
545 int i;
546
547
548 switch (*entry) {
549 case MPCT_ENTRY_BUS:
550 bus = (bus_entry_ptr)entry;
551 bus_type = lookup_bus_type(bus->bus_type);
552 if (bus_type == UNKNOWN_BUSTYPE) {
553 printf("MPTable: Unknown bus %d type \"", bus->bus_id);
554 for (i = 0; i < 6; i++)
555 printf("%c", bus->bus_type[i]);
556 printf("\"\n");
557 }
558 busses[bus->bus_id].bus_id = bus->bus_id;
559 busses[bus->bus_id].bus_type = bus_type;
560 break;
561 case MPCT_ENTRY_IOAPIC:
562 apic = (io_apic_entry_ptr)entry;
563 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN))
564 break;
565 if (apic->apic_id > MAX_APIC_ID)
566 panic("%s: I/O APIC ID %d too high", __func__,
567 apic->apic_id);
568 if (ioapics[apic->apic_id] != NULL)
569 panic("%s: Double APIC ID %d", __func__,
570 apic->apic_id);
571 ioapics[apic->apic_id] = ioapic_create(apic->apic_address,
572 apic->apic_id, -1);
573 break;
574 default:
575 break;
576 }
577 }
578
579 /*
580 * Enumerate I/O APIC's and busses.
581 */
582 static void
583 mptable_parse_apics_and_busses(void)
584 {
585
586 /* Is this a pre-defined config? */
587 if (mpfps->config_type != 0) {
588 ioapics[2] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0);
589 busses[0].bus_id = 0;
590 busses[0].bus_type = default_data[mpfps->config_type - 1][2];
591 if (mptable_nbusses > 1) {
592 busses[1].bus_id = 1;
593 busses[1].bus_type =
594 default_data[mpfps->config_type - 1][4];
595 }
596 } else
597 mptable_walk_table(mptable_parse_apics_and_busses_handler,
598 NULL);
599 }
600
601 /*
602 * Determine conforming polarity for a given bus type.
603 */
604 static enum intr_polarity
605 conforming_polarity(u_char src_bus, u_char src_bus_irq)
606 {
607
608 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
609 switch (busses[src_bus].bus_type) {
610 case ISA:
611 case EISA:
612 return (INTR_POLARITY_HIGH);
613 case PCI:
614 return (INTR_POLARITY_LOW);
615 default:
616 panic("%s: unknown bus type %d", __func__,
617 busses[src_bus].bus_type);
618 }
619 }
620
621 /*
622 * Determine conforming trigger for a given bus type.
623 */
624 static enum intr_trigger
625 conforming_trigger(u_char src_bus, u_char src_bus_irq)
626 {
627
628 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
629 switch (busses[src_bus].bus_type) {
630 case ISA:
631 #ifndef PC98
632 if (elcr_found)
633 return (elcr_read_trigger(src_bus_irq));
634 else
635 #endif
636 return (INTR_TRIGGER_EDGE);
637 case PCI:
638 return (INTR_TRIGGER_LEVEL);
639 #ifndef PC98
640 case EISA:
641 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq));
642 KASSERT(elcr_found, ("Missing ELCR"));
643 return (elcr_read_trigger(src_bus_irq));
644 #endif
645 default:
646 panic("%s: unknown bus type %d", __func__,
647 busses[src_bus].bus_type);
648 }
649 }
650
651 static enum intr_polarity
652 intentry_polarity(int_entry_ptr intr)
653 {
654
655 switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) {
656 case INTENTRY_FLAGS_POLARITY_CONFORM:
657 return (conforming_polarity(intr->src_bus_id,
658 intr->src_bus_irq));
659 case INTENTRY_FLAGS_POLARITY_ACTIVEHI:
660 return (INTR_POLARITY_HIGH);
661 case INTENTRY_FLAGS_POLARITY_ACTIVELO:
662 return (INTR_POLARITY_LOW);
663 default:
664 panic("Bogus interrupt flags");
665 }
666 }
667
668 static enum intr_trigger
669 intentry_trigger(int_entry_ptr intr)
670 {
671
672 switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) {
673 case INTENTRY_FLAGS_TRIGGER_CONFORM:
674 return (conforming_trigger(intr->src_bus_id,
675 intr->src_bus_irq));
676 case INTENTRY_FLAGS_TRIGGER_EDGE:
677 return (INTR_TRIGGER_EDGE);
678 case INTENTRY_FLAGS_TRIGGER_LEVEL:
679 return (INTR_TRIGGER_LEVEL);
680 default:
681 panic("Bogus interrupt flags");
682 }
683 }
684
685 /*
686 * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC.
687 */
688 static void
689 mptable_parse_io_int(int_entry_ptr intr)
690 {
691 void *ioapic;
692 u_int pin, apic_id;
693
694 apic_id = intr->dst_apic_id;
695 if (intr->dst_apic_id == 0xff) {
696 /*
697 * An APIC ID of 0xff means that the interrupt is connected
698 * to the specified pin on all I/O APICs in the system. If
699 * there is only one I/O APIC, then use that APIC to route
700 * the interrupts. If there is more than one I/O APIC, then
701 * punt.
702 */
703 if (mptable_nioapics == 1) {
704 apic_id = 0;
705 while (ioapics[apic_id] == NULL)
706 apic_id++;
707 } else {
708 printf(
709 "MPTable: Ignoring global interrupt entry for pin %d\n",
710 intr->dst_apic_int);
711 return;
712 }
713 }
714 if (apic_id > MAX_APIC_ID) {
715 printf("MPTable: Ignoring interrupt entry for ioapic%d\n",
716 intr->dst_apic_id);
717 return;
718 }
719 ioapic = ioapics[apic_id];
720 if (ioapic == NULL) {
721 printf(
722 "MPTable: Ignoring interrupt entry for missing ioapic%d\n",
723 apic_id);
724 return;
725 }
726 pin = intr->dst_apic_int;
727 switch (intr->int_type) {
728 case INTENTRY_TYPE_INT:
729 switch (busses[intr->src_bus_id].bus_type) {
730 case NOBUS:
731 panic("interrupt from missing bus");
732 case ISA:
733 case EISA:
734 if (busses[intr->src_bus_id].bus_type == ISA)
735 ioapic_set_bus(ioapic, pin, APIC_BUS_ISA);
736 else
737 ioapic_set_bus(ioapic, pin, APIC_BUS_EISA);
738 if (intr->src_bus_irq == pin)
739 break;
740 ioapic_remap_vector(ioapic, pin, intr->src_bus_irq);
741 if (ioapic_get_vector(ioapic, intr->src_bus_irq) ==
742 intr->src_bus_irq)
743 ioapic_disable_pin(ioapic, intr->src_bus_irq);
744 break;
745 case PCI:
746 ioapic_set_bus(ioapic, pin, APIC_BUS_PCI);
747 break;
748 default:
749 ioapic_set_bus(ioapic, pin, APIC_BUS_UNKNOWN);
750 break;
751 }
752 break;
753 case INTENTRY_TYPE_NMI:
754 ioapic_set_nmi(ioapic, pin);
755 break;
756 case INTENTRY_TYPE_SMI:
757 ioapic_set_smi(ioapic, pin);
758 break;
759 case INTENTRY_TYPE_EXTINT:
760 ioapic_set_extint(ioapic, pin);
761 break;
762 default:
763 panic("%s: invalid interrupt entry type %d\n", __func__,
764 intr->int_type);
765 }
766 if (intr->int_type == INTENTRY_TYPE_INT ||
767 (intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
768 INTENTRY_FLAGS_TRIGGER_CONFORM)
769 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr));
770 if (intr->int_type == INTENTRY_TYPE_INT ||
771 (intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
772 INTENTRY_FLAGS_POLARITY_CONFORM)
773 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr));
774 }
775
776 /*
777 * Parse an interrupt entry for a local APIC LVT pin.
778 */
779 static void
780 mptable_parse_local_int(int_entry_ptr intr)
781 {
782 u_int apic_id, pin;
783
784 if (intr->dst_apic_id == 0xff)
785 apic_id = APIC_ID_ALL;
786 else
787 apic_id = intr->dst_apic_id;
788 if (intr->dst_apic_int == 0)
789 pin = APIC_LVT_LINT0;
790 else
791 pin = APIC_LVT_LINT1;
792 switch (intr->int_type) {
793 case INTENTRY_TYPE_INT:
794 #if 1
795 printf(
796 "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n",
797 intr->dst_apic_int, intr->src_bus_irq);
798 return;
799 #else
800 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED);
801 break;
802 #endif
803 case INTENTRY_TYPE_NMI:
804 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI);
805 break;
806 case INTENTRY_TYPE_SMI:
807 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI);
808 break;
809 case INTENTRY_TYPE_EXTINT:
810 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT);
811 break;
812 default:
813 panic("%s: invalid interrupt entry type %d\n", __func__,
814 intr->int_type);
815 }
816 if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
817 INTENTRY_FLAGS_TRIGGER_CONFORM)
818 lapic_set_lvt_triggermode(apic_id, pin,
819 intentry_trigger(intr));
820 if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
821 INTENTRY_FLAGS_POLARITY_CONFORM)
822 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr));
823 }
824
825 /*
826 * Parse interrupt entries.
827 */
828 static void
829 mptable_parse_ints_handler(u_char *entry, void *arg __unused)
830 {
831 int_entry_ptr intr;
832
833 intr = (int_entry_ptr)entry;
834 switch (*entry) {
835 case MPCT_ENTRY_INT:
836 mptable_parse_io_int(intr);
837 break;
838 case MPCT_ENTRY_LOCAL_INT:
839 mptable_parse_local_int(intr);
840 break;
841 }
842 }
843
844 /*
845 * Configure interrupt pins for a default configuration. For details see
846 * Table 5-2 in Section 5 of the MP Table specification.
847 */
848 static void
849 mptable_parse_default_config_ints(void)
850 {
851 struct INTENTRY entry;
852 int pin;
853
854 /*
855 * All default configs route IRQs from bus 0 to the first 16 pins
856 * of the first I/O APIC with an APIC ID of 2.
857 */
858 entry.type = MPCT_ENTRY_INT;
859 entry.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
860 INTENTRY_FLAGS_TRIGGER_CONFORM;
861 entry.src_bus_id = 0;
862 entry.dst_apic_id = 2;
863
864 /* Run through all 16 pins. */
865 for (pin = 0; pin < 16; pin++) {
866 entry.dst_apic_int = pin;
867 switch (pin) {
868 case 0:
869 /* Pin 0 is an ExtINT pin. */
870 entry.int_type = INTENTRY_TYPE_EXTINT;
871 break;
872 case 2:
873 /* IRQ 0 is routed to pin 2. */
874 entry.int_type = INTENTRY_TYPE_INT;
875 entry.src_bus_irq = 0;
876 break;
877 default:
878 /* All other pins are identity mapped. */
879 entry.int_type = INTENTRY_TYPE_INT;
880 entry.src_bus_irq = pin;
881 break;
882 }
883 mptable_parse_io_int(&entry);
884 }
885
886 /* Certain configs disable certain pins. */
887 if (mpfps->config_type == 7)
888 ioapic_disable_pin(ioapics[2], 0);
889 if (mpfps->config_type == 2) {
890 ioapic_disable_pin(ioapics[2], 2);
891 ioapic_disable_pin(ioapics[2], 13);
892 }
893 }
894
895 /*
896 * Configure the interrupt pins
897 */
898 static void
899 mptable_parse_ints(void)
900 {
901
902 /* Is this a pre-defined config? */
903 if (mpfps->config_type != 0) {
904 /* Configure LINT pins. */
905 lapic_set_lvt_mode(APIC_ID_ALL, APIC_LVT_LINT0,
906 APIC_LVT_DM_EXTINT);
907 lapic_set_lvt_mode(APIC_ID_ALL, APIC_LVT_LINT1, APIC_LVT_DM_NMI);
908
909 /* Configure I/O APIC pins. */
910 mptable_parse_default_config_ints();
911 } else
912 mptable_walk_table(mptable_parse_ints_handler, NULL);
913 }
914
915 #ifdef MPTABLE_FORCE_HTT
916 /*
917 * Perform a hyperthreading "fix-up" to enumerate any logical CPU's
918 * that aren't already listed in the table.
919 *
920 * XXX: We assume that all of the physical CPUs in the
921 * system have the same number of logical CPUs.
922 *
923 * XXX: We assume that APIC ID's are allocated such that
924 * the APIC ID's for a physical processor are aligned
925 * with the number of logical CPU's in the processor.
926 */
927 static void
928 mptable_hyperthread_fixup(u_int id_mask)
929 {
930 u_int i, id, logical_cpus;
931
932 /* Nothing to do if there is no HTT support. */
933 if ((cpu_feature & CPUID_HTT) == 0)
934 return;
935 logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
936 if (logical_cpus <= 1)
937 return;
938
939 /*
940 * For each APIC ID of a CPU that is set in the mask,
941 * scan the other candidate APIC ID's for this
942 * physical processor. If any of those ID's are
943 * already in the table, then kill the fixup.
944 */
945 for (id = 0; id <= MAX_LAPIC_ID; id++) {
946 if ((id_mask & 1 << id) == 0)
947 continue;
948 /* First, make sure we are on a logical_cpus boundary. */
949 if (id % logical_cpus != 0)
950 return;
951 for (i = id + 1; i < id + logical_cpus; i++)
952 if ((id_mask & 1 << i) != 0)
953 return;
954 }
955
956 /*
957 * Ok, the ID's checked out, so perform the fixup by
958 * adding the logical CPUs.
959 */
960 while ((id = ffs(id_mask)) != 0) {
961 id--;
962 for (i = id + 1; i < id + logical_cpus; i++) {
963 if (bootverbose)
964 printf(
965 "MPTable: Adding logical CPU %d from main CPU %d\n",
966 i, id);
967 lapic_create(i, 0);
968 }
969 id_mask &= ~(1 << id);
970 }
971 }
972 #endif /* MPTABLE_FORCE_HTT */
973
974 /*
975 * Support code for routing PCI interrupts using the MP Table.
976 */
977 static void
978 mptable_pci_setup(void)
979 {
980 int i;
981
982 /*
983 * Find the first pci bus and call it 0. Panic if pci0 is not
984 * bus zero and there are multiple PCI busses.
985 */
986 for (i = 0; i <= mptable_maxbusid; i++)
987 if (busses[i].bus_type == PCI) {
988 if (pci0 == -1)
989 pci0 = i;
990 else if (pci0 != 0)
991 panic(
992 "MPTable contains multiple PCI busses but no PCI bus 0");
993 }
994 }
995
996 static void
997 mptable_pci_probe_table_handler(u_char *entry, void *arg)
998 {
999 struct pci_probe_table_args *args;
1000 int_entry_ptr intr;
1001
1002 if (*entry != MPCT_ENTRY_INT)
1003 return;
1004 intr = (int_entry_ptr)entry;
1005 args = (struct pci_probe_table_args *)arg;
1006 KASSERT(args->bus <= mptable_maxbusid,
1007 ("bus %d is too big", args->bus));
1008 KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus"));
1009 if (intr->src_bus_id == args->bus)
1010 args->found = 1;
1011 }
1012
1013 int
1014 mptable_pci_probe_table(int bus)
1015 {
1016 struct pci_probe_table_args args;
1017
1018 if (bus < 0)
1019 return (EINVAL);
1020 if (mpct == NULL || pci0 == -1 || pci0 + bus > mptable_maxbusid)
1021 return (ENXIO);
1022 if (busses[pci0 + bus].bus_type != PCI)
1023 return (ENXIO);
1024 args.bus = pci0 + bus;
1025 args.found = 0;
1026 mptable_walk_table(mptable_pci_probe_table_handler, &args);
1027 if (args.found == 0)
1028 return (ENXIO);
1029 return (0);
1030 }
1031
1032 static void
1033 mptable_pci_route_interrupt_handler(u_char *entry, void *arg)
1034 {
1035 struct pci_route_interrupt_args *args;
1036 int_entry_ptr intr;
1037 int vector;
1038
1039 if (*entry != MPCT_ENTRY_INT)
1040 return;
1041 intr = (int_entry_ptr)entry;
1042 args = (struct pci_route_interrupt_args *)arg;
1043 if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq)
1044 return;
1045
1046 /* Make sure the APIC maps to a known APIC. */
1047 KASSERT(ioapics[intr->dst_apic_id] != NULL,
1048 ("No I/O APIC %d to route interrupt to", intr->dst_apic_id));
1049
1050 /*
1051 * Look up the vector for this APIC / pin combination. If we
1052 * have previously matched an entry for this PCI IRQ but it
1053 * has the same vector as this entry, just return. Otherwise,
1054 * we use the vector for this APIC / pin combination.
1055 */
1056 vector = ioapic_get_vector(ioapics[intr->dst_apic_id],
1057 intr->dst_apic_int);
1058 if (args->vector == vector)
1059 return;
1060 KASSERT(args->vector == -1,
1061 ("Multiple IRQs for PCI interrupt %d.%d.INT%c: %d and %d\n",
1062 args->bus, args->irq >> 2, 'A' + (args->irq & 0x3), args->vector,
1063 vector));
1064 args->vector = vector;
1065 }
1066
1067 int
1068 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
1069 {
1070 struct pci_route_interrupt_args args;
1071 int slot;
1072
1073 /* Like ACPI, pin numbers are 0-3, not 1-4. */
1074 pin--;
1075 KASSERT(pci0 != -1, ("do not know how to route PCI interrupts"));
1076 args.bus = pci_get_bus(dev) + pci0;
1077 slot = pci_get_slot(dev);
1078
1079 /*
1080 * PCI interrupt entries in the MP Table encode both the slot and
1081 * pin into the IRQ with the pin being the two least significant
1082 * bits, the slot being the next five bits, and the most significant
1083 * bit being reserved.
1084 */
1085 args.irq = slot << 2 | pin;
1086 args.vector = -1;
1087 mptable_walk_table(mptable_pci_route_interrupt_handler, &args);
1088 if (args.vector < 0) {
1089 device_printf(pcib, "unable to route slot %d INT%c\n", slot,
1090 'A' + pin);
1091 return (PCI_INVALID_IRQ);
1092 }
1093 if (bootverbose)
1094 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot,
1095 'A' + pin, args.vector);
1096 return (args.vector);
1097 }
1098
1099 #ifdef NEW_PCIB
1100 struct host_res_args {
1101 struct mptable_hostb_softc *sc;
1102 device_t dev;
1103 u_char bus;
1104 };
1105
1106 /*
1107 * Initialize a Host-PCI bridge so it can restrict resource allocation
1108 * requests to the resources it actually decodes according to MP
1109 * config table extended entries.
1110 */
1111 static void
1112 mptable_host_res_handler(ext_entry_ptr entry, void *arg)
1113 {
1114 struct host_res_args *args;
1115 cbasm_entry_ptr cbasm;
1116 sas_entry_ptr sas;
1117 const char *name;
1118 uint64_t start, end;
1119 int error, *flagp, flags, type;
1120
1121 args = arg;
1122 switch (entry->type) {
1123 case MPCT_EXTENTRY_SAS:
1124 sas = (sas_entry_ptr)entry;
1125 if (sas->bus_id != args->bus)
1126 break;
1127 switch (sas->address_type) {
1128 case SASENTRY_TYPE_IO:
1129 type = SYS_RES_IOPORT;
1130 flags = 0;
1131 break;
1132 case SASENTRY_TYPE_MEMORY:
1133 type = SYS_RES_MEMORY;
1134 flags = 0;
1135 break;
1136 case SASENTRY_TYPE_PREFETCH:
1137 type = SYS_RES_MEMORY;
1138 flags = RF_PREFETCHABLE;
1139 break;
1140 default:
1141 printf(
1142 "MPTable: Unknown systems address space type for bus %u: %d\n",
1143 sas->bus_id, sas->address_type);
1144 return;
1145 }
1146 start = sas->address_base;
1147 end = sas->address_base + sas->address_length - 1;
1148 #ifdef __i386__
1149 if (start > ULONG_MAX) {
1150 device_printf(args->dev,
1151 "Ignoring %d range above 4GB (%#jx-%#jx)\n",
1152 type, (uintmax_t)start, (uintmax_t)end);
1153 break;
1154 }
1155 if (end > ULONG_MAX) {
1156 device_printf(args->dev,
1157 "Truncating end of %d range above 4GB (%#jx-%#jx)\n",
1158 type, (uintmax_t)start, (uintmax_t)end);
1159 end = ULONG_MAX;
1160 }
1161 #endif
1162 error = pcib_host_res_decodes(&args->sc->sc_host_res, type,
1163 start, end, flags);
1164 if (error)
1165 panic("Failed to manage %d range (%#jx-%#jx): %d",
1166 type, (uintmax_t)start, (uintmax_t)end, error);
1167 break;
1168 case MPCT_EXTENTRY_CBASM:
1169 cbasm = (cbasm_entry_ptr)entry;
1170 if (cbasm->bus_id != args->bus)
1171 break;
1172 switch (cbasm->predefined_range) {
1173 case CBASMENTRY_RANGE_ISA_IO:
1174 flagp = &args->sc->sc_decodes_isa_io;
1175 name = "ISA I/O";
1176 break;
1177 case CBASMENTRY_RANGE_VGA_IO:
1178 flagp = &args->sc->sc_decodes_vga_io;
1179 name = "VGA I/O";
1180 break;
1181 default:
1182 printf(
1183 "MPTable: Unknown compatiblity address space range for bus %u: %d\n",
1184 cbasm->bus_id, cbasm->predefined_range);
1185 return;
1186 }
1187 if (*flagp != 0)
1188 printf(
1189 "MPTable: Duplicate compatibility %s range for bus %u\n",
1190 name, cbasm->bus_id);
1191 switch (cbasm->address_mod) {
1192 case CBASMENTRY_ADDRESS_MOD_ADD:
1193 *flagp = 1;
1194 if (bootverbose)
1195 device_printf(args->dev, "decoding %s ports\n",
1196 name);
1197 break;
1198 case CBASMENTRY_ADDRESS_MOD_SUBTRACT:
1199 *flagp = -1;
1200 if (bootverbose)
1201 device_printf(args->dev,
1202 "not decoding %s ports\n", name);
1203 break;
1204 default:
1205 printf(
1206 "MPTable: Unknown compatibility address space modifier: %u\n",
1207 cbasm->address_mod);
1208 break;
1209 }
1210 break;
1211 }
1212 }
1213
1214 void
1215 mptable_pci_host_res_init(device_t pcib)
1216 {
1217 struct host_res_args args;
1218
1219 KASSERT(pci0 != -1, ("do not know how to map PCI bus IDs"));
1220 args.bus = pci_get_bus(pcib) + pci0;
1221 args.dev = pcib;
1222 args.sc = device_get_softc(pcib);
1223 if (pcib_host_res_init(pcib, &args.sc->sc_host_res) != 0)
1224 panic("failed to init hostb resources");
1225 mptable_walk_extended_table(mptable_host_res_handler, &args);
1226 }
1227 #endif
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