The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/xen/interface/arch-arm.h

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    1 /******************************************************************************
    2  * arch-arm.h
    3  *
    4  * Guest OS interface to ARM Xen.
    5  *
    6  * Permission is hereby granted, free of charge, to any person obtaining a copy
    7  * of this software and associated documentation files (the "Software"), to
    8  * deal in the Software without restriction, including without limitation the
    9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   10  * sell copies of the Software, and to permit persons to whom the Software is
   11  * furnished to do so, subject to the following conditions:
   12  *
   13  * The above copyright notice and this permission notice shall be included in
   14  * all copies or substantial portions of the Software.
   15  *
   16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
   19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
   20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
   21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
   22  * DEALINGS IN THE SOFTWARE.
   23  *
   24  * Copyright 2011 (C) Citrix Systems
   25  */
   26 
   27 #ifndef __XEN_PUBLIC_ARCH_ARM_H__
   28 #define __XEN_PUBLIC_ARCH_ARM_H__
   29 
   30 /*
   31  * `incontents 50 arm_abi Hypercall Calling Convention
   32  *
   33  * A hypercall is issued using the ARM HVC instruction.
   34  *
   35  * A hypercall can take up to 5 arguments. These are passed in
   36  * registers, the first argument in x0/r0 (for arm64/arm32 guests
   37  * respectively irrespective of whether the underlying hypervisor is
   38  * 32- or 64-bit), the second argument in x1/r1, the third in x2/r2,
   39  * the forth in x3/r3 and the fifth in x4/r4.
   40  *
   41  * The hypercall number is passed in r12 (arm) or x16 (arm64). In both
   42  * cases the relevant ARM procedure calling convention specifies this
   43  * is an inter-procedure-call scratch register (e.g. for use in linker
   44  * stubs). This use does not conflict with use during a hypercall.
   45  *
   46  * The HVC ISS must contain a Xen specific TAG: XEN_HYPERCALL_TAG.
   47  *
   48  * The return value is in x0/r0.
   49  *
   50  * The hypercall will clobber x16/r12 and the argument registers used
   51  * by that hypercall (except r0 which is the return value) i.e. in
   52  * addition to x16/r12 a 2 argument hypercall will clobber x1/r1 and a
   53  * 4 argument hypercall will clobber x1/r1, x2/r2 and x3/r3.
   54  *
   55  * Parameter structs passed to hypercalls are laid out according to
   56  * the Procedure Call Standard for the ARM Architecture (AAPCS, AKA
   57  * EABI) and Procedure Call Standard for the ARM 64-bit Architecture
   58  * (AAPCS64). Where there is a conflict the 64-bit standard should be
   59  * used regardless of guest type. Structures which are passed as
   60  * hypercall arguments are always little endian.
   61  *
   62  * All memory which is shared with other entities in the system
   63  * (including the hypervisor and other guests) must reside in memory
   64  * which is mapped as Normal Inner-cacheable. This applies to:
   65  *  - hypercall arguments passed via a pointer to guest memory.
   66  *  - memory shared via the grant table mechanism (including PV I/O
   67  *    rings etc).
   68  *  - memory shared with the hypervisor (struct shared_info, struct
   69  *    vcpu_info, the grant table, etc).
   70  *
   71  * Any Inner cache allocation strategy (Write-Back, Write-Through etc)
   72  * is acceptable. There is no restriction on the Outer-cacheability.
   73  */
   74 
   75 /*
   76  * `incontents 55 arm_hcall Supported Hypercalls
   77  *
   78  * Xen on ARM makes extensive use of hardware facilities and therefore
   79  * only a subset of the potential hypercalls are required.
   80  *
   81  * Since ARM uses second stage paging any machine/physical addresses
   82  * passed to hypercalls are Guest Physical Addresses (Intermediate
   83  * Physical Addresses) unless otherwise noted.
   84  *
   85  * The following hypercalls (and sub operations) are supported on the
   86  * ARM platform. Other hypercalls should be considered
   87  * unavailable/unsupported.
   88  *
   89  *  HYPERVISOR_memory_op
   90  *   All generic sub-operations
   91  *
   92  *  HYPERVISOR_domctl
   93  *   All generic sub-operations, with the exception of:
   94  *    * XEN_DOMCTL_irq_permission (not yet implemented)
   95  *
   96  *  HYPERVISOR_sched_op
   97  *   All generic sub-operations, with the exception of:
   98  *    * SCHEDOP_block -- prefer wfi hardware instruction
   99  *
  100  *  HYPERVISOR_console_io
  101  *   All generic sub-operations
  102  *
  103  *  HYPERVISOR_xen_version
  104  *   All generic sub-operations
  105  *
  106  *  HYPERVISOR_event_channel_op
  107  *   All generic sub-operations
  108  *
  109  *  HYPERVISOR_physdev_op
  110  *   No sub-operations are currenty supported
  111  *
  112  *  HYPERVISOR_sysctl
  113  *   All generic sub-operations, with the exception of:
  114  *    * XEN_SYSCTL_page_offline_op
  115  *    * XEN_SYSCTL_get_pmstat
  116  *    * XEN_SYSCTL_pm_op
  117  *
  118  *  HYPERVISOR_hvm_op
  119  *   Exactly these sub-operations are supported:
  120  *    * HVMOP_set_param
  121  *    * HVMOP_get_param
  122  *
  123  *  HYPERVISOR_grant_table_op
  124  *   All generic sub-operations
  125  *
  126  *  HYPERVISOR_vcpu_op
  127  *   Exactly these sub-operations are supported:
  128  *    * VCPUOP_register_vcpu_info
  129  *    * VCPUOP_register_runstate_memory_area
  130  *
  131  *
  132  * Other notes on the ARM ABI:
  133  *
  134  * - struct start_info is not exported to ARM guests.
  135  *
  136  * - struct shared_info is mapped by ARM guests using the
  137  *   HYPERVISOR_memory_op sub-op XENMEM_add_to_physmap, passing
  138  *   XENMAPSPACE_shared_info as space parameter.
  139  *
  140  * - All the per-cpu struct vcpu_info are mapped by ARM guests using the
  141  *   HYPERVISOR_vcpu_op sub-op VCPUOP_register_vcpu_info, including cpu0
  142  *   struct vcpu_info.
  143  *
  144  * - The grant table is mapped using the HYPERVISOR_memory_op sub-op
  145  *   XENMEM_add_to_physmap, passing XENMAPSPACE_grant_table as space
  146  *   parameter. The memory range specified under the Xen compatible
  147  *   hypervisor node on device tree can be used as target gpfn for the
  148  *   mapping.
  149  *
  150  * - Xenstore is initialized by using the two hvm_params
  151  *   HVM_PARAM_STORE_PFN and HVM_PARAM_STORE_EVTCHN. They can be read
  152  *   with the HYPERVISOR_hvm_op sub-op HVMOP_get_param.
  153  *
  154  * - The paravirtualized console is initialized by using the two
  155  *   hvm_params HVM_PARAM_CONSOLE_PFN and HVM_PARAM_CONSOLE_EVTCHN. They
  156  *   can be read with the HYPERVISOR_hvm_op sub-op HVMOP_get_param.
  157  *
  158  * - Event channel notifications are delivered using the percpu GIC
  159  *   interrupt specified under the Xen compatible hypervisor node on
  160  *   device tree.
  161  *
  162  * - The device tree Xen compatible node is fully described under Linux
  163  *   at Documentation/devicetree/bindings/arm/xen.txt.
  164  */
  165 
  166 #define XEN_HYPERCALL_TAG   0XEA1
  167 
  168 #define  int64_aligned_t  int64_t __attribute__((aligned(8)))
  169 #define uint64_aligned_t uint64_t __attribute__((aligned(8)))
  170 
  171 #ifndef __ASSEMBLY__
  172 #define ___DEFINE_XEN_GUEST_HANDLE(name, type)                  \
  173     typedef union { type *p; unsigned long q; }                 \
  174         __guest_handle_ ## name;                                \
  175     typedef union { type *p; uint64_aligned_t q; }              \
  176         __guest_handle_64_ ## name;
  177 
  178 /*
  179  * XEN_GUEST_HANDLE represents a guest pointer, when passed as a field
  180  * in a struct in memory. On ARM is always 8 bytes sizes and 8 bytes
  181  * aligned.
  182  * XEN_GUEST_HANDLE_PARAM represents a guest pointer, when passed as an
  183  * hypercall argument. It is 4 bytes on aarch32 and 8 bytes on aarch64.
  184  */
  185 #define __DEFINE_XEN_GUEST_HANDLE(name, type) \
  186     ___DEFINE_XEN_GUEST_HANDLE(name, type);   \
  187     ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type)
  188 #define DEFINE_XEN_GUEST_HANDLE(name)   __DEFINE_XEN_GUEST_HANDLE(name, name)
  189 #define __XEN_GUEST_HANDLE(name)        __guest_handle_64_ ## name
  190 #define XEN_GUEST_HANDLE(name)          __XEN_GUEST_HANDLE(name)
  191 #define XEN_GUEST_HANDLE_PARAM(name)    __guest_handle_ ## name
  192 #define set_xen_guest_handle_raw(hnd, val)                  \
  193     do {                                                    \
  194         typeof(&(hnd)) _sxghr_tmp = &(hnd);                 \
  195         _sxghr_tmp->q = 0;                                  \
  196         _sxghr_tmp->p = val;                                \
  197     } while ( 0 )
  198 #ifdef __XEN_TOOLS__
  199 #define get_xen_guest_handle(val, hnd)  do { val = (hnd).p; } while (0)
  200 #endif
  201 #define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val)
  202 
  203 #if defined(__GNUC__) && !defined(__STRICT_ANSI__)
  204 /* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */
  205 # define __DECL_REG(n64, n32) union {          \
  206         uint64_t n64;                          \
  207         uint32_t n32;                          \
  208     }
  209 #else
  210 /* Non-gcc sources must always use the proper 64-bit name (e.g., x0). */
  211 #define __DECL_REG(n64, n32) uint64_t n64
  212 #endif
  213 
  214 struct vcpu_guest_core_regs
  215 {
  216     /*         Aarch64       Aarch32 */
  217     __DECL_REG(x0,           r0_usr);
  218     __DECL_REG(x1,           r1_usr);
  219     __DECL_REG(x2,           r2_usr);
  220     __DECL_REG(x3,           r3_usr);
  221     __DECL_REG(x4,           r4_usr);
  222     __DECL_REG(x5,           r5_usr);
  223     __DECL_REG(x6,           r6_usr);
  224     __DECL_REG(x7,           r7_usr);
  225     __DECL_REG(x8,           r8_usr);
  226     __DECL_REG(x9,           r9_usr);
  227     __DECL_REG(x10,          r10_usr);
  228     __DECL_REG(x11,          r11_usr);
  229     __DECL_REG(x12,          r12_usr);
  230 
  231     __DECL_REG(x13,          sp_usr);
  232     __DECL_REG(x14,          lr_usr);
  233 
  234     __DECL_REG(x15,          __unused_sp_hyp);
  235 
  236     __DECL_REG(x16,          lr_irq);
  237     __DECL_REG(x17,          sp_irq);
  238 
  239     __DECL_REG(x18,          lr_svc);
  240     __DECL_REG(x19,          sp_svc);
  241 
  242     __DECL_REG(x20,          lr_abt);
  243     __DECL_REG(x21,          sp_abt);
  244 
  245     __DECL_REG(x22,          lr_und);
  246     __DECL_REG(x23,          sp_und);
  247 
  248     __DECL_REG(x24,          r8_fiq);
  249     __DECL_REG(x25,          r9_fiq);
  250     __DECL_REG(x26,          r10_fiq);
  251     __DECL_REG(x27,          r11_fiq);
  252     __DECL_REG(x28,          r12_fiq);
  253 
  254     __DECL_REG(x29,          sp_fiq);
  255     __DECL_REG(x30,          lr_fiq);
  256 
  257     /* Return address and mode */
  258     __DECL_REG(pc64,         pc32);             /* ELR_EL2 */
  259     uint32_t cpsr;                              /* SPSR_EL2 */
  260 
  261     union {
  262         uint32_t spsr_el1;       /* AArch64 */
  263         uint32_t spsr_svc;       /* AArch32 */
  264     };
  265 
  266     /* AArch32 guests only */
  267     uint32_t spsr_fiq, spsr_irq, spsr_und, spsr_abt;
  268 
  269     /* AArch64 guests only */
  270     uint64_t sp_el0;
  271     uint64_t sp_el1, elr_el1;
  272 };
  273 typedef struct vcpu_guest_core_regs vcpu_guest_core_regs_t;
  274 DEFINE_XEN_GUEST_HANDLE(vcpu_guest_core_regs_t);
  275 
  276 #undef __DECL_REG
  277 
  278 typedef uint64_t xen_pfn_t;
  279 #define PRI_xen_pfn PRIx64
  280 
  281 /* Maximum number of virtual CPUs in legacy multi-processor guests. */
  282 /* Only one. All other VCPUS must use VCPUOP_register_vcpu_info */
  283 #define XEN_LEGACY_MAX_VCPUS 1
  284 
  285 typedef uint64_t xen_ulong_t;
  286 #define PRI_xen_ulong PRIx64
  287 
  288 #if defined(__XEN__) || defined(__XEN_TOOLS__)
  289 struct vcpu_guest_context {
  290 #define _VGCF_online                   0
  291 #define VGCF_online                    (1<<_VGCF_online)
  292     uint32_t flags;                         /* VGCF_* */
  293 
  294     struct vcpu_guest_core_regs user_regs;  /* Core CPU registers */
  295 
  296     uint32_t sctlr;
  297     uint64_t ttbcr, ttbr0, ttbr1;
  298 };
  299 typedef struct vcpu_guest_context vcpu_guest_context_t;
  300 DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t);
  301 
  302 /*
  303  * struct xen_arch_domainconfig's ABI is covered by
  304  * XEN_DOMCTL_INTERFACE_VERSION.
  305  */
  306 #define XEN_DOMCTL_CONFIG_GIC_NATIVE    0
  307 #define XEN_DOMCTL_CONFIG_GIC_V2        1
  308 #define XEN_DOMCTL_CONFIG_GIC_V3        2
  309 struct xen_arch_domainconfig {
  310     /* IN/OUT */
  311     uint8_t gic_version;
  312     /* IN */
  313     uint32_t nr_spis;
  314     /*
  315      * OUT
  316      * Based on the property clock-frequency in the DT timer node.
  317      * The property may be present when the bootloader/firmware doesn't
  318      * set correctly CNTFRQ which hold the timer frequency.
  319      *
  320      * As it's not possible to trap this register, we have to replicate
  321      * the value in the guest DT.
  322      *
  323      * = 0 => property not present
  324      * > 0 => Value of the property
  325      *
  326      */
  327     uint32_t clock_frequency;
  328 };
  329 #endif /* __XEN__ || __XEN_TOOLS__ */
  330 
  331 struct arch_vcpu_info {
  332 };
  333 typedef struct arch_vcpu_info arch_vcpu_info_t;
  334 
  335 struct arch_shared_info {
  336 };
  337 typedef struct arch_shared_info arch_shared_info_t;
  338 typedef uint64_t xen_callback_t;
  339 
  340 #endif
  341 
  342 #if defined(__XEN__) || defined(__XEN_TOOLS__)
  343 
  344 /* PSR bits (CPSR, SPSR) */
  345 
  346 #define PSR_THUMB       (1<<5)        /* Thumb Mode enable */
  347 #define PSR_FIQ_MASK    (1<<6)        /* Fast Interrupt mask */
  348 #define PSR_IRQ_MASK    (1<<7)        /* Interrupt mask */
  349 #define PSR_ABT_MASK    (1<<8)        /* Asynchronous Abort mask */
  350 #define PSR_BIG_ENDIAN  (1<<9)        /* arm32: Big Endian Mode */
  351 #define PSR_DBG_MASK    (1<<9)        /* arm64: Debug Exception mask */
  352 #define PSR_IT_MASK     (0x0600fc00)  /* Thumb If-Then Mask */
  353 #define PSR_JAZELLE     (1<<24)       /* Jazelle Mode */
  354 
  355 /* 32 bit modes */
  356 #define PSR_MODE_USR 0x10
  357 #define PSR_MODE_FIQ 0x11
  358 #define PSR_MODE_IRQ 0x12
  359 #define PSR_MODE_SVC 0x13
  360 #define PSR_MODE_MON 0x16
  361 #define PSR_MODE_ABT 0x17
  362 #define PSR_MODE_HYP 0x1a
  363 #define PSR_MODE_UND 0x1b
  364 #define PSR_MODE_SYS 0x1f
  365 
  366 /* 64 bit modes */
  367 #define PSR_MODE_BIT  0x10 /* Set iff AArch32 */
  368 #define PSR_MODE_EL3h 0x0d
  369 #define PSR_MODE_EL3t 0x0c
  370 #define PSR_MODE_EL2h 0x09
  371 #define PSR_MODE_EL2t 0x08
  372 #define PSR_MODE_EL1h 0x05
  373 #define PSR_MODE_EL1t 0x04
  374 #define PSR_MODE_EL0t 0x00
  375 
  376 #define PSR_GUEST32_INIT  (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_SVC)
  377 #define PSR_GUEST64_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h)
  378 
  379 #define SCTLR_GUEST_INIT    0x00c50078
  380 
  381 /*
  382  * Virtual machine platform (memory layout, interrupts)
  383  *
  384  * These are defined for consistency between the tools and the
  385  * hypervisor. Guests must not rely on these hardcoded values but
  386  * should instead use the FDT.
  387  */
  388 
  389 /* Physical Address Space */
  390 
  391 /*
  392  * vGIC mappings: Only one set of mapping is used by the guest.
  393  * Therefore they can overlap.
  394  */
  395 
  396 /* vGIC v2 mappings */
  397 #define GUEST_GICD_BASE   0x03001000ULL
  398 #define GUEST_GICD_SIZE   0x00001000ULL
  399 #define GUEST_GICC_BASE   0x03002000ULL
  400 #define GUEST_GICC_SIZE   0x00000100ULL
  401 
  402 /* vGIC v3 mappings */
  403 #define GUEST_GICV3_GICD_BASE      0x03001000ULL
  404 #define GUEST_GICV3_GICD_SIZE      0x00010000ULL
  405 
  406 #define GUEST_GICV3_RDIST_STRIDE   0x20000ULL
  407 #define GUEST_GICV3_RDIST_REGIONS  1
  408 
  409 #define GUEST_GICV3_GICR0_BASE     0x03020000ULL    /* vCPU0 - vCPU127 */
  410 #define GUEST_GICV3_GICR0_SIZE     0x01000000ULL
  411 
  412 /*
  413  * 16MB == 4096 pages reserved for guest to use as a region to map its
  414  * grant table in.
  415  */
  416 #define GUEST_GNTTAB_BASE 0x38000000ULL
  417 #define GUEST_GNTTAB_SIZE 0x01000000ULL
  418 
  419 #define GUEST_MAGIC_BASE  0x39000000ULL
  420 #define GUEST_MAGIC_SIZE  0x01000000ULL
  421 
  422 #define GUEST_RAM_BANKS   2
  423 
  424 #define GUEST_RAM0_BASE   0x40000000ULL /* 3GB of low RAM @ 1GB */
  425 #define GUEST_RAM0_SIZE   0xc0000000ULL
  426 
  427 #define GUEST_RAM1_BASE   0x0200000000ULL /* 1016GB of RAM @ 8GB */
  428 #define GUEST_RAM1_SIZE   0xfe00000000ULL
  429 
  430 #define GUEST_RAM_BASE    GUEST_RAM0_BASE /* Lowest RAM address */
  431 /* Largest amount of actual RAM, not including holes */
  432 #define GUEST_RAM_MAX     (GUEST_RAM0_SIZE + GUEST_RAM1_SIZE)
  433 /* Suitable for e.g. const uint64_t ramfoo[] = GUEST_RAM_BANK_FOOS; */
  434 #define GUEST_RAM_BANK_BASES   { GUEST_RAM0_BASE, GUEST_RAM1_BASE }
  435 #define GUEST_RAM_BANK_SIZES   { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE }
  436 
  437 /* Interrupts */
  438 #define GUEST_TIMER_VIRT_PPI    27
  439 #define GUEST_TIMER_PHYS_S_PPI  29
  440 #define GUEST_TIMER_PHYS_NS_PPI 30
  441 #define GUEST_EVTCHN_PPI        31
  442 
  443 /* PSCI functions */
  444 #define PSCI_cpu_suspend 0
  445 #define PSCI_cpu_off     1
  446 #define PSCI_cpu_on      2
  447 #define PSCI_migrate     3
  448 
  449 #endif
  450 
  451 #ifndef __ASSEMBLY__
  452 /* Stub definition of PMU structure */
  453 typedef struct xen_pmu_arch { uint8_t dummy; } xen_pmu_arch_t;
  454 #endif
  455 
  456 #endif /*  __XEN_PUBLIC_ARCH_ARM_H__ */
  457 
  458 /*
  459  * Local variables:
  460  * mode: C
  461  * c-file-style: "BSD"
  462  * c-basic-offset: 4
  463  * tab-width: 4
  464  * indent-tabs-mode: nil
  465  * End:
  466  */

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