The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/xen/interface/arch-ia64.h

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    1 /******************************************************************************
    2  * arch-ia64/hypervisor-if.h
    3  * 
    4  * Guest OS interface to IA64 Xen.
    5  *
    6  * Permission is hereby granted, free of charge, to any person obtaining a copy
    7  * of this software and associated documentation files (the "Software"), to
    8  * deal in the Software without restriction, including without limitation the
    9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   10  * sell copies of the Software, and to permit persons to whom the Software is
   11  * furnished to do so, subject to the following conditions:
   12  *
   13  * The above copyright notice and this permission notice shall be included in
   14  * all copies or substantial portions of the Software.
   15  *
   16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
   19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
   20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
   21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
   22  * DEALINGS IN THE SOFTWARE.
   23  *
   24  */
   25 
   26 #include "xen.h"
   27 
   28 #ifndef __HYPERVISOR_IF_IA64_H__
   29 #define __HYPERVISOR_IF_IA64_H__
   30 
   31 #if !defined(__GNUC__) || defined(__STRICT_ANSI__)
   32 #error "Anonymous structs/unions are a GNU extension."
   33 #endif
   34 
   35 /* Structural guest handles introduced in 0x00030201. */
   36 #if __XEN_INTERFACE_VERSION__ >= 0x00030201
   37 #define ___DEFINE_XEN_GUEST_HANDLE(name, type) \
   38     typedef struct { type *p; } __guest_handle_ ## name
   39 #else
   40 #define ___DEFINE_XEN_GUEST_HANDLE(name, type) \
   41     typedef type * __guest_handle_ ## name
   42 #endif
   43 
   44 #define __DEFINE_XEN_GUEST_HANDLE(name, type) \
   45     ___DEFINE_XEN_GUEST_HANDLE(name, type);   \
   46     ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type)
   47 
   48 #define DEFINE_XEN_GUEST_HANDLE(name)   __DEFINE_XEN_GUEST_HANDLE(name, name)
   49 #define XEN_GUEST_HANDLE(name)          __guest_handle_ ## name
   50 #define XEN_GUEST_HANDLE_64(name)       XEN_GUEST_HANDLE(name)
   51 #define uint64_aligned_t                uint64_t
   52 #define set_xen_guest_handle_raw(hnd, val)  do { (hnd).p = val; } while (0)
   53 #ifdef __XEN_TOOLS__
   54 #define get_xen_guest_handle(val, hnd)  do { val = (hnd).p; } while (0)
   55 #endif
   56 #define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val)
   57 
   58 #ifndef __ASSEMBLY__
   59 typedef unsigned long xen_pfn_t;
   60 #define PRI_xen_pfn "lx"
   61 #endif
   62 
   63 /* Arch specific VIRQs definition */
   64 #define VIRQ_ITC        VIRQ_ARCH_0 /* V. Virtual itc timer */
   65 #define VIRQ_MCA_CMC    VIRQ_ARCH_1 /* MCA cmc interrupt */
   66 #define VIRQ_MCA_CPE    VIRQ_ARCH_2 /* MCA cpe interrupt */
   67 
   68 /* Maximum number of virtual CPUs in multi-processor guests. */
   69 /* WARNING: before changing this, check that shared_info fits on a page */
   70 #define XEN_LEGACY_MAX_VCPUS 64
   71 
   72 /* IO ports location for PV.  */
   73 #define IO_PORTS_PADDR          0x00000ffffc000000UL
   74 #define IO_PORTS_SIZE           0x0000000004000000UL
   75 
   76 #ifndef __ASSEMBLY__
   77 
   78 typedef unsigned long xen_ulong_t;
   79 
   80 #ifdef __XEN_TOOLS__
   81 #define XEN_PAGE_SIZE XC_PAGE_SIZE
   82 #else
   83 #define XEN_PAGE_SIZE PAGE_SIZE
   84 #endif
   85 
   86 #define INVALID_MFN       (~0UL)
   87 
   88 struct pt_fpreg {
   89     union {
   90         unsigned long bits[2];
   91         long double __dummy;    /* force 16-byte alignment */
   92     } u;
   93 };
   94 
   95 union vac {
   96     unsigned long value;
   97     struct {
   98         int a_int:1;
   99         int a_from_int_cr:1;
  100         int a_to_int_cr:1;
  101         int a_from_psr:1;
  102         int a_from_cpuid:1;
  103         int a_cover:1;
  104         int a_bsw:1;
  105         long reserved:57;
  106     };
  107 };
  108 typedef union vac vac_t;
  109 
  110 union vdc {
  111     unsigned long value;
  112     struct {
  113         int d_vmsw:1;
  114         int d_extint:1;
  115         int d_ibr_dbr:1;
  116         int d_pmc:1;
  117         int d_to_pmd:1;
  118         int d_itm:1;
  119         long reserved:58;
  120     };
  121 };
  122 typedef union vdc vdc_t;
  123 
  124 struct mapped_regs {
  125     union vac   vac;
  126     union vdc   vdc;
  127     unsigned long  virt_env_vaddr;
  128     unsigned long  reserved1[29];
  129     unsigned long  vhpi;
  130     unsigned long  reserved2[95];
  131     union {
  132         unsigned long  vgr[16];
  133         unsigned long bank1_regs[16]; // bank1 regs (r16-r31) when bank0 active
  134     };
  135     union {
  136         unsigned long  vbgr[16];
  137         unsigned long bank0_regs[16]; // bank0 regs (r16-r31) when bank1 active
  138     };
  139     unsigned long  vnat;
  140     unsigned long  vbnat;
  141     unsigned long  vcpuid[5];
  142     unsigned long  reserved3[11];
  143     unsigned long  vpsr;
  144     unsigned long  vpr;
  145     unsigned long  reserved4[76];
  146     union {
  147         unsigned long  vcr[128];
  148         struct {
  149             unsigned long dcr;  // CR0
  150             unsigned long itm;
  151             unsigned long iva;
  152             unsigned long rsv1[5];
  153             unsigned long pta;  // CR8
  154             unsigned long rsv2[7];
  155             unsigned long ipsr;  // CR16
  156             unsigned long isr;
  157             unsigned long rsv3;
  158             unsigned long iip;
  159             unsigned long ifa;
  160             unsigned long itir;
  161             unsigned long iipa;
  162             unsigned long ifs;
  163             unsigned long iim;  // CR24
  164             unsigned long iha;
  165             unsigned long rsv4[38];
  166             unsigned long lid;  // CR64
  167             unsigned long ivr;
  168             unsigned long tpr;
  169             unsigned long eoi;
  170             unsigned long irr[4];
  171             unsigned long itv;  // CR72
  172             unsigned long pmv;
  173             unsigned long cmcv;
  174             unsigned long rsv5[5];
  175             unsigned long lrr0;  // CR80
  176             unsigned long lrr1;
  177             unsigned long rsv6[46];
  178         };
  179     };
  180     union {
  181         unsigned long  reserved5[128];
  182         struct {
  183             unsigned long precover_ifs;
  184             unsigned long unat;  // not sure if this is needed until NaT arch is done
  185             int interrupt_collection_enabled; // virtual psr.ic
  186             /* virtual interrupt deliverable flag is evtchn_upcall_mask in
  187              * shared info area now. interrupt_mask_addr is the address
  188              * of evtchn_upcall_mask for current vcpu
  189              */
  190             unsigned char *interrupt_mask_addr;
  191             int pending_interruption;
  192             unsigned char vpsr_pp;
  193             unsigned char vpsr_dfh;
  194             unsigned char hpsr_dfh;
  195             unsigned char hpsr_mfh;
  196             unsigned long reserved5_1[4];
  197             int metaphysical_mode; // 1 = use metaphys mapping, 0 = use virtual
  198             int banknum; // 0 or 1, which virtual register bank is active
  199             unsigned long rrs[8]; // region registers
  200             unsigned long krs[8]; // kernel registers
  201             unsigned long tmp[16]; // temp registers (e.g. for hyperprivops)
  202 
  203             /* itc paravirtualization
  204              * vAR.ITC = mAR.ITC + itc_offset
  205              * itc_last is one which was lastly passed to
  206              * the guest OS in order to prevent it from
  207              * going backwords.
  208              */
  209             unsigned long itc_offset;
  210             unsigned long itc_last;
  211         };
  212     };
  213 };
  214 typedef struct mapped_regs mapped_regs_t;
  215 
  216 struct vpd {
  217     struct mapped_regs vpd_low;
  218     unsigned long  reserved6[3456];
  219     unsigned long  vmm_avail[128];
  220     unsigned long  reserved7[4096];
  221 };
  222 typedef struct vpd vpd_t;
  223 
  224 struct arch_vcpu_info {
  225 };
  226 typedef struct arch_vcpu_info arch_vcpu_info_t;
  227 
  228 /*
  229  * This structure is used for magic page in domain pseudo physical address
  230  * space and the result of XENMEM_machine_memory_map.
  231  * As the XENMEM_machine_memory_map result,
  232  * xen_memory_map::nr_entries indicates the size in bytes 
  233  * including struct xen_ia64_memmap_info. Not the number of entries.
  234  */
  235 struct xen_ia64_memmap_info {
  236     uint64_t efi_memmap_size;       /* size of EFI memory map */
  237     uint64_t efi_memdesc_size;      /* size of an EFI memory map descriptor */
  238     uint32_t efi_memdesc_version;   /* memory descriptor version */
  239     void *memdesc[0];               /* array of efi_memory_desc_t */
  240 };
  241 typedef struct xen_ia64_memmap_info xen_ia64_memmap_info_t;
  242 
  243 struct arch_shared_info {
  244     /* PFN of the start_info page.  */
  245     unsigned long start_info_pfn;
  246 
  247     /* Interrupt vector for event channel.  */
  248     int evtchn_vector;
  249 
  250     /* PFN of memmap_info page */
  251     unsigned int memmap_info_num_pages;/* currently only = 1 case is
  252                                           supported. */
  253     unsigned long memmap_info_pfn;
  254 
  255     uint64_t pad[31];
  256 };
  257 typedef struct arch_shared_info arch_shared_info_t;
  258 
  259 typedef unsigned long xen_callback_t;
  260 
  261 struct ia64_tr_entry {
  262     unsigned long pte;
  263     unsigned long itir;
  264     unsigned long vadr;
  265     unsigned long rid;
  266 };
  267 typedef struct ia64_tr_entry ia64_tr_entry_t;
  268 DEFINE_XEN_GUEST_HANDLE(ia64_tr_entry_t);
  269 
  270 struct vcpu_tr_regs {
  271     struct ia64_tr_entry itrs[12];
  272     struct ia64_tr_entry dtrs[12];
  273 };
  274 
  275 union vcpu_ar_regs {
  276     unsigned long ar[128];
  277     struct {
  278         unsigned long kr[8];
  279         unsigned long rsv1[8];
  280         unsigned long rsc;
  281         unsigned long bsp;
  282         unsigned long bspstore;
  283         unsigned long rnat;
  284         unsigned long rsv2;
  285         unsigned long fcr;
  286         unsigned long rsv3[2];
  287         unsigned long eflag;
  288         unsigned long csd;
  289         unsigned long ssd;
  290         unsigned long cflg;
  291         unsigned long fsr;
  292         unsigned long fir;
  293         unsigned long fdr;
  294         unsigned long rsv4;
  295         unsigned long ccv; /* 32 */
  296         unsigned long rsv5[3];
  297         unsigned long unat;
  298         unsigned long rsv6[3];
  299         unsigned long fpsr;
  300         unsigned long rsv7[3];
  301         unsigned long itc;
  302         unsigned long rsv8[3];
  303         unsigned long ign1[16];
  304         unsigned long pfs; /* 64 */
  305         unsigned long lc;
  306         unsigned long ec;
  307         unsigned long rsv9[45];
  308         unsigned long ign2[16];
  309     };
  310 };
  311 
  312 union vcpu_cr_regs {
  313     unsigned long cr[128];
  314     struct {
  315         unsigned long dcr;  // CR0
  316         unsigned long itm;
  317         unsigned long iva;
  318         unsigned long rsv1[5];
  319         unsigned long pta;  // CR8
  320         unsigned long rsv2[7];
  321         unsigned long ipsr;  // CR16
  322         unsigned long isr;
  323         unsigned long rsv3;
  324         unsigned long iip;
  325         unsigned long ifa;
  326         unsigned long itir;
  327         unsigned long iipa;
  328         unsigned long ifs;
  329         unsigned long iim;  // CR24
  330         unsigned long iha;
  331         unsigned long rsv4[38];
  332         unsigned long lid;  // CR64
  333         unsigned long ivr;
  334         unsigned long tpr;
  335         unsigned long eoi;
  336         unsigned long irr[4];
  337         unsigned long itv;  // CR72
  338         unsigned long pmv;
  339         unsigned long cmcv;
  340         unsigned long rsv5[5];
  341         unsigned long lrr0;  // CR80
  342         unsigned long lrr1;
  343         unsigned long rsv6[46];
  344     };
  345 };
  346 
  347 struct vcpu_guest_context_regs {
  348         unsigned long r[32];
  349         unsigned long b[8];
  350         unsigned long bank[16];
  351         unsigned long ip;
  352         unsigned long psr;
  353         unsigned long cfm;
  354         unsigned long pr;
  355         unsigned int nats; /* NaT bits for r1-r31.  */
  356         unsigned int bnats; /* Nat bits for banked registers.  */
  357         union vcpu_ar_regs ar;
  358         union vcpu_cr_regs cr;
  359         struct pt_fpreg f[128];
  360         unsigned long dbr[8];
  361         unsigned long ibr[8];
  362         unsigned long rr[8];
  363         unsigned long pkr[16];
  364 
  365         /* FIXME: cpuid,pmd,pmc */
  366 
  367         unsigned long xip;
  368         unsigned long xpsr;
  369         unsigned long xfs;
  370         unsigned long xr[4];
  371 
  372         struct vcpu_tr_regs tr;
  373 
  374         /* Physical registers in case of debug event.  */
  375         unsigned long excp_iipa;
  376         unsigned long excp_ifa;
  377         unsigned long excp_isr;
  378         unsigned int excp_vector;
  379 
  380         /*
  381          * The rbs is intended to be the image of the stacked registers still
  382          * in the cpu (not yet stored in memory).  It is laid out as if it
  383          * were written in memory at a 512 (64*8) aligned address + offset.
  384          * rbs_voff is (offset / 8).  rbs_nat contains NaT bits for the
  385          * remaining rbs registers.  rbs_rnat contains NaT bits for in memory
  386          * rbs registers.
  387          * Note: loadrs is 2**14 bytes == 2**11 slots.
  388          */
  389         unsigned int rbs_voff;
  390         unsigned long rbs[2048];
  391         unsigned long rbs_rnat;
  392 
  393         /*
  394          * RSE.N_STACKED_PHYS via PAL_RSE_INFO
  395          * Strictly this isn't cpu context, but this value is necessary
  396          * for domain save/restore. So is here.
  397          */
  398         unsigned long num_phys_stacked;
  399 };
  400 
  401 struct vcpu_guest_context {
  402 #define VGCF_EXTRA_REGS (1UL << 1)      /* Set extra regs.  */
  403 #define VGCF_SET_CR_IRR (1UL << 2)      /* Set cr_irr[0:3]. */
  404 #define VGCF_online     (1UL << 3)  /* make this vcpu online */
  405 #define VGCF_SET_AR_ITC (1UL << 4)  /* set pv ar.itc. itc_offset, itc_last */
  406     unsigned long flags;       /* VGCF_* flags */
  407 
  408     struct vcpu_guest_context_regs regs;
  409 
  410     unsigned long event_callback_ip;
  411 
  412     /* xen doesn't share privregs pages with hvm domain so that this member
  413      * doesn't make sense for hvm domain.
  414      * ~0UL is already used for INVALID_P2M_ENTRY. */
  415 #define VGC_PRIVREGS_HVM       (~(-2UL))
  416     unsigned long privregs_pfn;
  417 };
  418 typedef struct vcpu_guest_context vcpu_guest_context_t;
  419 DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t);
  420 
  421 /* dom0 vp op */
  422 #define __HYPERVISOR_ia64_dom0vp_op     __HYPERVISOR_arch_0
  423 /*  Map io space in machine address to dom0 physical address space.
  424     Currently physical assigned address equals to machine address.  */
  425 #define IA64_DOM0VP_ioremap             0
  426 
  427 /* Convert a pseudo physical page frame number to the corresponding
  428    machine page frame number. If no page is assigned, INVALID_MFN or
  429    GPFN_INV_MASK is returned depending on domain's non-vti/vti mode.  */
  430 #define IA64_DOM0VP_phystomach          1
  431 
  432 /* Convert a machine page frame number to the corresponding pseudo physical
  433    page frame number of the caller domain.  */
  434 #define IA64_DOM0VP_machtophys          3
  435 
  436 /* Reserved for future use.  */
  437 #define IA64_DOM0VP_iounmap             4
  438 
  439 /* Unmap and free pages contained in the specified pseudo physical region.  */
  440 #define IA64_DOM0VP_zap_physmap         5
  441 
  442 /* Assign machine page frame to dom0's pseudo physical address space.  */
  443 #define IA64_DOM0VP_add_physmap         6
  444 
  445 /* expose the p2m table into domain */
  446 #define IA64_DOM0VP_expose_p2m          7
  447 
  448 /* xen perfmon */
  449 #define IA64_DOM0VP_perfmon             8
  450 
  451 /* gmfn version of IA64_DOM0VP_add_physmap */
  452 #define IA64_DOM0VP_add_physmap_with_gmfn       9
  453 
  454 /* get fpswa revision */
  455 #define IA64_DOM0VP_fpswa_revision      10
  456 
  457 /* Add an I/O port space range */
  458 #define IA64_DOM0VP_add_io_space        11
  459 
  460 /* expose the foreign domain's p2m table into privileged domain */
  461 #define IA64_DOM0VP_expose_foreign_p2m  12
  462 #define         IA64_DOM0VP_EFP_ALLOC_PTE       0x1 /* allocate p2m table */
  463 
  464 /* unexpose the foreign domain's p2m table into privileged domain */
  465 #define IA64_DOM0VP_unexpose_foreign_p2m        13
  466 
  467 /* get memmap_info and memmap. It is possible to map the page directly
  468    by foreign page mapping, but there is a race between writer.
  469    This hypercall avoids such race. */
  470 #define IA64_DOM0VP_get_memmap          14
  471 
  472 // flags for page assignement to pseudo physical address space
  473 #define _ASSIGN_readonly                0
  474 #define ASSIGN_readonly                 (1UL << _ASSIGN_readonly)
  475 #define ASSIGN_writable                 (0UL << _ASSIGN_readonly) // dummy flag
  476 /* Internal only: memory attribute must be WC/UC/UCE.  */
  477 #define _ASSIGN_nocache                 1
  478 #define ASSIGN_nocache                  (1UL << _ASSIGN_nocache)
  479 // tlb tracking
  480 #define _ASSIGN_tlb_track               2
  481 #define ASSIGN_tlb_track                (1UL << _ASSIGN_tlb_track)
  482 /* Internal only: associated with PGC_allocated bit */
  483 #define _ASSIGN_pgc_allocated           3
  484 #define ASSIGN_pgc_allocated            (1UL << _ASSIGN_pgc_allocated)
  485 /* Page is an IO page.  */
  486 #define _ASSIGN_io                      4
  487 #define ASSIGN_io                       (1UL << _ASSIGN_io)
  488 
  489 /* This structure has the same layout of struct ia64_boot_param, defined in
  490    <asm/system.h>.  It is redefined here to ease use.  */
  491 struct xen_ia64_boot_param {
  492         unsigned long command_line;     /* physical address of cmd line args */
  493         unsigned long efi_systab;       /* physical address of EFI system table */
  494         unsigned long efi_memmap;       /* physical address of EFI memory map */
  495         unsigned long efi_memmap_size;  /* size of EFI memory map */
  496         unsigned long efi_memdesc_size; /* size of an EFI memory map descriptor */
  497         unsigned int  efi_memdesc_version;      /* memory descriptor version */
  498         struct {
  499                 unsigned short num_cols;        /* number of columns on console.  */
  500                 unsigned short num_rows;        /* number of rows on console.  */
  501                 unsigned short orig_x;  /* cursor's x position */
  502                 unsigned short orig_y;  /* cursor's y position */
  503         } console_info;
  504         unsigned long fpswa;            /* physical address of the fpswa interface */
  505         unsigned long initrd_start;
  506         unsigned long initrd_size;
  507         unsigned long domain_start;     /* va where the boot time domain begins */
  508         unsigned long domain_size;      /* how big is the boot domain */
  509 };
  510 
  511 #endif /* !__ASSEMBLY__ */
  512 
  513 /* Size of the shared_info area (this is not related to page size).  */
  514 #define XSI_SHIFT                       14
  515 #define XSI_SIZE                        (1 << XSI_SHIFT)
  516 /* Log size of mapped_regs area (64 KB - only 4KB is used).  */
  517 #define XMAPPEDREGS_SHIFT               12
  518 #define XMAPPEDREGS_SIZE                (1 << XMAPPEDREGS_SHIFT)
  519 /* Offset of XASI (Xen arch shared info) wrt XSI_BASE.  */
  520 #define XMAPPEDREGS_OFS                 XSI_SIZE
  521 
  522 /* Hyperprivops.  */
  523 #define HYPERPRIVOP_START               0x1
  524 #define HYPERPRIVOP_RFI                 (HYPERPRIVOP_START + 0x0)
  525 #define HYPERPRIVOP_RSM_DT              (HYPERPRIVOP_START + 0x1)
  526 #define HYPERPRIVOP_SSM_DT              (HYPERPRIVOP_START + 0x2)
  527 #define HYPERPRIVOP_COVER               (HYPERPRIVOP_START + 0x3)
  528 #define HYPERPRIVOP_ITC_D               (HYPERPRIVOP_START + 0x4)
  529 #define HYPERPRIVOP_ITC_I               (HYPERPRIVOP_START + 0x5)
  530 #define HYPERPRIVOP_SSM_I               (HYPERPRIVOP_START + 0x6)
  531 #define HYPERPRIVOP_GET_IVR             (HYPERPRIVOP_START + 0x7)
  532 #define HYPERPRIVOP_GET_TPR             (HYPERPRIVOP_START + 0x8)
  533 #define HYPERPRIVOP_SET_TPR             (HYPERPRIVOP_START + 0x9)
  534 #define HYPERPRIVOP_EOI                 (HYPERPRIVOP_START + 0xa)
  535 #define HYPERPRIVOP_SET_ITM             (HYPERPRIVOP_START + 0xb)
  536 #define HYPERPRIVOP_THASH               (HYPERPRIVOP_START + 0xc)
  537 #define HYPERPRIVOP_PTC_GA              (HYPERPRIVOP_START + 0xd)
  538 #define HYPERPRIVOP_ITR_D               (HYPERPRIVOP_START + 0xe)
  539 #define HYPERPRIVOP_GET_RR              (HYPERPRIVOP_START + 0xf)
  540 #define HYPERPRIVOP_SET_RR              (HYPERPRIVOP_START + 0x10)
  541 #define HYPERPRIVOP_SET_KR              (HYPERPRIVOP_START + 0x11)
  542 #define HYPERPRIVOP_FC                  (HYPERPRIVOP_START + 0x12)
  543 #define HYPERPRIVOP_GET_CPUID           (HYPERPRIVOP_START + 0x13)
  544 #define HYPERPRIVOP_GET_PMD             (HYPERPRIVOP_START + 0x14)
  545 #define HYPERPRIVOP_GET_EFLAG           (HYPERPRIVOP_START + 0x15)
  546 #define HYPERPRIVOP_SET_EFLAG           (HYPERPRIVOP_START + 0x16)
  547 #define HYPERPRIVOP_RSM_BE              (HYPERPRIVOP_START + 0x17)
  548 #define HYPERPRIVOP_GET_PSR             (HYPERPRIVOP_START + 0x18)
  549 #define HYPERPRIVOP_SET_RR0_TO_RR4      (HYPERPRIVOP_START + 0x19)
  550 #define HYPERPRIVOP_MAX                 (0x1a)
  551 
  552 /* Fast and light hypercalls.  */
  553 #define __HYPERVISOR_ia64_fast_eoi      __HYPERVISOR_arch_1
  554 
  555 /* Extra debug features.  */
  556 #define __HYPERVISOR_ia64_debug_op  __HYPERVISOR_arch_2
  557 
  558 /* Xencomm macros.  */
  559 #define XENCOMM_INLINE_MASK 0xf800000000000000UL
  560 #define XENCOMM_INLINE_FLAG 0x8000000000000000UL
  561 
  562 #ifndef __ASSEMBLY__
  563 
  564 /*
  565  * Optimization features.
  566  * The hypervisor may do some special optimizations for guests. This hypercall
  567  * can be used to switch on/of these special optimizations.
  568  */
  569 #define __HYPERVISOR_opt_feature        0x700UL
  570 
  571 #define XEN_IA64_OPTF_OFF       0x0
  572 #define XEN_IA64_OPTF_ON        0x1
  573 
  574 /*
  575  * If this feature is switched on, the hypervisor inserts the
  576  * tlb entries without calling the guests traphandler.
  577  * This is useful in guests using region 7 for identity mapping
  578  * like the linux kernel does.
  579  */
  580 #define XEN_IA64_OPTF_IDENT_MAP_REG7    1
  581 
  582 /* Identity mapping of region 4 addresses in HVM. */
  583 #define XEN_IA64_OPTF_IDENT_MAP_REG4    2
  584 
  585 /* Identity mapping of region 5 addresses in HVM. */
  586 #define XEN_IA64_OPTF_IDENT_MAP_REG5    3
  587 
  588 #define XEN_IA64_OPTF_IDENT_MAP_NOT_SET  (0)
  589 
  590 struct xen_ia64_opt_feature {
  591         unsigned long cmd;              /* Which feature */
  592         unsigned char on;               /* Switch feature on/off */
  593         union {
  594                 struct {
  595                                 /* The page protection bit mask of the pte.
  596                                  * This will be or'ed with the pte. */
  597                         unsigned long pgprot;
  598                         unsigned long key;      /* A protection key for itir. */
  599                 };
  600         };
  601 };
  602 
  603 #endif /* __ASSEMBLY__ */
  604 
  605 /* xen perfmon */
  606 #ifdef XEN
  607 #ifndef __ASSEMBLY__
  608 #ifndef _ASM_IA64_PERFMON_H
  609 
  610 #include <xen/list.h>   // asm/perfmon.h requires struct list_head
  611 #include <asm/perfmon.h>
  612 // for PFM_xxx and pfarg_features_t, pfarg_context_t, pfarg_reg_t, pfarg_load_t
  613 
  614 #endif /* _ASM_IA64_PERFMON_H */
  615 
  616 DEFINE_XEN_GUEST_HANDLE(pfarg_features_t);
  617 DEFINE_XEN_GUEST_HANDLE(pfarg_context_t);
  618 DEFINE_XEN_GUEST_HANDLE(pfarg_reg_t);
  619 DEFINE_XEN_GUEST_HANDLE(pfarg_load_t);
  620 #endif /* __ASSEMBLY__ */
  621 #endif /* XEN */
  622 
  623 #ifndef __ASSEMBLY__
  624 #include "arch-ia64/hvm/memmap.h"
  625 #endif
  626 
  627 #endif /* __HYPERVISOR_IF_IA64_H__ */
  628 
  629 /*
  630  * Local variables:
  631  * mode: C
  632  * c-set-style: "BSD"
  633  * c-basic-offset: 4
  634  * tab-width: 4
  635  * indent-tabs-mode: nil
  636  * End:
  637  */

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