1 /*
2 * ioreq.h: I/O request definitions for device models
3 * Copyright (c) 2004, Intel Corporation.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to
7 * deal in the Software without restriction, including without limitation the
8 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
9 * sell copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 #ifndef _IOREQ_H_
25 #define _IOREQ_H_
26
27 #define IOREQ_READ 1
28 #define IOREQ_WRITE 0
29
30 #define STATE_IOREQ_NONE 0
31 #define STATE_IOREQ_READY 1
32 #define STATE_IOREQ_INPROCESS 2
33 #define STATE_IORESP_READY 3
34
35 #define IOREQ_TYPE_PIO 0 /* pio */
36 #define IOREQ_TYPE_COPY 1 /* mmio ops */
37 #define IOREQ_TYPE_TIMEOFFSET 7
38 #define IOREQ_TYPE_INVALIDATE 8 /* mapcache */
39
40 /*
41 * VMExit dispatcher should cooperate with instruction decoder to
42 * prepare this structure and notify service OS and DM by sending
43 * virq
44 */
45 struct ioreq {
46 uint64_t addr; /* physical address */
47 uint64_t data; /* data (or paddr of data) */
48 uint32_t count; /* for rep prefixes */
49 uint32_t size; /* size in bytes */
50 uint32_t vp_eport; /* evtchn for notifications to/from device model */
51 uint16_t _pad0;
52 uint8_t state:4;
53 uint8_t data_is_ptr:1; /* if 1, data above is the guest paddr
54 * of the real data to use. */
55 uint8_t dir:1; /* 1=read, 0=write */
56 uint8_t df:1;
57 uint8_t _pad1:1;
58 uint8_t type; /* I/O type */
59 };
60 typedef struct ioreq ioreq_t;
61
62 struct shared_iopage {
63 struct ioreq vcpu_ioreq[1];
64 };
65 typedef struct shared_iopage shared_iopage_t;
66
67 struct buf_ioreq {
68 uint8_t type; /* I/O type */
69 uint8_t pad:1;
70 uint8_t dir:1; /* 1=read, 0=write */
71 uint8_t size:2; /* 0=>1, 1=>2, 2=>4, 3=>8. If 8, use two buf_ioreqs */
72 uint32_t addr:20;/* physical address */
73 uint32_t data; /* data */
74 };
75 typedef struct buf_ioreq buf_ioreq_t;
76
77 #define IOREQ_BUFFER_SLOT_NUM 511 /* 8 bytes each, plus 2 4-byte indexes */
78 struct buffered_iopage {
79 unsigned int read_pointer;
80 unsigned int write_pointer;
81 buf_ioreq_t buf_ioreq[IOREQ_BUFFER_SLOT_NUM];
82 }; /* NB. Size of this structure must be no greater than one page. */
83 typedef struct buffered_iopage buffered_iopage_t;
84
85 #if defined(__ia64__)
86 struct pio_buffer {
87 uint32_t page_offset;
88 uint32_t pointer;
89 uint32_t data_end;
90 uint32_t buf_size;
91 void *opaque;
92 };
93
94 #define PIO_BUFFER_IDE_PRIMARY 0 /* I/O port = 0x1F0 */
95 #define PIO_BUFFER_IDE_SECONDARY 1 /* I/O port = 0x170 */
96 #define PIO_BUFFER_ENTRY_NUM 2
97 struct buffered_piopage {
98 struct pio_buffer pio[PIO_BUFFER_ENTRY_NUM];
99 uint8_t buffer[1];
100 };
101 #endif /* defined(__ia64__) */
102
103 /*
104 * ACPI Control/Event register locations. Location is controlled by a
105 * version number in HVM_PARAM_ACPI_IOPORTS_LOCATION.
106 */
107
108 /* Version 0 (default): Traditional Xen locations. */
109 #define ACPI_PM1A_EVT_BLK_ADDRESS_V0 0x1f40
110 #define ACPI_PM1A_CNT_BLK_ADDRESS_V0 (ACPI_PM1A_EVT_BLK_ADDRESS_V0 + 0x04)
111 #define ACPI_PM_TMR_BLK_ADDRESS_V0 (ACPI_PM1A_EVT_BLK_ADDRESS_V0 + 0x08)
112 #define ACPI_GPE0_BLK_ADDRESS_V0 (ACPI_PM_TMR_BLK_ADDRESS_V0 + 0x20)
113 #define ACPI_GPE0_BLK_LEN_V0 0x08
114
115 /* Version 1: Locations preferred by modern Qemu. */
116 #define ACPI_PM1A_EVT_BLK_ADDRESS_V1 0xb000
117 #define ACPI_PM1A_CNT_BLK_ADDRESS_V1 (ACPI_PM1A_EVT_BLK_ADDRESS_V1 + 0x04)
118 #define ACPI_PM_TMR_BLK_ADDRESS_V1 (ACPI_PM1A_EVT_BLK_ADDRESS_V1 + 0x08)
119 #define ACPI_GPE0_BLK_ADDRESS_V1 0xafe0
120 #define ACPI_GPE0_BLK_LEN_V1 0x04
121
122 /* Compatibility definitions for the default location (version 0). */
123 #define ACPI_PM1A_EVT_BLK_ADDRESS ACPI_PM1A_EVT_BLK_ADDRESS_V0
124 #define ACPI_PM1A_CNT_BLK_ADDRESS ACPI_PM1A_CNT_BLK_ADDRESS_V0
125 #define ACPI_PM_TMR_BLK_ADDRESS ACPI_PM_TMR_BLK_ADDRESS_V0
126 #define ACPI_GPE0_BLK_ADDRESS ACPI_GPE0_BLK_ADDRESS_V0
127 #define ACPI_GPE0_BLK_LEN ACPI_GPE0_BLK_LEN_V0
128
129
130 #endif /* _IOREQ_H_ */
131
132 /*
133 * Local variables:
134 * mode: C
135 * c-set-style: "BSD"
136 * c-basic-offset: 4
137 * tab-width: 4
138 * indent-tabs-mode: nil
139 * End:
140 */
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