The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/xen/interface/trace.h

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    1 /******************************************************************************
    2  * include/public/trace.h
    3  * 
    4  * Permission is hereby granted, free of charge, to any person obtaining a copy
    5  * of this software and associated documentation files (the "Software"), to
    6  * deal in the Software without restriction, including without limitation the
    7  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
    8  * sell copies of the Software, and to permit persons to whom the Software is
    9  * furnished to do so, subject to the following conditions:
   10  *
   11  * The above copyright notice and this permission notice shall be included in
   12  * all copies or substantial portions of the Software.
   13  *
   14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
   17  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
   18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
   19  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
   20  * DEALINGS IN THE SOFTWARE.
   21  *
   22  * Mark Williamson, (C) 2004 Intel Research Cambridge
   23  * Copyright (C) 2005 Bin Ren
   24  */
   25 
   26 #ifndef __XEN_PUBLIC_TRACE_H__
   27 #define __XEN_PUBLIC_TRACE_H__
   28 
   29 #define TRACE_EXTRA_MAX    7
   30 #define TRACE_EXTRA_SHIFT 28
   31 
   32 /* Trace classes */
   33 #define TRC_CLS_SHIFT 16
   34 #define TRC_GEN      0x0001f000    /* General trace            */
   35 #define TRC_SCHED    0x0002f000    /* Xen Scheduler trace      */
   36 #define TRC_DOM0OP   0x0004f000    /* Xen DOM0 operation trace */
   37 #define TRC_HVM      0x0008f000    /* Xen HVM trace            */
   38 #define TRC_MEM      0x0010f000    /* Xen memory trace         */
   39 #define TRC_PV       0x0020f000    /* Xen PV traces            */
   40 #define TRC_SHADOW   0x0040f000    /* Xen shadow tracing       */
   41 #define TRC_HW       0x0080f000    /* Xen hardware-related traces */
   42 #define TRC_GUEST    0x0800f000    /* Guest-generated traces   */
   43 #define TRC_ALL      0x0ffff000
   44 #define TRC_HD_TO_EVENT(x) ((x)&0x0fffffff)
   45 #define TRC_HD_CYCLE_FLAG (1UL<<31)
   46 #define TRC_HD_INCLUDES_CYCLE_COUNT(x) ( !!( (x) & TRC_HD_CYCLE_FLAG ) )
   47 #define TRC_HD_EXTRA(x)    (((x)>>TRACE_EXTRA_SHIFT)&TRACE_EXTRA_MAX)
   48 
   49 /* Trace subclasses */
   50 #define TRC_SUBCLS_SHIFT 12
   51 
   52 /* trace subclasses for SVM */
   53 #define TRC_HVM_ENTRYEXIT 0x00081000   /* VMENTRY and #VMEXIT       */
   54 #define TRC_HVM_HANDLER   0x00082000   /* various HVM handlers      */
   55 
   56 #define TRC_SCHED_MIN       0x00021000   /* Just runstate changes */
   57 #define TRC_SCHED_CLASS     0x00022000   /* Scheduler-specific    */
   58 #define TRC_SCHED_VERBOSE   0x00028000   /* More inclusive scheduling */
   59 
   60 /* Trace classes for Hardware */
   61 #define TRC_HW_PM           0x00801000   /* Power management traces */
   62 #define TRC_HW_IRQ          0x00802000   /* Traces relating to the handling of IRQs */
   63 
   64 /* Trace events per class */
   65 #define TRC_LOST_RECORDS        (TRC_GEN + 1)
   66 #define TRC_TRACE_WRAP_BUFFER  (TRC_GEN + 2)
   67 #define TRC_TRACE_CPU_CHANGE    (TRC_GEN + 3)
   68 
   69 #define TRC_SCHED_RUNSTATE_CHANGE   (TRC_SCHED_MIN + 1)
   70 #define TRC_SCHED_CONTINUE_RUNNING  (TRC_SCHED_MIN + 2)
   71 #define TRC_SCHED_DOM_ADD        (TRC_SCHED_VERBOSE +  1)
   72 #define TRC_SCHED_DOM_REM        (TRC_SCHED_VERBOSE +  2)
   73 #define TRC_SCHED_SLEEP          (TRC_SCHED_VERBOSE +  3)
   74 #define TRC_SCHED_WAKE           (TRC_SCHED_VERBOSE +  4)
   75 #define TRC_SCHED_YIELD          (TRC_SCHED_VERBOSE +  5)
   76 #define TRC_SCHED_BLOCK          (TRC_SCHED_VERBOSE +  6)
   77 #define TRC_SCHED_SHUTDOWN       (TRC_SCHED_VERBOSE +  7)
   78 #define TRC_SCHED_CTL            (TRC_SCHED_VERBOSE +  8)
   79 #define TRC_SCHED_ADJDOM         (TRC_SCHED_VERBOSE +  9)
   80 #define TRC_SCHED_SWITCH         (TRC_SCHED_VERBOSE + 10)
   81 #define TRC_SCHED_S_TIMER_FN     (TRC_SCHED_VERBOSE + 11)
   82 #define TRC_SCHED_T_TIMER_FN     (TRC_SCHED_VERBOSE + 12)
   83 #define TRC_SCHED_DOM_TIMER_FN   (TRC_SCHED_VERBOSE + 13)
   84 #define TRC_SCHED_SWITCH_INFPREV (TRC_SCHED_VERBOSE + 14)
   85 #define TRC_SCHED_SWITCH_INFNEXT (TRC_SCHED_VERBOSE + 15)
   86 #define TRC_SCHED_SHUTDOWN_CODE  (TRC_SCHED_VERBOSE + 16)
   87 
   88 #define TRC_MEM_PAGE_GRANT_MAP      (TRC_MEM + 1)
   89 #define TRC_MEM_PAGE_GRANT_UNMAP    (TRC_MEM + 2)
   90 #define TRC_MEM_PAGE_GRANT_TRANSFER (TRC_MEM + 3)
   91 #define TRC_MEM_SET_P2M_ENTRY       (TRC_MEM + 4)
   92 #define TRC_MEM_DECREASE_RESERVATION (TRC_MEM + 5)
   93 #define TRC_MEM_POD_POPULATE        (TRC_MEM + 16)
   94 #define TRC_MEM_POD_ZERO_RECLAIM    (TRC_MEM + 17)
   95 #define TRC_MEM_POD_SUPERPAGE_SPLINTER (TRC_MEM + 18)
   96 
   97 
   98 #define TRC_PV_HYPERCALL             (TRC_PV +  1)
   99 #define TRC_PV_TRAP                  (TRC_PV +  3)
  100 #define TRC_PV_PAGE_FAULT            (TRC_PV +  4)
  101 #define TRC_PV_FORCED_INVALID_OP     (TRC_PV +  5)
  102 #define TRC_PV_EMULATE_PRIVOP        (TRC_PV +  6)
  103 #define TRC_PV_EMULATE_4GB           (TRC_PV +  7)
  104 #define TRC_PV_MATH_STATE_RESTORE    (TRC_PV +  8)
  105 #define TRC_PV_PAGING_FIXUP          (TRC_PV +  9)
  106 #define TRC_PV_GDT_LDT_MAPPING_FAULT (TRC_PV + 10)
  107 #define TRC_PV_PTWR_EMULATION        (TRC_PV + 11)
  108 #define TRC_PV_PTWR_EMULATION_PAE    (TRC_PV + 12)
  109   /* Indicates that addresses in trace record are 64 bits */
  110 #define TRC_64_FLAG               (0x100) 
  111 
  112 #define TRC_SHADOW_NOT_SHADOW                 (TRC_SHADOW +  1)
  113 #define TRC_SHADOW_FAST_PROPAGATE             (TRC_SHADOW +  2)
  114 #define TRC_SHADOW_FAST_MMIO                  (TRC_SHADOW +  3)
  115 #define TRC_SHADOW_FALSE_FAST_PATH            (TRC_SHADOW +  4)
  116 #define TRC_SHADOW_MMIO                       (TRC_SHADOW +  5)
  117 #define TRC_SHADOW_FIXUP                      (TRC_SHADOW +  6)
  118 #define TRC_SHADOW_DOMF_DYING                 (TRC_SHADOW +  7)
  119 #define TRC_SHADOW_EMULATE                    (TRC_SHADOW +  8)
  120 #define TRC_SHADOW_EMULATE_UNSHADOW_USER      (TRC_SHADOW +  9)
  121 #define TRC_SHADOW_EMULATE_UNSHADOW_EVTINJ    (TRC_SHADOW + 10)
  122 #define TRC_SHADOW_EMULATE_UNSHADOW_UNHANDLED (TRC_SHADOW + 11)
  123 #define TRC_SHADOW_WRMAP_BF                   (TRC_SHADOW + 12)
  124 #define TRC_SHADOW_PREALLOC_UNPIN             (TRC_SHADOW + 13)
  125 #define TRC_SHADOW_RESYNC_FULL                (TRC_SHADOW + 14)
  126 #define TRC_SHADOW_RESYNC_ONLY                (TRC_SHADOW + 15)
  127 
  128 /* trace events per subclass */
  129 #define TRC_HVM_NESTEDFLAG      (0x400)
  130 #define TRC_HVM_VMENTRY         (TRC_HVM_ENTRYEXIT + 0x01)
  131 #define TRC_HVM_VMEXIT          (TRC_HVM_ENTRYEXIT + 0x02)
  132 #define TRC_HVM_VMEXIT64        (TRC_HVM_ENTRYEXIT + TRC_64_FLAG + 0x02)
  133 #define TRC_HVM_PF_XEN          (TRC_HVM_HANDLER + 0x01)
  134 #define TRC_HVM_PF_XEN64        (TRC_HVM_HANDLER + TRC_64_FLAG + 0x01)
  135 #define TRC_HVM_PF_INJECT       (TRC_HVM_HANDLER + 0x02)
  136 #define TRC_HVM_PF_INJECT64     (TRC_HVM_HANDLER + TRC_64_FLAG + 0x02)
  137 #define TRC_HVM_INJ_EXC         (TRC_HVM_HANDLER + 0x03)
  138 #define TRC_HVM_INJ_VIRQ        (TRC_HVM_HANDLER + 0x04)
  139 #define TRC_HVM_REINJ_VIRQ      (TRC_HVM_HANDLER + 0x05)
  140 #define TRC_HVM_IO_READ         (TRC_HVM_HANDLER + 0x06)
  141 #define TRC_HVM_IO_WRITE        (TRC_HVM_HANDLER + 0x07)
  142 #define TRC_HVM_CR_READ         (TRC_HVM_HANDLER + 0x08)
  143 #define TRC_HVM_CR_READ64       (TRC_HVM_HANDLER + TRC_64_FLAG + 0x08)
  144 #define TRC_HVM_CR_WRITE        (TRC_HVM_HANDLER + 0x09)
  145 #define TRC_HVM_CR_WRITE64      (TRC_HVM_HANDLER + TRC_64_FLAG + 0x09)
  146 #define TRC_HVM_DR_READ         (TRC_HVM_HANDLER + 0x0A)
  147 #define TRC_HVM_DR_WRITE        (TRC_HVM_HANDLER + 0x0B)
  148 #define TRC_HVM_MSR_READ        (TRC_HVM_HANDLER + 0x0C)
  149 #define TRC_HVM_MSR_WRITE       (TRC_HVM_HANDLER + 0x0D)
  150 #define TRC_HVM_CPUID           (TRC_HVM_HANDLER + 0x0E)
  151 #define TRC_HVM_INTR            (TRC_HVM_HANDLER + 0x0F)
  152 #define TRC_HVM_NMI             (TRC_HVM_HANDLER + 0x10)
  153 #define TRC_HVM_SMI             (TRC_HVM_HANDLER + 0x11)
  154 #define TRC_HVM_VMMCALL         (TRC_HVM_HANDLER + 0x12)
  155 #define TRC_HVM_HLT             (TRC_HVM_HANDLER + 0x13)
  156 #define TRC_HVM_INVLPG          (TRC_HVM_HANDLER + 0x14)
  157 #define TRC_HVM_INVLPG64        (TRC_HVM_HANDLER + TRC_64_FLAG + 0x14)
  158 #define TRC_HVM_MCE             (TRC_HVM_HANDLER + 0x15)
  159 #define TRC_HVM_IOPORT_READ     (TRC_HVM_HANDLER + 0x16)
  160 #define TRC_HVM_IOMEM_READ      (TRC_HVM_HANDLER + 0x17)
  161 #define TRC_HVM_CLTS            (TRC_HVM_HANDLER + 0x18)
  162 #define TRC_HVM_LMSW            (TRC_HVM_HANDLER + 0x19)
  163 #define TRC_HVM_LMSW64          (TRC_HVM_HANDLER + TRC_64_FLAG + 0x19)
  164 #define TRC_HVM_RDTSC           (TRC_HVM_HANDLER + 0x1a)
  165 #define TRC_HVM_INTR_WINDOW     (TRC_HVM_HANDLER + 0x20)
  166 #define TRC_HVM_NPF             (TRC_HVM_HANDLER + 0x21)
  167 #define TRC_HVM_REALMODE_EMULATE (TRC_HVM_HANDLER + 0x22)
  168 #define TRC_HVM_TRAP             (TRC_HVM_HANDLER + 0x23)
  169 #define TRC_HVM_TRAP_DEBUG       (TRC_HVM_HANDLER + 0x24)
  170 #define TRC_HVM_VLAPIC           (TRC_HVM_HANDLER + 0x25)
  171 
  172 #define TRC_HVM_IOPORT_WRITE    (TRC_HVM_HANDLER + 0x216)
  173 #define TRC_HVM_IOMEM_WRITE     (TRC_HVM_HANDLER + 0x217)
  174 
  175 /* trace events for per class */
  176 #define TRC_PM_FREQ_CHANGE      (TRC_HW_PM + 0x01)
  177 #define TRC_PM_IDLE_ENTRY       (TRC_HW_PM + 0x02)
  178 #define TRC_PM_IDLE_EXIT        (TRC_HW_PM + 0x03)
  179 
  180 /* Trace events for IRQs */
  181 #define TRC_HW_IRQ_MOVE_CLEANUP_DELAY (TRC_HW_IRQ + 0x1)
  182 #define TRC_HW_IRQ_MOVE_CLEANUP       (TRC_HW_IRQ + 0x2)
  183 #define TRC_HW_IRQ_BIND_VECTOR        (TRC_HW_IRQ + 0x3)
  184 #define TRC_HW_IRQ_CLEAR_VECTOR       (TRC_HW_IRQ + 0x4)
  185 #define TRC_HW_IRQ_MOVE_FINISH        (TRC_HW_IRQ + 0x5)
  186 #define TRC_HW_IRQ_ASSIGN_VECTOR      (TRC_HW_IRQ + 0x6)
  187 #define TRC_HW_IRQ_UNMAPPED_VECTOR    (TRC_HW_IRQ + 0x7)
  188 #define TRC_HW_IRQ_HANDLED            (TRC_HW_IRQ + 0x8)
  189 
  190 
  191 /* This structure represents a single trace buffer record. */
  192 struct t_rec {
  193     uint32_t event:28;
  194     uint32_t extra_u32:3;         /* # entries in trailing extra_u32[] array */
  195     uint32_t cycles_included:1;   /* u.cycles or u.no_cycles? */
  196     union {
  197         struct {
  198             uint32_t cycles_lo, cycles_hi; /* cycle counter timestamp */
  199             uint32_t extra_u32[7];         /* event data items */
  200         } cycles;
  201         struct {
  202             uint32_t extra_u32[7];         /* event data items */
  203         } nocycles;
  204     } u;
  205 };
  206 
  207 /*
  208  * This structure contains the metadata for a single trace buffer.  The head
  209  * field, indexes into an array of struct t_rec's.
  210  */
  211 struct t_buf {
  212     /* Assume the data buffer size is X.  X is generally not a power of 2.
  213      * CONS and PROD are incremented modulo (2*X):
  214      *     0 <= cons < 2*X
  215      *     0 <= prod < 2*X
  216      * This is done because addition modulo X breaks at 2^32 when X is not a
  217      * power of 2:
  218      *     (((2^32 - 1) % X) + 1) % X != (2^32) % X
  219      */
  220     uint32_t cons;   /* Offset of next item to be consumed by control tools. */
  221     uint32_t prod;   /* Offset of next item to be produced by Xen.           */
  222     /*  Records follow immediately after the meta-data header.    */
  223 };
  224 
  225 /* Structure used to pass MFNs to the trace buffers back to trace consumers.
  226  * Offset is an offset into the mapped structure where the mfn list will be held.
  227  * MFNs will be at ((unsigned long *)(t_info))+(t_info->cpu_offset[cpu]).
  228  */
  229 struct t_info {
  230     uint16_t tbuf_size; /* Size in pages of each trace buffer */
  231     uint16_t mfn_offset[];  /* Offset within t_info structure of the page list per cpu */
  232     /* MFN lists immediately after the header */
  233 };
  234 
  235 #endif /* __XEN_PUBLIC_TRACE_H__ */
  236 
  237 /*
  238  * Local variables:
  239  * mode: C
  240  * c-set-style: "BSD"
  241  * c-basic-offset: 4
  242  * tab-width: 4
  243  * indent-tabs-mode: nil
  244  * End:
  245  */

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